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2016 IEEE-NPSS Real Time Conference (RT)最新文献

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The data acquisition architecture for the “dark matter experiment using Argon pulse-shaped discrimination” — DEAP-3600 “氩气脉冲型暗物质实验”数据采集架构DEAP-3600
Pub Date : 2016-08-15 DOI: 10.1109/RTC.2016.7543179
P. Amaudruz, D. Bishop, P. Gorel, T. Lindner, Y. Linn, K. Olchanski, F. Retière, B. Shaw, Ben Smith
This paper describes the Data Acquisition (DAQ) architecture for the DEAP-3600 experiment at SNOLAB in Ontario, Canada, which is searching for Weakly Interacting Massive Particles. (WIMPs). The identification of the WIMP is based on the rejection by signal discrimination of the beta decays from the liquid 39Ar composing the detector volume (3600kg). The Data Acquisition is based on commercial electronics modules for the waveform acquisition and custom electronics for the trigger decision system. The software layer (Midas) handles the overall experiment data taking process, and the monitoring of the experimental parameters.
本文描述了加拿大安大略省SNOLAB的DEAP-3600实验的数据采集(DAQ)体系结构,该实验旨在寻找弱相互作用的大质量粒子。(WIMPs)。WIMP的识别是基于对构成探测器体积(3600kg)的液体39Ar的β衰变的信号识别。数据采集基于用于波形采集的商业电子模块和用于触发决策系统的定制电子模块。软件层(Midas)处理整个实验数据采集过程,并对实验参数进行监控。
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引用次数: 0
Trigger system for a large area RPC TOF-tracker 用于大面积RPC tof跟踪器的触发系统
Pub Date : 2016-08-15 DOI: 10.1109/RTC.2016.7543170
F. Clemêncio, A. Blanco, N. Carolino, C. Loureiro
The TOF-tracker concept, the simultaneous measurement of accurate time and bi-dimensional space coordinates in a single gaseous detector, has been previously demonstrated. Recently, a larger area, 1550×1250 mm2, RPC detector has been constructed. Signals are induced in metallic strips located in each side of the RPC active volume and coupled to both charge-sensitive and timing circuits, that can be used to generate a coincidence trigger. In this work, the architecture and performance of the trigger system of the detector is reported. The system is based on off-the-shelf inexpensive modules and in a custom program written in VHDL running in a Xilinx Spartan-6 FPGA. It is fast, fully parameterized and supports several trigger strategies, allowing at the same time the collection of several information referring to the operating condition of the detector, relevant for tests and detector maintenance.
tof跟踪器概念,在单个气体探测器中同时测量精确的时间和二维空间坐标,已经被证明。最近,一个更大的面积,1550×1250 mm2, RPC探测器已经建成。信号在位于RPC有源体积两侧的金属条中诱导,并耦合到电荷敏感电路和定时电路,可用于产生巧合触发器。本文介绍了探测器触发系统的结构和性能。该系统基于现成的廉价模块和用VHDL编写的定制程序,运行在Xilinx Spartan-6 FPGA上。它速度快,完全参数化,支持多种触发策略,允许同时收集与探测器运行状况相关的几种信息,用于测试和探测器维护。
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引用次数: 0
FPGA based RF and piezo controllers for SRF cavities in CW mode 基于FPGA的连续波模式下SRF腔的射频和压电控制器
Pub Date : 2016-08-15 DOI: 10.1109/RTC.2016.7543112
R. Rybaniec, K. Przygoda, V. Ayvazyan, J. Branlard, L. Butkowski, W. Cichalewski, S. Pfeiffer, C. Schmidt, H. Schlarb, J. Sekutowicz
Modern digital low level radio frequency (LLRF) control systems used to stabilize the accelerating field in facilities such as Free Electron Laser in Hamburg (FLASH) or European X-Ray Free Electron Laser (E-XFEL) are based on the Field Programmable Gate Array (FPGA) technology. Presently these accelerator facilities are operated with pulsed RF. In future, these facilities should be operated with continuous wave (CW) which requires significant modifications on the real-time feedbacks realized within the FPGA. For example, higher loaded quality factor of the cavities when operated in a CW mode requires sophisticated resonance control methods. However, iterative learning techniques widely used for machines operated in pulsed mode are not applicable for CW. In addition, the mechanical characteristic of the cavities have now a much more important impact on the choice of the feedback scheme. To overcome the limitations of classical PI-controllers novel realtime adaptive feed forward algorithm is implemented in the FPGA. Also, the high power RF amplifier which is an inductive output tube (IOT) for continuous wave operation instead of a klystron for the pulsed mode has major impact on the design and implementation of the firmware for regulation. In this paper, we report on our successful approach to control multi-cavities with ultra-high precision (dA/A<;0.01%, dphi<;0.02 deg) using a single IOT source and individual resonance control through piezo actuators. Performance measurements of the proposed solution were conducted at Cryo Module Test Bench (CMTB) facility.
现代数字低电平射频(LLRF)控制系统用于稳定加速场的设施,如汉堡自由电子激光器(FLASH)或欧洲x射线自由电子激光器(E-XFEL)是基于现场可编程门阵列(FPGA)技术。目前这些加速器设施是用脉冲射频操作的。未来,这些设施应该在连续波(CW)下运行,这需要对FPGA内实现的实时反馈进行重大修改。例如,在连续波模式下工作时,更高的腔负载质量因子需要复杂的谐振控制方法。然而,广泛用于脉冲模式机器的迭代学习技术并不适用于连续波。此外,空腔的力学特性对反馈方案的选择有更重要的影响。为了克服传统pi控制器的局限性,在FPGA中实现了一种新颖的实时自适应前馈算法。此外,用于连续波操作的高功率射频放大器是一个电感输出管(IOT),而不是用于脉冲模式的速调管,这对用于调节的固件的设计和实现具有重大影响。在本文中,我们报告了我们使用单个物联网源和通过压电致动器进行单个谐振控制的成功方法,以超高精度控制多腔(dA/A< 0.01%, dphi< 0.02度)。所提出的解决方案的性能测量进行了低温模块试验台(CMTB)设施。
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引用次数: 12
Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework 利用CIDAF仿真框架对CMS第二阶段升级的原型FPGA寻迹器进行仿真
Pub Date : 2016-08-15 DOI: 10.1109/RTC.2016.7543110
C. Amstutz, F. Ball, M. Balzer, J. Brooke, L. Calligaris, D. Cieri, E. Clement, G. Hall, T. Harbaum, K. Harder, P. Hobson, G. Iles, T. James, K. Manolopoulos, T. Matsushita, A. Morton, D. Newbold, S. Paramesvaran, M. Pesaresi, I. Reid, A. Rose, O. Sander, T. Schuh, C. Shepherd-Themistocleous, A. Shtipliyski, S. Summers, A. Tapper, I. Tomalin, K. Uchida, P. Vichoudis, M. Weber
The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.
CMS合作正准备对其探测器进行重大升级,这样它就可以在2026年LHC的高亮度运行期间运行。升级后的跟踪电子设备将在几微秒的延迟内重建带电粒子的轨迹,以便它们可以被一级触发器使用。开发了一个仿真框架CIDAF,为基于fpga实现该寻迹器提供参考,该寻迹器采用时间复用(TM)技术进行数据处理。
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引用次数: 4
Preliminary performance of a continuous crystal PET detector with TODT readout scheme 带TODT读出方案的连续晶体PET检测器的初步性能
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543079
Yong Xiao, Xinyi Cheng, Yonggang Wang
Time over dynamic threshold (TODT) method has been theoretically proved with excellent linearity when compared to time of threshold (TOT) method and practically tested with good performance with its application in DAQ system for multi-anode PMT based PET detector. However, both the coincidence time resolution and energy resolution were limited because of the relative low performance of TDCs used in our previous work. In this report, we implemented 67-channel TDCs using tapped-delay line (TDL) method, with average resolution of 63.3 ps in RMS. The performance of CRT of the detector is improved to about 400 ps. Moreover, the signal-noise ratio of 64-channel readouts are observed much meliorated which is supposed to give rise to better intrinsic spatial resolution for the detector. In all, the time resolution of this continuous crystal based PET detector can be expected to be less than 370 ps for FWHM and the intrinsic spatial resolution can be expected to be less than 1.5 mm in average within the whole field of view.
理论证明动态阈值时间法(TODT)与阈值时间法(TOT)相比具有良好的线性度,并在多阳极PMT基PET检测器的DAQ系统中得到了良好的应用。然而,由于我们之前工作中使用的tdc性能相对较低,因此其符合时间分辨率和能量分辨率都受到限制。在本报告中,我们使用抽头延迟线(TDL)方法实现了67通道tdc, RMS平均分辨率为63.3 ps。该探测器的阴极射线管性能提高到400ps左右,并且64通道读出的信噪比得到了很大的改善,从而提高了探测器的固有空间分辨率。综上所述,该连续晶体PET探测器在FWHM下的时间分辨率可小于370 ps,在整个视场内的固有空间分辨率平均小于1.5 mm。
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引用次数: 5
The gas injection control and diagnostic system for the ESTHER shock tube 以丝帖式激波管气体喷射控制与诊断系统
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543159
B. B. Carvalho, M. L. da Silva, Sergio Dias
A fully automated remote control system for the gas filling system has been developed for the ESTHER shock-tube using technologies and software tools, e.g. PLC, EPICS, CS-STUDIO, similar to the ITER CODAC I&C architecture for slow control. The system also comprises also a fast data acquisition for the combustion chamber diagnostics.
采用PLC、EPICS、CS-STUDIO等技术和软件工具,为ESTHER激波管开发了一个全自动气体灌装系统远程控制系统,类似于ITER CODAC I&C架构,用于慢速控制。该系统还包括用于燃烧室诊断的快速数据采集。
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引用次数: 1
The implementation of KTX central control system 实现KTX中央控制系统
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543111
Z. Zhang, B. Xiao, F. Wang, Z. Ji, Y. Wang, P. Wang, Z. Xu, T. Ma, T. Lan, H. Li, W. Liu
KT'K is a new reversed field pinch (RFP) device, and the Central Control System (CCS) for KTX is developed to integrate, harmonize and supervise all of the control subsystems. The new control system includes graphical user interface (GUI), discharge process control module, timing system, safety & interlock system, gas injection module and shot information server. The details about the central control system architecture and components will be described in this article.
KT’k是一种新型的反向场夹紧(RFP)装置,KTX的中央控制系统(CCS)是为了集成、协调和监督所有控制子系统而开发的。新的控制系统包括图形用户界面(GUI)、放料过程控制模块、定时系统、安全联锁系统、注气模块和射药信息服务器。本文将详细介绍中央控制系统的体系结构和组件。
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引用次数: 0
High speed ethernet application for the trigger electronics of the new small wheel 应用于高速以太网的新型小轮触发电子器件
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543078
Houbing Lu, K. Hu, Xu Wang, Feng Li, L. Han, G. Jin
The ATLAS detector will be upgraded in 2018. The main focus of the Phase-I ATLAS upgrade is on the Level-1 trigger, replacing the present muon small wheels (SW) with the “new small wheel(NSW)”, which consists of small thin gap chamber(sTGC) and micromegas (MM). A versatile application-specific integrated circuit(ASIC), the VMM chip, have been developed to read out the signals of the sTGC and MM. The VMM have 64 channels. In order to test the performance of the VMM, a large data transfer rate is needed. Meanwhile, it is required to implement the multi-board interconnection. It is proposed to apply the high-speed Ethernet-based network. We designed and implemented a test platform, the Gigabit Ethernet Module(GEM). The test result shows that the transfer rate can reach up to 926Mbps. Subsequently, the Ethernet is applied in the pad front end board (pFEB) and the thin gap chamber simulation signal generator (SG). This paper introduces the implementation of the GEM platform, as well as its applications. The features of the systems are described in detail.
ATLAS探测器将于2018年升级。ATLAS第一阶段升级的主要重点是一级触发器,将现有的μ子小轮(SW)替换为“新小轮(NSW)”,由小薄间隙腔(sTGC)和微微气体(MM)组成。开发了一种通用专用集成电路(ASIC) VMM芯片,用于读取sTGC和MM的信号,VMM有64通道。为了测试VMM的性能,需要较大的数据传输速率。同时,要求实现多板互连。建议应用基于以太网的高速网络。我们设计并实现了一个测试平台——千兆以太网模块(GEM)。测试结果表明,传输速率可达926Mbps。随后,将以太网应用于pad前端板(pFEB)和薄间隙室仿真信号发生器(SG)中。本文介绍了GEM平台的实现及其应用。详细介绍了系统的特点。
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引用次数: 1
A cosmic ray readout system for qualifications of small-strip thin gap chambers of the ATLAS muon spectrometer Phase-I upgrade 用于ATLAS μ介子光谱仪一期升级小条形薄间隙室检定的宇宙射线读出系统
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543143
Xu Wang, K. Hu, Houbing Lu, Feng Li, Hang Yang, Xinxin Wang, Tianru Geng, L. Han, G. Jin
The Atlas detector, which is one of the Large Hadron Collider (LHC) at CERN, will be upgraded in order to extend the frontiers of particle physics. Bunches of up to 1011 protons will collide at the rate of 40MHz to provide 14TeV proton-proton collisions at a designed luminosity of 1034cm-2s-1. Currently ATLAS is under Phase-I upgrade, which focus mainly on the Level-1 trigger system to maintain the full acceptance of muon tracking while discriminate against background and keep the Level-1 rate at an acceptable level. The New Small Wheel(NSW), which consists of 16 detector planes in two multi-layers comprising of four small-strip Thin Gap Chamber(sTGC) and four MicroMagas(MM) detector planes, is to replace the current muon Small Wheel in order to achieve the upgrade goals. The sTGC Level-1 pad trigger logic is implemented first single wedge pad trigger which is based on coincident hits in three out of four layers of a multiplet in each wedge independently and then pad trigger which is based on geometrical matching between the two wedge triggers in order to identify the interaction point (IP). We designed the pads Front End Board (pFEB) to gather and analyses pads trigger which is the most important issue for Atlas Phase-I upgrade.
欧洲核子研究中心(CERN)大型强子对撞机(LHC)中的阿特拉斯(Atlas)探测器将进行升级,以拓展粒子物理学的前沿。多达1011个质子将以40MHz的速度碰撞,在1034cm-2s-1的设计亮度下提供14TeV的质子-质子碰撞。目前ATLAS正处于第一阶段的升级阶段,升级的重点是1级触发系统,以保持对μ子跟踪的完全接受,同时区分背景,使1级率保持在可接受的水平。新型小轮(New Small Wheel, NSW)由4个小带薄间隙腔(Small -strip Thin Gap Chamber, sTGC)和4个MicroMagas(MM)探测器组成的2个多层16个探测器平面组成,旨在取代现有的μ子小轮,实现升级目标。sTGC -1级垫触发逻辑首先实现单楔垫触发,该触发基于每个楔中四层中的三层的重合命中,然后基于两个楔之间的几何匹配来确定交互点(IP)。我们设计了pad前端板(pFEB)来收集和分析pad触发,这是Atlas第一期升级中最重要的问题。
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引用次数: 0
Design and evaluation of an FPGA online feature extraction data pre-processing stage for the CBM-TRD experiment 基于FPGA的CBM-TRD实验在线特征提取数据预处理平台的设计与评价
Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543160
Cruz de Jesús Garcia Chavez, U. Kebschull
Feature extraction is a data pre-processing stage of the Transition Radiation Detector (TRD) data-acquisition chain (DAQ) as part of the Compressed Baryonic Matter (CBM) experiment. The feature extraction stage delivers event-filtered and bandwidth-reduced data to the First Level Event Selector (FLES). The feature extraction stage implements multiple processing algorithms in order to find and extract regions of interest within time series signals. Algorithms such as peak-finding, signal integration, center of gravity and time-over threshold were implemented for online analysis. On the other hand, a local clustering algorithm allows to find cluster members and to implement even further data reduction algorithms. A feature extraction framework for automatic firmware generation has been tested for the CBM-TRD data acquisition chain. The framework allows the generation of Field Programmable Gate Array (FPGA) designs that implement feature extraction algorithms. Such designs are FPGA-platform independent and are described by a file written in a Domain Specific Language (DSL). The result of using the mentioned feature extraction framework for the TRD feature extraction stage is presented and discussed.
特征提取是过渡辐射探测器(TRD)数据采集链(DAQ)的数据预处理阶段,是压缩重子物质(CBM)实验的一部分。特征提取阶段将经过事件过滤和带宽缩减的数据传递给一级事件选择器(les)。特征提取阶段实现了多种处理算法,以便在时间序列信号中找到和提取感兴趣的区域。实现了寻峰、信号积分、重心和超时阈值等算法用于在线分析。另一方面,局部聚类算法允许查找集群成员并实现进一步的数据缩减算法。针对CBM-TRD数据采集链,对自动生成固件的特征提取框架进行了测试。该框架允许生成实现特征提取算法的现场可编程门阵列(FPGA)设计。这种设计与fpga平台无关,并由用领域特定语言(DSL)编写的文件进行描述。给出并讨论了将上述特征提取框架用于TRD特征提取阶段的结果。
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引用次数: 0
期刊
2016 IEEE-NPSS Real Time Conference (RT)
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