Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9008668
Moirangthem Tiken Singh, Partha Pratim Barman, R. Gogoi
The work presents a speech recognition model for the Assamese language of the state of Assam of India. We experimented the model on the digits of Assamese language. The Deep Neural Network is used to make the recognition model. The Long Short-Term Memory Network (LSTM), which is a special kind of Recurrent Neural Network composed of Long Short-Term Memory blocks is the primary layer of our neural network model. We also use Mel Frequency Cepstral Coefficients for choosing the speech features. Finally, the accuracy of the model is evaluated based on the recognition rate.
{"title":"Speech Recognition Model for Assamese Language Using Deep Neural Network","authors":"Moirangthem Tiken Singh, Partha Pratim Barman, R. Gogoi","doi":"10.1109/ICRIEECE44171.2018.9008668","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9008668","url":null,"abstract":"The work presents a speech recognition model for the Assamese language of the state of Assam of India. We experimented the model on the digits of Assamese language. The Deep Neural Network is used to make the recognition model. The Long Short-Term Memory Network (LSTM), which is a special kind of Recurrent Neural Network composed of Long Short-Term Memory blocks is the primary layer of our neural network model. We also use Mel Frequency Cepstral Coefficients for choosing the speech features. Finally, the accuracy of the model is evaluated based on the recognition rate.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127377503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9008908
Sachin Sharma, Omar Hanif, G. Kumar
DC motors have been employed in domestic and industrial works owing to their tendency of developing a constant torque over wide speed applications. A typical Dc motor has characterizing parameters like inertia of the rotor, friction damping coefficient, winding resistances and inductances. The objective of a controller is to maintain the same speed with a step change in the excitation. Conventionally, Proportional Integral Derivative (PID) controller is widely used in controlling the speed of DC motor. With the use of fractional order calculus in synthesizing fractional order PID (FOPID) controller the quality of the controller and the output is increased. This paper synthesizes a new form of FOPID controller namely complex fractional order PID (CFOPID) through Genetic Algorithm.
{"title":"Speed Control Of D.C. Motor Using GA Tunedfractional Complex Pix+Iyd Controller","authors":"Sachin Sharma, Omar Hanif, G. Kumar","doi":"10.1109/ICRIEECE44171.2018.9008908","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9008908","url":null,"abstract":"DC motors have been employed in domestic and industrial works owing to their tendency of developing a constant torque over wide speed applications. A typical Dc motor has characterizing parameters like inertia of the rotor, friction damping coefficient, winding resistances and inductances. The objective of a controller is to maintain the same speed with a step change in the excitation. Conventionally, Proportional Integral Derivative (PID) controller is widely used in controlling the speed of DC motor. With the use of fractional order calculus in synthesizing fractional order PID (FOPID) controller the quality of the controller and the output is increased. This paper synthesizes a new form of FOPID controller namely complex fractional order PID (CFOPID) through Genetic Algorithm.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126523218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009416
K. Rayudu, P. S. Rao, K. K. Krishna Prasad
FinFET transistors are used in major semiconductor organizations which plays an important role in the development of the silicon industries. Due to few embedded memories and other circuit issues the transistors have specific faults in manufacturing, designing of the circuit etc. This paper presents an advanced test algorithm to diagnose those faults. The circuit with different gates is designed to identify the places having faults. In addition, two different algorithms such as non-incremental computing algorithm and Adaptive Genetic Algorithm algorithms are used to find the fault location and critical path. The transfer characteristics curve is plotted along with the delay curve which helps in finding out the simulation parameters such as noise margin, propagation delay. The results in the methodology calculates the probability density function of the critical path by estimating mean, standard deviation and variance. The advantages of the integration of the two algorithms in this paper helps in analyzing the specific faults in the circuits and the error correction of the broken link in the path analysis and has enhanced performance. Furthermore, more complicated circuits are analyzed for fault detection with different approach
{"title":"Testing and diagnosis faults in FinFet circuits based on advanced test algorithm","authors":"K. Rayudu, P. S. Rao, K. K. Krishna Prasad","doi":"10.1109/ICRIEECE44171.2018.9009416","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009416","url":null,"abstract":"FinFET transistors are used in major semiconductor organizations which plays an important role in the development of the silicon industries. Due to few embedded memories and other circuit issues the transistors have specific faults in manufacturing, designing of the circuit etc. This paper presents an advanced test algorithm to diagnose those faults. The circuit with different gates is designed to identify the places having faults. In addition, two different algorithms such as non-incremental computing algorithm and Adaptive Genetic Algorithm algorithms are used to find the fault location and critical path. The transfer characteristics curve is plotted along with the delay curve which helps in finding out the simulation parameters such as noise margin, propagation delay. The results in the methodology calculates the probability density function of the critical path by estimating mean, standard deviation and variance. The advantages of the integration of the two algorithms in this paper helps in analyzing the specific faults in the circuits and the error correction of the broken link in the path analysis and has enhanced performance. Furthermore, more complicated circuits are analyzed for fault detection with different approach","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130197059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
IOT becomes a revolutionary transformation in our future digital world. Impact of rapid growth and real adaption of IOT touches day by day every ones life. IOT platform where every day a large no of physical objects are connected with others through internet and each objects have a unique identification to other devices. We are gifted from IOT generation as smart cities , smart homes, smart devices, parking sensors, real time medical data prediction in health care application and many mores. But the major concerns of IOT platform are privacy concerns, insecure update, week encryption technique. poor passwords and some UI based vulnerabilities.. We have discussed about Radio Frequency Identification (RFID) under IOT environment where large amount of data are in open communication without proper authentication . Some widely used cryptographic algorithm already have used in IOT platform. For last few years , lots of attention of researcher to optimize size and power consumption of IOT devices which finds an efficient authentication scheme with minimum computational complexity. In this paper we have proposed a Elliptic curve Cryptography based RFID scheme for IOT platform.
{"title":"Implementation Of An Efficient Security Scheme Through Elliptic Curve Cryptography Based Radio-Frequency Identification(RFID) In Context Of Internet Of Things","authors":"Moumita Chakraborty, Bappaditya Jana, Tamoghna Mandal","doi":"10.1109/ICRIEECE44171.2018.9008906","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9008906","url":null,"abstract":"IOT becomes a revolutionary transformation in our future digital world. Impact of rapid growth and real adaption of IOT touches day by day every ones life. IOT platform where every day a large no of physical objects are connected with others through internet and each objects have a unique identification to other devices. We are gifted from IOT generation as smart cities , smart homes, smart devices, parking sensors, real time medical data prediction in health care application and many mores. But the major concerns of IOT platform are privacy concerns, insecure update, week encryption technique. poor passwords and some UI based vulnerabilities.. We have discussed about Radio Frequency Identification (RFID) under IOT environment where large amount of data are in open communication without proper authentication . Some widely used cryptographic algorithm already have used in IOT platform. For last few years , lots of attention of researcher to optimize size and power consumption of IOT devices which finds an efficient authentication scheme with minimum computational complexity. In this paper we have proposed a Elliptic curve Cryptography based RFID scheme for IOT platform.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131342437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009156
V. Kamesh, Nagarjuna Pampana, Mohit Sinha, S. Bandopadhaya
In this paper, a novel audio fingerprint technique with higher matching depth at a reduced computational complexity has been proposed. Any audio clip can be identified from a huge audio collection by its audio fingerprint which contains some unique extractable and perceivable features of it. One of the major concern in the process of identification of a sample audio clip from huge audio collection is the computational complexity involved in it. In proposed technique, peak pairs are chosen from the alternate time bins sorted in the descending order of the amplitude of the spectrogram of the audio file under consideration, as opposed to the sequential selection across consecutive time bins in the decreasing order of their amplitude in the basic methods. This paper also proposes a simple mode based ranking algorithm to provide the user with multiples matches in case of a possible false positive match.
{"title":"Audio Fingerprinting with Higher Matching Depth at Reduced Computational Complexity","authors":"V. Kamesh, Nagarjuna Pampana, Mohit Sinha, S. Bandopadhaya","doi":"10.1109/ICRIEECE44171.2018.9009156","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009156","url":null,"abstract":"In this paper, a novel audio fingerprint technique with higher matching depth at a reduced computational complexity has been proposed. Any audio clip can be identified from a huge audio collection by its audio fingerprint which contains some unique extractable and perceivable features of it. One of the major concern in the process of identification of a sample audio clip from huge audio collection is the computational complexity involved in it. In proposed technique, peak pairs are chosen from the alternate time bins sorted in the descending order of the amplitude of the spectrogram of the audio file under consideration, as opposed to the sequential selection across consecutive time bins in the decreasing order of their amplitude in the basic methods. This paper also proposes a simple mode based ranking algorithm to provide the user with multiples matches in case of a possible false positive match.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123993901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009362
B. Veadesh, S. Ravi, B. Venkatapragadeesh
The System On-Chip (SoC) is where the most extreme innovation is packed into the least possible conceivable space on a single chip. As the systems intricacy increase and will with time as per Moore’s law, several challenges are being faced by the designers such as meeting the scalability of the systems, heterogeneousness of the whole bundle with different library files and coding dialects should be bundled together, synchronizing different clock domains across the systems as different systems use different clocks, de-skewing global and regional signals with high fanout and issues in coupling the systems. In SoC, there is a high complexity due to the inseparability of the computational processes and routing. NoC (Network On-Chip) presents a proficient instrument for routing which overcomes the shortcomings of the traditional buses and interconnects to allow efficient communication across the IP (Intellectual Property) cores in SoC devices. It separates the processing elements and routing elements and allow them to operate independently to great extents. The arbitration schemes, Topology and switching mechanism are important aspects which have direct impact on performance of NoC. In this a paper, a circuit switching based low latency 3D NoC architecture is presented. Here mesh topology is used and there exists a Virtual Connection from any input port to any output port. This architecture mainly consists of Arbiter, Network Interface Module and Crossbar switch which are designed using Verilog HDL and implemented on Microsemi FPGA with Target device MPF300TS_ES1FCG1152I. The results promise a low latency, low resource utilized and high throughput router design.
{"title":"Design and Analysis of an efficient 3D – Network On – Chip (NoC) Router","authors":"B. Veadesh, S. Ravi, B. Venkatapragadeesh","doi":"10.1109/ICRIEECE44171.2018.9009362","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009362","url":null,"abstract":"The System On-Chip (SoC) is where the most extreme innovation is packed into the least possible conceivable space on a single chip. As the systems intricacy increase and will with time as per Moore’s law, several challenges are being faced by the designers such as meeting the scalability of the systems, heterogeneousness of the whole bundle with different library files and coding dialects should be bundled together, synchronizing different clock domains across the systems as different systems use different clocks, de-skewing global and regional signals with high fanout and issues in coupling the systems. In SoC, there is a high complexity due to the inseparability of the computational processes and routing. NoC (Network On-Chip) presents a proficient instrument for routing which overcomes the shortcomings of the traditional buses and interconnects to allow efficient communication across the IP (Intellectual Property) cores in SoC devices. It separates the processing elements and routing elements and allow them to operate independently to great extents. The arbitration schemes, Topology and switching mechanism are important aspects which have direct impact on performance of NoC. In this a paper, a circuit switching based low latency 3D NoC architecture is presented. Here mesh topology is used and there exists a Virtual Connection from any input port to any output port. This architecture mainly consists of Arbiter, Network Interface Module and Crossbar switch which are designed using Verilog HDL and implemented on Microsemi FPGA with Target device MPF300TS_ES1FCG1152I. The results promise a low latency, low resource utilized and high throughput router design.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124577315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009349
S. Rawat, Bhumika Gupta
Segmentation of biomedical images is an essential requirement in image processing for assessment of different medical images i.e. microscopic, MRI and US. It can be a crucial step for decision support or can get the second opinion for medical expert for atypical cases. There are numerous segmentation methods available for different kind of images. An image segmentation method based on hybrid approach using Darwinian particle swarm optimizer and fuzzy C-means is implemented in this work for various medical and multimedia images. In the present work Darwinian particle swarm optimizer tries to solve the problems regarding the segmentation. The proposed method firstly initializes each of the particles present in the swarm with membership value of each pixel belonging to particular centroids with respect to fuzzy C-means and then optimizes the centroids values using Darwinian particle swarm optimizer. An efficient method for segmenting different areas and edges of various images is implemented in this work. For validating the output of proposed algorithm, it is compared with other segmentation techniques i.e FCM and FCM_PSO. Segmentation is evaluated on ground truth using various indexes. Finally, it is observed that the proposed technique turns out to be more consistent on segmenting the different medical and multimedia images.
{"title":"Image Segmentation using FCM-Darwinian Particle Swarm Optimization","authors":"S. Rawat, Bhumika Gupta","doi":"10.1109/ICRIEECE44171.2018.9009349","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009349","url":null,"abstract":"Segmentation of biomedical images is an essential requirement in image processing for assessment of different medical images i.e. microscopic, MRI and US. It can be a crucial step for decision support or can get the second opinion for medical expert for atypical cases. There are numerous segmentation methods available for different kind of images. An image segmentation method based on hybrid approach using Darwinian particle swarm optimizer and fuzzy C-means is implemented in this work for various medical and multimedia images. In the present work Darwinian particle swarm optimizer tries to solve the problems regarding the segmentation. The proposed method firstly initializes each of the particles present in the swarm with membership value of each pixel belonging to particular centroids with respect to fuzzy C-means and then optimizes the centroids values using Darwinian particle swarm optimizer. An efficient method for segmenting different areas and edges of various images is implemented in this work. For validating the output of proposed algorithm, it is compared with other segmentation techniques i.e FCM and FCM_PSO. Segmentation is evaluated on ground truth using various indexes. Finally, it is observed that the proposed technique turns out to be more consistent on segmenting the different medical and multimedia images.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127654927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9008977
S. Swain, Ramakanta Jena, Shaswat Chirantan, P. C. Panda
The Controlled Reactive Power Gives the Desired Optimal flow of Power in the line. The FACTS devices effectively control the flow of Power in the lines. Improvement of voltage profile and minimization of losses are studied here with Optimal and non- Optimal Power Flow. The effectiveness and suitability of UPFC controllers are being discussed and is demonstrated through an Example and is clear that this device has the capability of regulating the flow of power, minimization of power losses.
{"title":"Optimal Power Flow Study Using UPFC","authors":"S. Swain, Ramakanta Jena, Shaswat Chirantan, P. C. Panda","doi":"10.1109/ICRIEECE44171.2018.9008977","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9008977","url":null,"abstract":"The Controlled Reactive Power Gives the Desired Optimal flow of Power in the line. The FACTS devices effectively control the flow of Power in the lines. Improvement of voltage profile and minimization of losses are studied here with Optimal and non- Optimal Power Flow. The effectiveness and suitability of UPFC controllers are being discussed and is demonstrated through an Example and is clear that this device has the capability of regulating the flow of power, minimization of power losses.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127940066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009234
Shaswat Chirantan, Ramakanta Jena, S. Swain, P. C. Panda
Power system stability dilemma demonstrates the effect of generator electro-mechanical oscillations & rotor angle swings on electrical grids.Power System Stabilizers(PSS) is an excitation controller used to damp out the generator electromechanical oscillations & rotor angle swings.But in severe faulted condition PSS cannot damped out the oscillations alone such as in case of a LLL-G fault.So in order to make the system stable by damping generator oscillations & rotor angle swings FACTS controllers(Flexible AC Transmission System) along with PSS are used cumulatively in power system.In this paper,transient stability studies of a two machine long transmission system with PSS(both generic & multi-band type) & SVC(Static Var Compensator) a shunt based FACTS controller for L-G fault & LLL-G fault have been investigated.All the performance analysis have been undergone using MATLAB simulation.
电力系统的稳定性困境反映了发电机机电振荡和转子角度摆动对电网的影响。电力系统稳定器(PSS)是一种用于抑制发电机机电振荡和转子角度摆动的励磁控制器。但在严重的故障情况下，PSS不能单独抑制振荡，例如在LLL-G故障情况下。为了通过阻尼发电机的振动和转子的角度摆动来保证系统的稳定，FACTS控制器(Flexible AC Transmission system)和PSS在电力系统中得到了广泛的应用。本文研究了具有PSS(通用型和多频带型)和SVC(静态无功补偿器)的双机长传动系统的暂态稳定性问题，SVC是一种基于并联的L-G故障和ll - g故障FACTS控制器。所有的性能分析都通过MATLAB仿真完成。
{"title":"Transient Stability Analysis of a Two Machine Long Transmission System with Power System Stabilizer & Static Var Compensator","authors":"Shaswat Chirantan, Ramakanta Jena, S. Swain, P. C. Panda","doi":"10.1109/ICRIEECE44171.2018.9009234","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009234","url":null,"abstract":"Power system stability dilemma demonstrates the effect of generator electro-mechanical oscillations & rotor angle swings on electrical grids.Power System Stabilizers(PSS) is an excitation controller used to damp out the generator electromechanical oscillations & rotor angle swings.But in severe faulted condition PSS cannot damped out the oscillations alone such as in case of a LLL-G fault.So in order to make the system stable by damping generator oscillations & rotor angle swings FACTS controllers(Flexible AC Transmission System) along with PSS are used cumulatively in power system.In this paper,transient stability studies of a two machine long transmission system with PSS(both generic & multi-band type) & SVC(Static Var Compensator) a shunt based FACTS controller for L-G fault & LLL-G fault have been investigated.All the performance analysis have been undergone using MATLAB simulation.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128018793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-01DOI: 10.1109/ICRIEECE44171.2018.9009260
Ramandeep Kaur, Simranjit Singh
In this paper, a symmetric 80Gbps next generation passive optical network (NG-PON) architecture has been presented. To achieve 80Gbps symmetric data rate, eight pairs of wavelengths have been used. Wavelength division multiplexing (WDM) technique is used at the central office (CO) to transmit downstream data. For downstream access, each wavelength is divided into eight parts by 1×8 splitter and the system supports 64 ONUs (Optical network units). All the 64 ONUs transmits their upstream data by sharing eight upstream wavelengths using time wavelength division multiplexing (TWDM). The performance of the system has been assessed in terms of minimum bit error rate (BER) and Q-factor for the varied distance from 10 km to 100 km. From the results, it has been observed that the presented system works well up to 65 km system length.
{"title":"A Time and Wavelength Division Multiplexing based Next Generation Passive Optical Networks Provisioning 80Gbps Symmetrical Access Rate","authors":"Ramandeep Kaur, Simranjit Singh","doi":"10.1109/ICRIEECE44171.2018.9009260","DOIUrl":"https://doi.org/10.1109/ICRIEECE44171.2018.9009260","url":null,"abstract":"In this paper, a symmetric 80Gbps next generation passive optical network (NG-PON) architecture has been presented. To achieve 80Gbps symmetric data rate, eight pairs of wavelengths have been used. Wavelength division multiplexing (WDM) technique is used at the central office (CO) to transmit downstream data. For downstream access, each wavelength is divided into eight parts by 1×8 splitter and the system supports 64 ONUs (Optical network units). All the 64 ONUs transmits their upstream data by sharing eight upstream wavelengths using time wavelength division multiplexing (TWDM). The performance of the system has been assessed in terms of minimum bit error rate (BER) and Q-factor for the varied distance from 10 km to 100 km. From the results, it has been observed that the presented system works well up to 65 km system length.","PeriodicalId":393891,"journal":{"name":"2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128019779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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