Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.582854
L. Milic, M. Lutovac
In this paper, a new design method for IIR digital filters which provides the implementation of a half of multiplication constants with few shifters and adders is proposed. The transfer function is developed from an elliptic minimal Q-factors analog prototype and the realization is based on the parallel connection of two allpass networks. In all second order sections of the parallel branches, the digital filter has one common constant independent of the filter order and transition bandwidth. The value of the constant depends only on the frequency for which the filter attenuation is 3 dB and may be adjusted according to the predetermined number of shift-and-add operations.
{"title":"Design of elliptic IIR filters with a reduced number of shift-and-add operations in multipliers","authors":"L. Milic, M. Lutovac","doi":"10.1109/ICECS.1996.582854","DOIUrl":"https://doi.org/10.1109/ICECS.1996.582854","url":null,"abstract":"In this paper, a new design method for IIR digital filters which provides the implementation of a half of multiplication constants with few shifters and adders is proposed. The transfer function is developed from an elliptic minimal Q-factors analog prototype and the realization is based on the parallel connection of two allpass networks. In all second order sections of the parallel branches, the digital filter has one common constant independent of the filter order and transition bandwidth. The value of the constant depends only on the frequency for which the filter attenuation is 3 dB and may be adjusted according to the predetermined number of shift-and-add operations.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127559977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584526
D. A. Pastos, G. Giannakopoulos, N. Vovos
In this paper a comparison is made between the conventional shunt compensator (Static Var Compensator, SVC) providing only reactive power modulation and the GTO-based advanced compensator (Static Condenser, STATCON) providing both active and reactive power modulation, regarding their effectiveness in damping power oscillations. Based on small purturbation analysis, the damping efficiency in terms of the real power flow change caused by a change of the compensating reactive or real power is calculated and compared. Also, the dependence of the damping on the compensator and load location is investigated.
{"title":"Influence of the real power modulation provided by a shunt compensator on damping power swings","authors":"D. A. Pastos, G. Giannakopoulos, N. Vovos","doi":"10.1109/ICECS.1996.584526","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584526","url":null,"abstract":"In this paper a comparison is made between the conventional shunt compensator (Static Var Compensator, SVC) providing only reactive power modulation and the GTO-based advanced compensator (Static Condenser, STATCON) providing both active and reactive power modulation, regarding their effectiveness in damping power oscillations. Based on small purturbation analysis, the damping efficiency in terms of the real power flow change caused by a change of the compensating reactive or real power is calculated and compared. Also, the dependence of the damping on the compensator and load location is investigated.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"201 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133724432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584540
A. Sartori, M. Gottardi, F. Maloberti, A. Simoni, G. Torelli
The use of CMOS technology allows the monolithic integration of photosensor arrays together with analog-to-digital (A/D) conversion circuits. The structure of the array can be exploited to increase the connectivity between the sensor and the converter, which are in close coupling. Both single-converter per array and multiple-converter per array approaches are therefore possible. This paper presents a comparative study of different A/D conversion architectures incorporated in intelligent optical systems. The presented schemes have been validated by experimental evaluations.
{"title":"Analog-to-digital converters for optical sensor arrays","authors":"A. Sartori, M. Gottardi, F. Maloberti, A. Simoni, G. Torelli","doi":"10.1109/ICECS.1996.584540","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584540","url":null,"abstract":"The use of CMOS technology allows the monolithic integration of photosensor arrays together with analog-to-digital (A/D) conversion circuits. The structure of the array can be exploited to increase the connectivity between the sensor and the converter, which are in close coupling. Both single-converter per array and multiple-converter per array approaches are therefore possible. This paper presents a comparative study of different A/D conversion architectures incorporated in intelligent optical systems. The presented schemes have been validated by experimental evaluations.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128487108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584445
G. Arslan, F. Gürgen, F. A. Sakarya
This study presents an application of a feedforward neural network (NN) structure to the bearing estimation problem. Using N snapshots from M sensors, the NN estimates the sensor-to-sensor propagation delays, which yield the far-field source location. The proposed network has only one output, which is the direction-of-arrival (DOA) angle. Thus, the network does not require any preprocessing. The NN buffers the sensor data, treats them as multidimensional delayed patterns and gives the location of a sinusoidal signal source in a noisy environment as output. Networks with various hidden nodes are tried with various sensor and snapshot numbers to find the best performance network structure. The effect of intersensor spacing on the performance is investigated. Using the best performance giving structure, the network is trained with various signal to noise ratios (SNRs) and then tested for various SNR levels.
{"title":"Application of neural networks to bearing estimation","authors":"G. Arslan, F. Gürgen, F. A. Sakarya","doi":"10.1109/ICECS.1996.584445","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584445","url":null,"abstract":"This study presents an application of a feedforward neural network (NN) structure to the bearing estimation problem. Using N snapshots from M sensors, the NN estimates the sensor-to-sensor propagation delays, which yield the far-field source location. The proposed network has only one output, which is the direction-of-arrival (DOA) angle. Thus, the network does not require any preprocessing. The NN buffers the sensor data, treats them as multidimensional delayed patterns and gives the location of a sinusoidal signal source in a noisy environment as output. Networks with various hidden nodes are tried with various sensor and snapshot numbers to find the best performance network structure. The effect of intersensor spacing on the performance is investigated. Using the best performance giving structure, the network is trained with various signal to noise ratios (SNRs) and then tested for various SNR levels.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131620939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584534
A. Mazurek
In the paper simulation results of the several sampled data integrator structures have been presented. The structure configurations are obtained by the use of a new technique based on switched capacitors and transconductance amplifiers. The transconductance amplifier characteristics are also investigated by the use of SPICE simulator. Presented simulations have confirmed expected results.
{"title":"SC integrators with simple transconductance amplifiers","authors":"A. Mazurek","doi":"10.1109/ICECS.1996.584534","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584534","url":null,"abstract":"In the paper simulation results of the several sampled data integrator structures have been presented. The structure configurations are obtained by the use of a new technique based on switched capacitors and transconductance amplifiers. The transconductance amplifier characteristics are also investigated by the use of SPICE simulator. Presented simulations have confirmed expected results.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134393756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.582857
K. Wawryn, B. Strzeszewski
In this paper novel class AB programmable neuron cell structures that set foundations for low power VLSI neural networks and other applications are proposed. The analog current mode class AB building blocks for sigmoidal characteristic neuron cells and programmable weight synaptic connections are presented and discussed. A qualitative comparison is made between standard and proposed neuron cells.
{"title":"Programmable low power VLSI current mode neuron cells","authors":"K. Wawryn, B. Strzeszewski","doi":"10.1109/ICECS.1996.582857","DOIUrl":"https://doi.org/10.1109/ICECS.1996.582857","url":null,"abstract":"In this paper novel class AB programmable neuron cell structures that set foundations for low power VLSI neural networks and other applications are proposed. The analog current mode class AB building blocks for sigmoidal characteristic neuron cells and programmable weight synaptic connections are presented and discussed. A qualitative comparison is made between standard and proposed neuron cells.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133961397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584629
R. Fried, Z. Azmanov
A low-power Digital PLL (DPLL) with +/-100 ps jitter and one cycle frequency lock-in time is presented. It is used to generate clock frequencies up to 100 MHz using a 32,768 Hz reference clock. The DPLL is especially designed for advanced power management and performance enhancement, both at a chip level and system level.
{"title":"Low-power digital PLL with one cycle frequency lock-in time and large frequency-multiplication factor for advanced power management","authors":"R. Fried, Z. Azmanov","doi":"10.1109/ICECS.1996.584629","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584629","url":null,"abstract":"A low-power Digital PLL (DPLL) with +/-100 ps jitter and one cycle frequency lock-in time is presented. It is used to generate clock frequencies up to 100 MHz using a 32,768 Hz reference clock. The DPLL is especially designed for advanced power management and performance enhancement, both at a chip level and system level.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"128 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113970038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.582655
J. Bormans, S. Vernalde, J. Cornelis, I. Bolsens, H. Man
Region-Oriented Compression (ROC) is a computation intensive emerging technique for very low bitrate image and video coding. The design of a Hilbert fractal codec, a key-component for ROC of color images, is discussed. The implementation efficiency of the codec is critical since it determines the feasibility of the global compression scheme. We discuss the role of the Hilbert fractal codec in the global codec scheme and the high-level design methodology that leads to a successful implementation of the codec design.
{"title":"A Hilbert fractal codec for region oriented compression of color images","authors":"J. Bormans, S. Vernalde, J. Cornelis, I. Bolsens, H. Man","doi":"10.1109/ICECS.1996.582655","DOIUrl":"https://doi.org/10.1109/ICECS.1996.582655","url":null,"abstract":"Region-Oriented Compression (ROC) is a computation intensive emerging technique for very low bitrate image and video coding. The design of a Hilbert fractal codec, a key-component for ROC of color images, is discussed. The implementation efficiency of the codec is critical since it determines the feasibility of the global compression scheme. We discuss the role of the Hilbert fractal codec in the global codec scheme and the high-level design methodology that leads to a successful implementation of the codec design.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"40 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114023450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.584514
C. Chamzas
Adaptive filters find applications in many areas of signal processing and echo cancellation is one of them. It has been observed that, due to non-linearities inherent in the implementation, echo cancelers can diverge when their input is periodic. In this paper we examine the behaviour of adaptive filters in the presence of periodic inputs and provide a theoretical explanation and conditions for a potential exponential divergence.
{"title":"Adaptive filtering and periodic inputs: conditions for an exponential divergence","authors":"C. Chamzas","doi":"10.1109/ICECS.1996.584514","DOIUrl":"https://doi.org/10.1109/ICECS.1996.584514","url":null,"abstract":"Adaptive filters find applications in many areas of signal processing and echo cancellation is one of them. It has been observed that, due to non-linearities inherent in the implementation, echo cancelers can diverge when their input is periodic. In this paper we examine the behaviour of adaptive filters in the presence of periodic inputs and provide a theoretical explanation and conditions for a potential exponential divergence.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122639496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-10-13DOI: 10.1109/ICECS.1996.582772
S. Tsekeridou, Constantine Kotropoulos, L. Pitas
A novel extension of the classical signal-adaptive median filter (SAM) is proposed in this paper. It is the so-called morphological signal-adaptive median filter (MSAM). Two modifications are introduced in the SAM filter aiming at: (1) enhancing SAM impulse detection mechanism so that it detects not only impulses of a constant amplitude but randomly-valued impulses as well, (2) employing an anisotropic window adaptation based on binary morphological erosions/dilations with predefined structuring sets. Performance results are reported by evaluating both objective criteria (e.g. SNR, MAE) and subjective criteria (e.g, the perceived quality of the filtered images). The proposed MSAM filter outperforms the classical SAM filter in all cases.
{"title":"Morphological signal adaptive median filter for noise removal","authors":"S. Tsekeridou, Constantine Kotropoulos, L. Pitas","doi":"10.1109/ICECS.1996.582772","DOIUrl":"https://doi.org/10.1109/ICECS.1996.582772","url":null,"abstract":"A novel extension of the classical signal-adaptive median filter (SAM) is proposed in this paper. It is the so-called morphological signal-adaptive median filter (MSAM). Two modifications are introduced in the SAM filter aiming at: (1) enhancing SAM impulse detection mechanism so that it detects not only impulses of a constant amplitude but randomly-valued impulses as well, (2) employing an anisotropic window adaptation based on binary morphological erosions/dilations with predefined structuring sets. Performance results are reported by evaluating both objective criteria (e.g. SNR, MAE) and subjective criteria (e.g, the perceived quality of the filtered images). The proposed MSAM filter outperforms the classical SAM filter in all cases.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127864198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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