Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558733
V. Schiopu, M. Macrin, I. Cernica
A sol-gel method has been developed to prepare pure yttrium aluminium garnet, Y/sub 3/Al/sub 5/O/sub 12/ (YAG), doped with cerium. The XRD pattern of the powder calcinated at 1100/spl deg/C shows the formation of single phase nanocrystal garnet materials with good performances provide by emission spectra of white light LEDs using these phosphors.
{"title":"Preparation of yttrium aluminum garnet doped with cerium for application in optoelectronics","authors":"V. Schiopu, M. Macrin, I. Cernica","doi":"10.1109/SMICND.2005.1558733","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558733","url":null,"abstract":"A sol-gel method has been developed to prepare pure yttrium aluminium garnet, Y/sub 3/Al/sub 5/O/sub 12/ (YAG), doped with cerium. The XRD pattern of the powder calcinated at 1100/spl deg/C shows the formation of single phase nanocrystal garnet materials with good performances provide by emission spectra of white light LEDs using these phosphors.","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"102 1","pages":"149-152 vol. 1"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75701761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558700
G. Amaratunga, A. S. Teh, S. Cha, G. W. Ho, Jae Eun Jang, Yang Yang, Young Jin Choi, K. Teo, S. Dalal, D J Kang, N. Rupesinghe, William I. Milne, D. Hasko, M. Welland, Jong Min Kim
In this paper we report the use of in-situ grown single wall carbon nanotubes (SWCNTs) from pre-patterned catalyst islands to construct nanotube electronics. The SWCNTs were grown via thermal chemical vapour deposition (CVD) on catalysts islands which were prepared by sputtering, initially, alignment marks are patterned simultaneously with the catalysts islands to enable accurate overlay of contact patterns during the top down fabrication approach for SWCNT devices. The gate transfer characteristics of p-channel SWCNTs are presented. The use of pre-patterned catalyst islands allows control of the SWCNT location required for integrated circuits. Characteristics of ZnO nanowire transistors are also introduced. Very high mobilities are measured in n-channel devices in which the gate is defined in a self aligned manner to have a nanoscale air-gap insulator. The characteristics of the ZnO transistor are comparable to those of achieved from SWCNTs. This raises the possibility of using SWCNTs for p-channel and ZnO nanowires for n-channel in complimentary switching devices.
{"title":"Nanotube and nanowire transistors","authors":"G. Amaratunga, A. S. Teh, S. Cha, G. W. Ho, Jae Eun Jang, Yang Yang, Young Jin Choi, K. Teo, S. Dalal, D J Kang, N. Rupesinghe, William I. Milne, D. Hasko, M. Welland, Jong Min Kim","doi":"10.1109/SMICND.2005.1558700","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558700","url":null,"abstract":"In this paper we report the use of in-situ grown single wall carbon nanotubes (SWCNTs) from pre-patterned catalyst islands to construct nanotube electronics. The SWCNTs were grown via thermal chemical vapour deposition (CVD) on catalysts islands which were prepared by sputtering, initially, alignment marks are patterned simultaneously with the catalysts islands to enable accurate overlay of contact patterns during the top down fabrication approach for SWCNT devices. The gate transfer characteristics of p-channel SWCNTs are presented. The use of pre-patterned catalyst islands allows control of the SWCNT location required for integrated circuits. Characteristics of ZnO nanowire transistors are also introduced. Very high mobilities are measured in n-channel devices in which the gate is defined in a self aligned manner to have a nanoscale air-gap insulator. The characteristics of the ZnO transistor are comparable to those of achieved from SWCNTs. This raises the possibility of using SWCNTs for p-channel and ZnO nanowires for n-channel in complimentary switching devices.","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"15 9 1","pages":"3-8 vol. 1"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82588361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558760
A. Coraci, C. Podaru, E. Manea, A. Ciuciumis, O. Corici
The use of microfluidic devices in biomedical research creates clinically useful technologies and devices (for biochemical reaction chambers, and physical particle separation), or in IC chip cooling applications has significant advantages. In the first case, because the fluid volumes within these microchannels are very small, usually several nanoliters, the amount of reagents and analytes used is quite small. In the second case, they present a negligible thermal resistance, due to direct contact with the chip dissipation surface. This paper presents some new technological methods used to prepare by surface microfabrication microchannels and other microfluidic elements, like chambers onto different substrates.
{"title":"New technological surface microfabrication methods used to obtain microchannels based systems onto various substrates","authors":"A. Coraci, C. Podaru, E. Manea, A. Ciuciumis, O. Corici","doi":"10.1109/SMICND.2005.1558760","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558760","url":null,"abstract":"The use of microfluidic devices in biomedical research creates clinically useful technologies and devices (for biochemical reaction chambers, and physical particle separation), or in IC chip cooling applications has significant advantages. In the first case, because the fluid volumes within these microchannels are very small, usually several nanoliters, the amount of reagents and analytes used is quite small. In the second case, they present a negligible thermal resistance, due to direct contact with the chip dissipation surface. This paper presents some new technological methods used to prepare by surface microfabrication microchannels and other microfluidic elements, like chambers onto different substrates.","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"32 1","pages":"249-252 vol. 1"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87911308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558800
M. Placidi, P. Godignon, N. Mestres, J. Esteve, G. Ferro, A. Leycuras, T. Chassagne
The development of high quality 3C-SiC layers on Si free of residual stress opens the possibility to use SiC for microsystems fabrication and to combine them with Si devices for sensor applications. A new front-side micromachining process technology for 3C-SiC layers on Si resonators has been developed. To show it feasibility several resonator cantilever or bridge test structures of various dimensions have been fabricated. The main advantage of SiC in comparison with Si lies on its higher Young's modulus (almost three times higher), which results in higher resonance frequencies and higher quality factors
{"title":"Fabrication of electrostatic resonators with monocrystalline 3C-SiC grown on silicon","authors":"M. Placidi, P. Godignon, N. Mestres, J. Esteve, G. Ferro, A. Leycuras, T. Chassagne","doi":"10.1109/SMICND.2005.1558800","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558800","url":null,"abstract":"The development of high quality 3C-SiC layers on Si free of residual stress opens the possibility to use SiC for microsystems fabrication and to combine them with Si devices for sensor applications. A new front-side micromachining process technology for 3C-SiC layers on Si resonators has been developed. To show it feasibility several resonator cantilever or bridge test structures of various dimensions have been fabricated. The main advantage of SiC in comparison with Si lies on its higher Young's modulus (almost three times higher), which results in higher resonance frequencies and higher quality factors","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"10 1","pages":"361-364 vol. 2"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74621145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558746
M. Szermer, A. Napieralski
In this paper the PTAT (point to absolute temperature) sensor design in CMOS technology is discussed and presented. Two different structures are described. The first one was implemented together with 12-bit ADC into a test chip. Although this sensor has a small linear region, only up to 60 C, it is fully functional and fulfills all requirements. Nevertheless, that was the reason why the new research was established, and a second structure with wide up to 180 /spl deg/C linear range was developed.
{"title":"The PTAT sensors in CMOS technology","authors":"M. Szermer, A. Napieralski","doi":"10.1109/SMICND.2005.1558746","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558746","url":null,"abstract":"In this paper the PTAT (point to absolute temperature) sensor design in CMOS technology is discussed and presented. Two different structures are described. The first one was implemented together with 12-bit ADC into a test chip. Although this sensor has a small linear region, only up to 60 C, it is fully functional and fulfills all requirements. Nevertheless, that was the reason why the new research was established, and a second structure with wide up to 180 /spl deg/C linear range was developed.","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"147 1","pages":"197-200 vol. 1"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74640739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558791
E. Bodegom, R. Widenhorn, D.A. lordache
The experimental results concerning the temperature dependence of the dark currents in some charge-coupled devices (CCDs) were analyzed. It was found that the used theoretical model allows: (i) the evaluation of the lowest limit of experimental errors (involving the systematic ones), (ii) the study of Meyer-Neldel relations, pointing out the high correlation of diffusion dark currents with the energy-gap Eg, unlike the corresponding weak correlation of depletion dark currents (iii) rather accurate assignments of the obtained values of deep-level traps energies to some specific impurities
{"title":"Interpreting fitting parameters of temperature dependence of dark currents in some CCDs","authors":"E. Bodegom, R. Widenhorn, D.A. lordache","doi":"10.1109/SMICND.2005.1558791","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558791","url":null,"abstract":"The experimental results concerning the temperature dependence of the dark currents in some charge-coupled devices (CCDs) were analyzed. It was found that the used theoretical model allows: (i) the evaluation of the lowest limit of experimental errors (involving the systematic ones), (ii) the study of Meyer-Neldel relations, pointing out the high correlation of diffusion dark currents with the energy-gap Eg, unlike the corresponding weak correlation of depletion dark currents (iii) rather accurate assignments of the obtained values of deep-level traps energies to some specific impurities","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"34 1","pages":"327-330 vol. 2"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89300711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558776
C. Miclea, L. Amarande, C. Tănăsoiu, I. Spanulescu, C. Miclea
Effect of Bi additives on the piezoelectric properties of PT ceramics having the formula (Pb1-3x/2Bix)(Ti0.98Mn0.02)O 3 with x=0.04, 0.06, 0.08 was investigated. The samples were prepared by conventional ceramic technique, using p.a. purity raw materials. The mixed powders were sintered at temperatures between 1050-1300degC. Poling was done in fields of about 70 kV/cm. Density and coupling factors of the samples were determined as a function of sintering temperatures, and doping level. Temperature dependence of the main piezoelectric characteristics was also investigated for temperatures as high as 500degC. A Curie point of 450degC, a low dielectric constant (<140) and a large electromechanical anisotropy (the radial mode is nearly inexistent, at room temperature and the thickness coupling factor is about 0.4) were found. These enhanced properties make such ceramics very attractive for high temperature and high frequency transducers applications
{"title":"Piezoelectric properties of bismuth modified lead titanate ceramics","authors":"C. Miclea, L. Amarande, C. Tănăsoiu, I. Spanulescu, C. Miclea","doi":"10.1109/SMICND.2005.1558776","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558776","url":null,"abstract":"Effect of Bi additives on the piezoelectric properties of PT ceramics having the formula (Pb1-3x/2Bix)(Ti0.98Mn0.02)O 3 with x=0.04, 0.06, 0.08 was investigated. The samples were prepared by conventional ceramic technique, using p.a. purity raw materials. The mixed powders were sintered at temperatures between 1050-1300degC. Poling was done in fields of about 70 kV/cm. Density and coupling factors of the samples were determined as a function of sintering temperatures, and doping level. Temperature dependence of the main piezoelectric characteristics was also investigated for temperatures as high as 500degC. A Curie point of 450degC, a low dielectric constant (<140) and a large electromechanical anisotropy (the radial mode is nearly inexistent, at room temperature and the thickness coupling factor is about 0.4) were found. These enhanced properties make such ceramics very attractive for high temperature and high frequency transducers applications","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"42 1","pages":"271-274 vol. 2"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91310143","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558811
S. Eftimie, A. Rusu
A special characteristic of a MOS transistor is that its drain current has a point somewhere around the threshold voltage where it almost doesn't vary with the temperature. This is called the Zero-TC (ZTC) point. By considering two different types of MOSFET models, a strong inversion and an unified one, it can see that both of them indicated the position of the ZTC point close to the measured one (sec Table 1). As this paper indicates, it is normally to presume that the larger value obtained with the unified model is due to the sub threshold component of the drain current. This is because the strong inversion model does not take it into account. Unlike this model, the unified one considers the drain current as a sum of the diffusion current, preponderant in weak inversion, and the drift current, which governs the strong inversion region. Because the ZTC point is somewhere between these two regions, it is normally to presume that the diffusion current has an influence on it. The paper will answer to this problem and will try to explain the results
{"title":"The influence of diffusion current on the zero-tc point of a MOS transistor","authors":"S. Eftimie, A. Rusu","doi":"10.1109/SMICND.2005.1558811","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558811","url":null,"abstract":"A special characteristic of a MOS transistor is that its drain current has a point somewhere around the threshold voltage where it almost doesn't vary with the temperature. This is called the Zero-TC (ZTC) point. By considering two different types of MOSFET models, a strong inversion and an unified one, it can see that both of them indicated the position of the ZTC point close to the measured one (sec Table 1). As this paper indicates, it is normally to presume that the larger value obtained with the unified model is due to the sub threshold component of the drain current. This is because the strong inversion model does not take it into account. Unlike this model, the unified one considers the drain current as a sum of the diffusion current, preponderant in weak inversion, and the drift current, which governs the strong inversion region. Because the ZTC point is somewhere between these two regions, it is normally to presume that the diffusion current has an influence on it. The paper will answer to this problem and will try to explain the results","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"12 1","pages":"401-404 vol. 2"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87513736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558825
S. Spiridon, F. Op't Eynde
This paper presents the analyses and design of a very high speed 6 bit digital to analog converter intended for high-speed data streaming applications. The DAC is implemented using current switching technique. For eliminating non-monotonicity thermometric coding is used for the first five MSBs. The circuit has differential current outputs. The output voltage is generated externally by the current that the DAC injects into high precision resistors. The circuit operates at only 1.5 V, making it an ideal choice for low-power mobile applications. The circuit exhibits a third order intermodulation (IM3) of about 37 dBc with a full-scale two tone sinusoidal inputs at 150 MHz and 200 MHz. The DAC is fabricated in a 0.13mum in CMOS technology, it occupies 0.3 mm 2 and dissipates less then 7.5 mW
本文介绍了一种用于高速数据流应用的超高速6位数模转换器的分析和设计。该DAC采用电流开关技术实现。为了消除非单调性，对前五个msb使用温度编码。电路有差动电流输出。输出电压由DAC注入高精度电阻的电流在外部产生。该电路工作电压仅为1.5 V，使其成为低功耗移动应用的理想选择。该电路具有约37 dBc的三阶互调(IM3)，并具有150 MHz和200 MHz的满量程双音正弦输入。该DAC采用0.13 μ m CMOS技术制造，占地0.3 mm2，功耗小于7.5 mW
{"title":"A 6 bit resolution, 1 gsamples/sec digital to analog converter","authors":"S. Spiridon, F. Op't Eynde","doi":"10.1109/SMICND.2005.1558825","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558825","url":null,"abstract":"This paper presents the analyses and design of a very high speed 6 bit digital to analog converter intended for high-speed data streaming applications. The DAC is implemented using current switching technique. For eliminating non-monotonicity thermometric coding is used for the first five MSBs. The circuit has differential current outputs. The output voltage is generated externally by the current that the DAC injects into high precision resistors. The circuit operates at only 1.5 V, making it an ideal choice for low-power mobile applications. The circuit exhibits a third order intermodulation (IM3) of about 37 dBc with a full-scale two tone sinusoidal inputs at 150 MHz and 200 MHz. The DAC is fabricated in a 0.13mum in CMOS technology, it occupies 0.3 mm 2 and dissipates less then 7.5 mW","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"26 1","pages":"455-458 vol. 2"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84130819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-12-19DOI: 10.1109/SMICND.2005.1558730
A. Dinescu, G. Conache, R. Gavrila
In order to decrease the dark current of a pn junction photodetector together with improving its photoelectric response, thinning of a silicon wafer can be achieved without losing its mechanical resistance by a special etching process performed on both sides of the wafer. Corrugated microstructures were obtained by photolithographic and anisotropic etching procedures on silicon wafers meant to be used in photodetecting devices and optical measurements were performed.
{"title":"Corrugated microstructures for silicon photodetectors","authors":"A. Dinescu, G. Conache, R. Gavrila","doi":"10.1109/SMICND.2005.1558730","DOIUrl":"https://doi.org/10.1109/SMICND.2005.1558730","url":null,"abstract":"In order to decrease the dark current of a pn junction photodetector together with improving its photoelectric response, thinning of a silicon wafer can be achieved without losing its mechanical resistance by a special etching process performed on both sides of the wafer. Corrugated microstructures were obtained by photolithographic and anisotropic etching procedures on silicon wafers meant to be used in photodetecting devices and optical measurements were performed.","PeriodicalId":40779,"journal":{"name":"Teatro e Storia","volume":"1 1","pages":"137-140 vol. 1"},"PeriodicalIF":0.1,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88693957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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