Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2010.2042056
A. A. Adoni, A. Ambirajan, V. Jasvanth, D. Kumar, P. Dutta
An ammonia loop heat pipe (LHP) with a flat plate evaporator is developed and tested. The device uses a nickel wick encased in an aluminum-stainless steel casing. The loop is tested for various heat loads and different sink temperatures, and it demonstrated reliable startup characteristics. Results with the analysis of the experimental observation indicate that the conductance between the compensation chamber and the heater plate can significantly influence the operating temperatures of the LHP. A mathematical model is also presented which is validated against the experimental observations.
{"title":"Theoretical and Experimental Studies on an Ammonia-Based Loop Heat Pipe With a Flat Evaporator","authors":"A. A. Adoni, A. Ambirajan, V. Jasvanth, D. Kumar, P. Dutta","doi":"10.1109/TCAPT.2010.2042056","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2042056","url":null,"abstract":"An ammonia loop heat pipe (LHP) with a flat plate evaporator is developed and tested. The device uses a nickel wick encased in an aluminum-stainless steel casing. The loop is tested for various heat loads and different sink temperatures, and it demonstrated reliable startup characteristics. Results with the analysis of the experimental observation indicate that the conductance between the compensation chamber and the heater plate can significantly influence the operating temperatures of the LHP. A mathematical model is also presented which is validated against the experimental observations.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"478-487"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2042056","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2033665
S. Singha, M. J. Thomas
In recent times, there has been an ever-growing need for polymer-based multifunctional materials for electronic packaging applications. In this direction, epoxy-Al2O3 nanocomposites at low filler loadings can provide an excellent material option, especially from the point of view of their dielectric properties. This paper reports the dielectric characteristics for such a system, results of which are observed to be interesting, unique, and advantageous as compared to traditionally used microcomposite systems. Nanocomposites are found to display lower values of permittivity/tan delta over a wide frequency range as compared to that of unfilled epoxy. This surprising observation has been attributed to the interaction between the epoxy chains and the nanoparticles, and in this paper this phenomenon is analyzed using a dual layer interface model reported for polymer nanocomposites. As for the other dielectric properties associated with the nanocomposites, the nano-filler loading seems to have a significant effect. The dc resistivity and ac dielectric strength of the nanocomposites were observed to be lower than that of the unfilled epoxy system at the investigated filler loadings, whereas the electrical discharge resistant properties showed a significant enhancement. Further analysis of the results obtained in this paper shows that the morphology of the interface region and its characteristics decide the observed interesting dielectric behaviors.
{"title":"Dielectric Properties of Epoxy-${rm Al}_{2}{rm O}_{3}$ Nanocomposite System for Packaging Applications","authors":"S. Singha, M. J. Thomas","doi":"10.1109/TCAPT.2009.2033665","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2033665","url":null,"abstract":"In recent times, there has been an ever-growing need for polymer-based multifunctional materials for electronic packaging applications. In this direction, epoxy-Al2O3 nanocomposites at low filler loadings can provide an excellent material option, especially from the point of view of their dielectric properties. This paper reports the dielectric characteristics for such a system, results of which are observed to be interesting, unique, and advantageous as compared to traditionally used microcomposite systems. Nanocomposites are found to display lower values of permittivity/tan delta over a wide frequency range as compared to that of unfilled epoxy. This surprising observation has been attributed to the interaction between the epoxy chains and the nanoparticles, and in this paper this phenomenon is analyzed using a dual layer interface model reported for polymer nanocomposites. As for the other dielectric properties associated with the nanocomposites, the nano-filler loading seems to have a significant effect. The dc resistivity and ac dielectric strength of the nanocomposites were observed to be lower than that of the unfilled epoxy system at the investigated filler loadings, whereas the electrical discharge resistant properties showed a significant enhancement. Further analysis of the results obtained in this paper shows that the morphology of the interface region and its characteristics decide the observed interesting dielectric behaviors.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"373-385"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2033665","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2010.2043843
E. Sadeghi, M. Bahrami, N. Djilali
Thermal spreading/constriction resistance is an important phenomenon where a heat source/sink is in contact with a body. Thermal spreading resistance associated with heat transfer through the mechanical contact of two bodies occurs in a wide range of applications. The real contact area forms typically a few percent of the nominal contact area. In practice, due to random nature of contacting surfaces, the actual shape of microcontacts is unknown; therefore, it is advantageous to have a model applicable to any arbitrary-shape heat source. Starting from a half-space representation of the heat transfer problem, a compact model is proposed based on the generalization of the analytical solution of the spreading resistance of an elliptical source on a half-space. Using a “bottom-up” approach, unified relations are found that allow accurate calculation of spreading resistance over a wide variety of heat source shapes under both isoflux and isothermal conditions.
{"title":"Thermal Spreading Resistance of Arbitrary-Shape Heat Sources on a Half-Space: A Unified Approach","authors":"E. Sadeghi, M. Bahrami, N. Djilali","doi":"10.1109/TCAPT.2010.2043843","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2043843","url":null,"abstract":"Thermal spreading/constriction resistance is an important phenomenon where a heat source/sink is in contact with a body. Thermal spreading resistance associated with heat transfer through the mechanical contact of two bodies occurs in a wide range of applications. The real contact area forms typically a few percent of the nominal contact area. In practice, due to random nature of contacting surfaces, the actual shape of microcontacts is unknown; therefore, it is advantageous to have a model applicable to any arbitrary-shape heat source. Starting from a half-space representation of the heat transfer problem, a compact model is proposed based on the generalization of the analytical solution of the spreading resistance of an elliptical source on a half-space. Using a “bottom-up” approach, unified relations are found that allow accurate calculation of spreading resistance over a wide variety of heat source shapes under both isoflux and isothermal conditions.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"267-277"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2043843","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2031680
D. Wakuda, Keun-Soo Kim, K. Suganuma
Time-dependent sintering properties of an Ag nanoparticle paste for room temperature bonding were investigated. Ag nanoparticle paste with a small amount of dodecylamine dispersant can sinter at room temperature by the evaporation of toluene solvent. When the solvent evaporates, sintering with neck growth and the coalescence of particles is initiated within half an hour and the Ag grain continues to grow gradually for hours. Furthermore, a time-dependent change in the shear strength is demonstrated using a bonding test with Cu plates at room temperature. Bonding between the Ag paste and a Cu plate is favorable and fracturing occurs within the sintered Ag body. The strength of sintered Ag increases with sintering time due to neck growth and the coalescence of particles. The shear strength is more than 8 MPa after 6 h and 12 h of drying.
{"title":"Ag Nanoparticle Paste Synthesis for Room Temperature Bonding","authors":"D. Wakuda, Keun-Soo Kim, K. Suganuma","doi":"10.1109/TCAPT.2009.2031680","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2031680","url":null,"abstract":"Time-dependent sintering properties of an Ag nanoparticle paste for room temperature bonding were investigated. Ag nanoparticle paste with a small amount of dodecylamine dispersant can sinter at room temperature by the evaporation of toluene solvent. When the solvent evaporates, sintering with neck growth and the coalescence of particles is initiated within half an hour and the Ag grain continues to grow gradually for hours. Furthermore, a time-dependent change in the shear strength is demonstrated using a bonding test with Cu plates at room temperature. Bonding between the Ag paste and a Cu plate is favorable and fracturing occurs within the sintered Ag body. The strength of sintered Ag increases with sintering time due to neck growth and the coalescence of particles. The shear strength is more than 8 MPa after 6 h and 12 h of drying.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"437-442"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2031680","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2039934
M. Hodes
The geometry of the semiconductor pellets (i.e., the number of them and their height) within thermoelectric modules (TEMs) operating in generation mode is optimized in order to maximize either their performance (i.e., output power) or their conversion efficiency for a specified performance. This is accomplished for a specified resistive load on a TEM as a function of its effective footprint, i.e., sum of the cross-sectional areas of its pellets. The load resistances which maximize performance or efficiency when pellet geometry is specified are also provided. The analyses are performed in the absence and then presence of electrical contact resistance at the interconnects between pellets. They apply for a prescribed temperature difference across a TEM that is small enough for the properties of its pellets to be considered constant. Examples illustrate the application and implications of the results.
{"title":"Optimal Pellet Geometries for Thermoelectric Power Generation","authors":"M. Hodes","doi":"10.1109/TCAPT.2009.2039934","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2039934","url":null,"abstract":"The geometry of the semiconductor pellets (i.e., the number of them and their height) within thermoelectric modules (TEMs) operating in generation mode is optimized in order to maximize either their performance (i.e., output power) or their conversion efficiency for a specified performance. This is accomplished for a specified resistive load on a TEM as a function of its effective footprint, i.e., sum of the cross-sectional areas of its pellets. The load resistances which maximize performance or efficiency when pellet geometry is specified are also provided. The analyses are performed in the absence and then presence of electrical contact resistance at the interconnects between pellets. They apply for a prescribed temperature difference across a TEM that is small enough for the properties of its pellets to be considered constant. Examples illustrate the application and implications of the results.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"307-318"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2039934","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2031632
J. Swingler, L. Lam, J. McBride
The study of fretting and the associated corrosion has always been a key focus for many researchers involved in the field of electrical contacts. This phenomenon usually occurs when subjecting contacts to thermal cycling or vibration. Often, it is also the direct cause for failure in electrical connector systems and eventually leads to undesirable consequences in numerous applications. With an increasing interest invested in developing new contact materials, conducting polymers are explored as possible alternatives to improve reliability by reducing the influence of fretting degradation. In this paper, the intrinsically conducting polymers (ICPs) used in the experiments are poly(3,4-ethylenedioxythiopene)/poly(4-styrenesulfonate) and its blends with different weight ratios of dimethylformamide. They have conductivity levels reaching the order of 10-2S·cm-1 and possess easy processing capabilities. Contact samples are fabricated by spin-coating or drop-coating ICP onto copper surfaces to form conducting polymer contact interfaces. These samples are then placed in two different types of fretting apparatus and tested independently using the thermal cycling and vibration procedures. Field vehicles tests are also conducted. The initial experimental results reveal that the resistance decreases as temperature and the number of fretting cycles increase. Furthermore, for the same polymer blend, the type of coating technique and the coating thickness also affect the output resistance.
{"title":"Study of Temperature Change and Vibration Induced Fretting on Intrinsically Conducting Polymer Contact Systems","authors":"J. Swingler, L. Lam, J. McBride","doi":"10.1109/TCAPT.2009.2031632","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2031632","url":null,"abstract":"The study of fretting and the associated corrosion has always been a key focus for many researchers involved in the field of electrical contacts. This phenomenon usually occurs when subjecting contacts to thermal cycling or vibration. Often, it is also the direct cause for failure in electrical connector systems and eventually leads to undesirable consequences in numerous applications. With an increasing interest invested in developing new contact materials, conducting polymers are explored as possible alternatives to improve reliability by reducing the influence of fretting degradation. In this paper, the intrinsically conducting polymers (ICPs) used in the experiments are poly(3,4-ethylenedioxythiopene)/poly(4-styrenesulfonate) and its blends with different weight ratios of dimethylformamide. They have conductivity levels reaching the order of 10-2S·cm-1 and possess easy processing capabilities. Contact samples are fabricated by spin-coating or drop-coating ICP onto copper surfaces to form conducting polymer contact interfaces. These samples are then placed in two different types of fretting apparatus and tested independently using the thermal cycling and vibration procedures. Field vehicles tests are also conducted. The initial experimental results reveal that the resistance decreases as temperature and the number of fretting cycles increase. Furthermore, for the same polymer blend, the type of coating technique and the coating thickness also affect the output resistance.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"409-415"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2031632","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2033666
K. Yamanaka, Kaoru Kobayashi, Katsura Hayashi, M. Fukui
Flip-chip bonding on organic sequential buildup substrate technology has been an essential part of semiconductor packaging. In the quest for an ever higher semiconductor performance, there has been a rapidly increasing need for a finer pitch area array of flip-chip joints. However, the pitch has been limited by packaging technology. An advanced buildup substrate for fine pitch flip-chip bonding has been developed to satisfy the requirements for the most advanced semiconductor devices. The advanced substrate features a low-coefficient of thermal expansion (CTE) of 3 ppm°C, a fine pattern of 8 μm in line width and spacing, micro-vias of 25 μm in diameter, and plated through-holes of 100 μm in pitch. These features accommodate the density of a chip I/O of 104 cm-2, which is about ten times greater than that achieved in current organic packaging, and enable significant size reduction of semiconductor chips and the associated packages. The low-CTE significantly reduces the strain in the solder joints during the reflow process and ensures the solder joint reliability. This paper describes recent progress in the development of the advanced substrate technology as well as the technical difficulties.
{"title":"Materials, Processes, and Performance of High-Wiring Density Buildup Substrate With Ultralow-Coefficient of Thermal Expansion","authors":"K. Yamanaka, Kaoru Kobayashi, Katsura Hayashi, M. Fukui","doi":"10.1109/TCAPT.2009.2033666","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2033666","url":null,"abstract":"Flip-chip bonding on organic sequential buildup substrate technology has been an essential part of semiconductor packaging. In the quest for an ever higher semiconductor performance, there has been a rapidly increasing need for a finer pitch area array of flip-chip joints. However, the pitch has been limited by packaging technology. An advanced buildup substrate for fine pitch flip-chip bonding has been developed to satisfy the requirements for the most advanced semiconductor devices. The advanced substrate features a low-coefficient of thermal expansion (CTE) of 3 ppm°C, a fine pattern of 8 μm in line width and spacing, micro-vias of 25 μm in diameter, and plated through-holes of 100 μm in pitch. These features accommodate the density of a chip I/O of 104 cm-2, which is about ten times greater than that achieved in current organic packaging, and enable significant size reduction of semiconductor chips and the associated packages. The low-CTE significantly reduces the strain in the solder joints during the reflow process and ensures the solder joint reliability. This paper describes recent progress in the development of the advanced substrate technology as well as the technical difficulties.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"453-461"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2033666","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2009.2038991
Pin J. Wang, Chu-Hsuan Sha, Chin C. Lee
A fluxless bonding process is successfully developed between silicon (Si) chips and copper (Cu) substrates using the silver-indium (Ag-In) binary system. This is a new design concept that utilizes thick Ag plated over the Cu substrate to deal with the large mismatch in coefficient of thermal expansion between semiconductors, such as Si (3 ppm/°C) and Cu (17 ppm/°C). The Ag layer actually becomes a part of the Ag-Cu substrate. Ag is chosen for the cladding because of its superior physical properties of ductility, high electrical conductivity, and high thermal conductivity. Following the thick Ag layer, 5 μm In and 0.1 μm Ag layers are plated. The thin outer Ag layer inhibits oxidation of inner In. After many bonding experiments, we realize that the success of producing a joint relates to the microstructure of the Ag layer. Ag with small grains results in rapid growth of solid Ag2In intermetallic compounds through grain boundary diffusion. Thus, a joint is not obtained because of lack of molten phase (L). To coarsen Ag grains, an annealing step is added to the Ag-plated Cu substrate. This step makes Ag grains 200 times coarser compared to the as-plated Ag. The coarsened microstructure slows down the Ag2In growth. Consequently, the (L) phase stays at the molten state with sufficient time to react with the Ag layer on the Si chip to produce a joint. Nearly perfect joints are produced on Ag-plated Cu substrates. The resulting joints consist of pure Ag, Ag-rich solid solution, Ag2In, and Ag3In. The melting temperature exceeds 650 °C. Using the present process, high temperature joints of high thermal conductivity are made between Si chips and Cu substrates at low bonding temperature (200°C). We foresee the Ag-In system as an important system to explore for various fluxless bonding applications in electronic packaging. This system provides the possibilities of producing joints of wide composition choices and wide melting temperature range. This paper provides preliminary but useful information on how the microstructure of Ag affects the bonding results.
{"title":"Silver Microstructure Control for Fluxless Bonding Success Using Ag-In System","authors":"Pin J. Wang, Chu-Hsuan Sha, Chin C. Lee","doi":"10.1109/TCAPT.2009.2038991","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2038991","url":null,"abstract":"A fluxless bonding process is successfully developed between silicon (Si) chips and copper (Cu) substrates using the silver-indium (Ag-In) binary system. This is a new design concept that utilizes thick Ag plated over the Cu substrate to deal with the large mismatch in coefficient of thermal expansion between semiconductors, such as Si (3 ppm/°C) and Cu (17 ppm/°C). The Ag layer actually becomes a part of the Ag-Cu substrate. Ag is chosen for the cladding because of its superior physical properties of ductility, high electrical conductivity, and high thermal conductivity. Following the thick Ag layer, 5 μm In and 0.1 μm Ag layers are plated. The thin outer Ag layer inhibits oxidation of inner In. After many bonding experiments, we realize that the success of producing a joint relates to the microstructure of the Ag layer. Ag with small grains results in rapid growth of solid Ag2In intermetallic compounds through grain boundary diffusion. Thus, a joint is not obtained because of lack of molten phase (L). To coarsen Ag grains, an annealing step is added to the Ag-plated Cu substrate. This step makes Ag grains 200 times coarser compared to the as-plated Ag. The coarsened microstructure slows down the Ag2In growth. Consequently, the (L) phase stays at the molten state with sufficient time to react with the Ag layer on the Si chip to produce a joint. Nearly perfect joints are produced on Ag-plated Cu substrates. The resulting joints consist of pure Ag, Ag-rich solid solution, Ag2In, and Ag3In. The melting temperature exceeds 650 °C. Using the present process, high temperature joints of high thermal conductivity are made between Si chips and Cu substrates at low bonding temperature (200°C). We foresee the Ag-In system as an important system to explore for various fluxless bonding applications in electronic packaging. This system provides the possibilities of producing joints of wide composition choices and wide melting temperature range. This paper provides preliminary but useful information on how the microstructure of Ag affects the bonding results.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"462-469"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2038991","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/TCAPT.2010.2047018
D. Shin, Young-hee Song, J. Im
The characteristics of interfacial adhesion between epoxy molding compound (EMC) and printed circuit board (PCB) were investigated. The surface conditions of solder resist (SR) layers, which were used as an outer skin of PCB, were varied within the range that would be encountered in the manufacturing process and reliability test conditions. First, the number of times of plasma treatment on the SR surfaces and the delay time prior to EMC molding on them were considered to examine the surface cleaning process and the aging effect, respectively, on adhesion. Second, moisture on the surfaces of PCB prior to EMC molding and moisture absorption and desorption at the interface were considered to investigate the environmental effect on adhesion. An unsymmetric double cantilever beam test method was devised by modifying the conventional symmetrical double cantilever beam. As a result, the phase angle of fracture could be controlled to achieve stable crack propagation along the desired interface, which enabled valid adhesion energy to be measured. The adhesion energy increased with plasma treatment by over 50%, from 55 to 86 J/m2. The improved adhesion was attributed to the increased the polar groups on the SR surface due to plasma treatment, which helped enhanced chemical bonding between the EMC resin and the SR resin. However, excessive plasma was counterproductive as it weakened the SR surface and caused cohesive crack propagation to occur within the SR layer. Adhesion remained nearly constant for delay time up to several hours between plasma treatment and EMC molding. However, small degradation of adhesion was observed when the delay time was extended to 12 h. Moisture on and in the SR material before EMC molding had a significant effect on adhesion. Absorbed moisture at the interface decreased the adhesion. However, when the moisture was baked out, adhesion was recovered almost to the original reference.
{"title":"Effect of PCB Surface Modifications on the EMC-to-PCB Adhesion in Electronic Packages","authors":"D. Shin, Young-hee Song, J. Im","doi":"10.1109/TCAPT.2010.2047018","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2047018","url":null,"abstract":"The characteristics of interfacial adhesion between epoxy molding compound (EMC) and printed circuit board (PCB) were investigated. The surface conditions of solder resist (SR) layers, which were used as an outer skin of PCB, were varied within the range that would be encountered in the manufacturing process and reliability test conditions. First, the number of times of plasma treatment on the SR surfaces and the delay time prior to EMC molding on them were considered to examine the surface cleaning process and the aging effect, respectively, on adhesion. Second, moisture on the surfaces of PCB prior to EMC molding and moisture absorption and desorption at the interface were considered to investigate the environmental effect on adhesion. An unsymmetric double cantilever beam test method was devised by modifying the conventional symmetrical double cantilever beam. As a result, the phase angle of fracture could be controlled to achieve stable crack propagation along the desired interface, which enabled valid adhesion energy to be measured. The adhesion energy increased with plasma treatment by over 50%, from 55 to 86 J/m2. The improved adhesion was attributed to the increased the polar groups on the SR surface due to plasma treatment, which helped enhanced chemical bonding between the EMC resin and the SR resin. However, excessive plasma was counterproductive as it weakened the SR surface and caused cohesive crack propagation to occur within the SR layer. Adhesion remained nearly constant for delay time up to several hours between plasma treatment and EMC molding. However, small degradation of adhesion was observed when the delay time was extended to 12 h. Moisture on and in the SR material before EMC molding had a significant effect on adhesion. Absorbed moisture at the interface decreased the adhesion. However, when the moisture was baked out, adhesion was recovered almost to the original reference.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"498-508"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2047018","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-18DOI: 10.1109/TCAPT.2010.2044505
I. Tari, F. Yalcin
A notebook computer thermal management system is analyzed using a commercial computational fluid dynamics software package (ANSYS Fluent). The active and passive paths that are used for heat dissipation are examined for different steady state operating conditions. For each case, average and hot-spot temperatures of the components are compared with the maximum allowable operating temperatures. It is observed that when low heat dissipation components are put on the same passive path, the increased heat load of the path may cause unexpected hot spot temperatures. A hard disk drive is especially susceptible to overheating and the keyboard surface may reach ergonomically undesirable temperatures. Based on the analysis results and observations, a new component arrangement considering passive paths and using the back side of the liquid crystal display screen is proposed and a simple correlation based thermal analysis of the proposed system is presented. It is demonstrated for the considered 16.1 in notebook and for a standard A4 paper sized notebook that placing the computer processing unit, the motherboard, and the memory on the lid creates enough surface area for passive cooling.
{"title":"CFD Analyses of a Notebook Computer Thermal Management System and a Proposed Passive Cooling Alternative","authors":"I. Tari, F. Yalcin","doi":"10.1109/TCAPT.2010.2044505","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2044505","url":null,"abstract":"A notebook computer thermal management system is analyzed using a commercial computational fluid dynamics software package (ANSYS Fluent). The active and passive paths that are used for heat dissipation are examined for different steady state operating conditions. For each case, average and hot-spot temperatures of the components are compared with the maximum allowable operating temperatures. It is observed that when low heat dissipation components are put on the same passive path, the increased heat load of the path may cause unexpected hot spot temperatures. A hard disk drive is especially susceptible to overheating and the keyboard surface may reach ergonomically undesirable temperatures. Based on the analysis results and observations, a new component arrangement considering passive paths and using the back side of the liquid crystal display screen is proposed and a simple correlation based thermal analysis of the proposed system is presented. It is demonstrated for the considered 16.1 in notebook and for a standard A4 paper sized notebook that placing the computer processing unit, the motherboard, and the memory on the lid creates enough surface area for passive cooling.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"32 1","pages":"443-452"},"PeriodicalIF":0.0,"publicationDate":"2010-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2044505","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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