Pub Date : 2010-09-27DOI: 10.1109/TCAPT.2010.2050888
P. An, P. Kohl
The thermal stress induced by the coefficient of thermal expansion mismatch between a silicon integrated circuit and an organic substrate is an important reliability issue for chip-to-substrate connections. Copper pillar chip-to-substrate connections, including solder-capped and all-copper pillars, are potential replacements for solder balls with underfill in flip-chip applications. The thermal stresses associated with copper pillar connections are a function of the shape, dimensions, and materials for copper pillars and their associated chip and substrate terminations. In this paper, the design of the copper pillar, chip-to-substrate connections has been studied using finite element analysis. A 3-D, half generalized plane deformation slice model is used to study the static thermal stress at elevated temperature. The design parameters include the shape and material of the pads at the terminus of the copper pillars and the nature of supporting collar around the pillar. The modeling results show that a chip-pad helps to lower the maximum thermal stress within the silicon die. Moreover, a supporting collar around the copper pillars serves to decrease the maximum thermal stress on the silicon die. A high-modulus polymer collar around the copper pillar serves to lower the stress at the pillar-to-chip-pad junction and increase the stress within the center of the pillar. The maximum thermal stress within the die was lowered from 160 MPa to 100 MPa by increasing the elastic modulus of the collar from 1.2 GPa to 11.8 GPa.
{"title":"Thermal-Mechanical Stress Modeling of Copper Chip-to-Substrate Pillar Connections","authors":"P. An, P. Kohl","doi":"10.1109/TCAPT.2010.2050888","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2050888","url":null,"abstract":"The thermal stress induced by the coefficient of thermal expansion mismatch between a silicon integrated circuit and an organic substrate is an important reliability issue for chip-to-substrate connections. Copper pillar chip-to-substrate connections, including solder-capped and all-copper pillars, are potential replacements for solder balls with underfill in flip-chip applications. The thermal stresses associated with copper pillar connections are a function of the shape, dimensions, and materials for copper pillars and their associated chip and substrate terminations. In this paper, the design of the copper pillar, chip-to-substrate connections has been studied using finite element analysis. A 3-D, half generalized plane deformation slice model is used to study the static thermal stress at elevated temperature. The design parameters include the shape and material of the pads at the terminus of the copper pillars and the nature of supporting collar around the pillar. The modeling results show that a chip-pad helps to lower the maximum thermal stress within the silicon die. Moreover, a supporting collar around the copper pillars serves to decrease the maximum thermal stress on the silicon die. A high-modulus polymer collar around the copper pillar serves to lower the stress at the pillar-to-chip-pad junction and increase the stress within the center of the pillar. The maximum thermal stress within the die was lowered from 160 MPa to 100 MPa by increasing the elastic modulus of the collar from 1.2 GPa to 11.8 GPa.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"621-628"},"PeriodicalIF":0.0,"publicationDate":"2010-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2050888","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-09-27DOI: 10.1109/TCAPT.2010.2049202
A. Raghupathy, U. Ghia, K. Ghia, William Maltz
The objective of the current work is to introduce the concept of boundary-condition-independent (BCI) reduced-order modeling (ROM) for complex electronic packages by employing the proper orthogonal decomposition (POD)-Galerkin methodology. Detailed models of complex electronic packages that consume large computational resources are used within system-level models in computational fluid dynamics (CFD)-based heat transfer analysis. If a package-level model that reduces computational resources (reduced-order model) and provides accurate results in many different flow situations (boundary-condition-independent model) can be deployed, it will accelerate the design and analysis of the end products that make use of these packages. This paper focuses on how the proper orthogonal decomposition-Galerkin methodology can be used with the finite volume method (FVM) to generate reduced-order models that are boundary-condition-independent. This method is successfully used in the present study to generate boundary-condition-independent reduced-order models for 1-D and 2-D objects for isothermal and isoflux boundary conditions. Successful implementation of the method is also shown on 2-D objects made of multiple materials and multiple heat generating sources for isoflux boundary conditions.
{"title":"Boundary-Condition-Independent Reduced-Order Modeling of Complex Electronic Packages by POD-Galerkin Methodology","authors":"A. Raghupathy, U. Ghia, K. Ghia, William Maltz","doi":"10.1109/TCAPT.2010.2049202","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2049202","url":null,"abstract":"The objective of the current work is to introduce the concept of boundary-condition-independent (BCI) reduced-order modeling (ROM) for complex electronic packages by employing the proper orthogonal decomposition (POD)-Galerkin methodology. Detailed models of complex electronic packages that consume large computational resources are used within system-level models in computational fluid dynamics (CFD)-based heat transfer analysis. If a package-level model that reduces computational resources (reduced-order model) and provides accurate results in many different flow situations (boundary-condition-independent model) can be deployed, it will accelerate the design and analysis of the end products that make use of these packages. This paper focuses on how the proper orthogonal decomposition-Galerkin methodology can be used with the finite volume method (FVM) to generate reduced-order models that are boundary-condition-independent. This method is successfully used in the present study to generate boundary-condition-independent reduced-order models for 1-D and 2-D objects for isothermal and isoflux boundary conditions. Successful implementation of the method is also shown on 2-D objects made of multiple materials and multiple heat generating sources for isoflux boundary conditions.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"588-596"},"PeriodicalIF":0.0,"publicationDate":"2010-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2049202","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-09-27DOI: 10.1109/TCAPT.2010.2050887
M. Tamin, F. M. Nor, W. K. Loh
Damage-based models for solder/intermetallics (IMC) interface often require the interface properties such as tensile and shear strengths. The minute size of the solder joint renders direct experimental determination of these properties impractical. This paper presents a hybrid experimental-computational approach to determine the shear strength of solder/IMC interface. Displacement-controlled ball shear tests are performed on as-reflowed and thermally-aged solder specimens. The observed sudden load drop in the load-displacement curve corresponds to the crack initiation event and the load is indicative of the shear strength of the solder/IMC interface. Finite element simulation of the ball shear test is then employed to establish the complex stress states at the interface corresponding to the onset of fracture. The finite element model consists of Sn40Pb solder, Ni3Sn4 intermetallic and Ni layers, copper pad and a rigid shear tool. Unified inelastic strain theory describes the strain rate-dependent response of the solder while other materials are assumed to behave elastically. Quasi-static ball shear test is simulated at 30°C with a prescribed displacement rate of 0.5mm/min. Results show that steep stress gradients develop in the shear tool-solder contact and solder/IMC interface regions indicating effective load transfer to the interface. The bending (normal) stress is found to be of the same order of magnitude as the maximum shear stress. Higher stress values are predicted near the leading edge of the solder/IMC interface. The equivalent shear stress condition to the triaxial stress state at the interface, represented by the absolute maximum shear stress, τmax,abs should have reached the shear strength of the interface at fracture. The resulting shear strength of Sn40Pb/Ni3Sn4 interface is determined to be 87.5 MPa.
{"title":"Hybrid Experimental-Computational Approach for Solder/IMC Interface Shear Strength Determination in Solder Joints","authors":"M. Tamin, F. M. Nor, W. K. Loh","doi":"10.1109/TCAPT.2010.2050887","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2050887","url":null,"abstract":"Damage-based models for solder/intermetallics (IMC) interface often require the interface properties such as tensile and shear strengths. The minute size of the solder joint renders direct experimental determination of these properties impractical. This paper presents a hybrid experimental-computational approach to determine the shear strength of solder/IMC interface. Displacement-controlled ball shear tests are performed on as-reflowed and thermally-aged solder specimens. The observed sudden load drop in the load-displacement curve corresponds to the crack initiation event and the load is indicative of the shear strength of the solder/IMC interface. Finite element simulation of the ball shear test is then employed to establish the complex stress states at the interface corresponding to the onset of fracture. The finite element model consists of Sn40Pb solder, Ni3Sn4 intermetallic and Ni layers, copper pad and a rigid shear tool. Unified inelastic strain theory describes the strain rate-dependent response of the solder while other materials are assumed to behave elastically. Quasi-static ball shear test is simulated at 30°C with a prescribed displacement rate of 0.5mm/min. Results show that steep stress gradients develop in the shear tool-solder contact and solder/IMC interface regions indicating effective load transfer to the interface. The bending (normal) stress is found to be of the same order of magnitude as the maximum shear stress. Higher stress values are predicted near the leading edge of the solder/IMC interface. The equivalent shear stress condition to the triaxial stress state at the interface, represented by the absolute maximum shear stress, τmax,abs should have reached the shear strength of the interface at fracture. The resulting shear strength of Sn40Pb/Ni3Sn4 interface is determined to be 87.5 MPa.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"614-620"},"PeriodicalIF":0.0,"publicationDate":"2010-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2050887","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-09-27DOI: 10.1109/TCAPT.2010.2051268
T. Mattila, J. Kivilahti
The chip scale packaged/ball grid array component boards were thermally cycled according to the IEC 68-2-14N standard (+125°C/-45°C, 15 min dwells, 5 min ramps). The as-solidified microstructures of Sn-rich solder interconnections were composed of relatively few, typically from two to five, large tin colonies distinguished by high-angle boundaries. However, during the thermal cycling tests the as-solidified microstructures transformed gradually into more or less equiaxed grain structure by recrystallization. It is suggested that cracking of solder interconnections under thermomechanical loadings is enhanced by the recrystallization, because the network of newly formed grain boundaries extending through the interconnections provide favorable paths for cracks to propagate intergranularly. The incubation time of recrystallization was about 50% of the average cycles-to-failure. The decrease of stored energy in high-stacking fault energy metals such as Sn takes place very effective by the recovery. Therefore, microstructures recrystallize only under restricted loading conditions: dynamic loading condition where strain hardening is more effective than recovery. Therefore, the experimentally observable transformation of the microstructures by recrystallization enables us, in principle, to correlate the field use loading conditions with those produced in accelerated reliability tests. Furthermore, the recrystallization provides the means to incorporate the effects of microstructural evolution into the lifetime prediction models.
{"title":"The Role of Recrystallization in the Failure of SnAgCu Solder Interconnections Under Thermomechanical Loading","authors":"T. Mattila, J. Kivilahti","doi":"10.1109/TCAPT.2010.2051268","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2051268","url":null,"abstract":"The chip scale packaged/ball grid array component boards were thermally cycled according to the IEC 68-2-14N standard (+125°C/-45°C, 15 min dwells, 5 min ramps). The as-solidified microstructures of Sn-rich solder interconnections were composed of relatively few, typically from two to five, large tin colonies distinguished by high-angle boundaries. However, during the thermal cycling tests the as-solidified microstructures transformed gradually into more or less equiaxed grain structure by recrystallization. It is suggested that cracking of solder interconnections under thermomechanical loadings is enhanced by the recrystallization, because the network of newly formed grain boundaries extending through the interconnections provide favorable paths for cracks to propagate intergranularly. The incubation time of recrystallization was about 50% of the average cycles-to-failure. The decrease of stored energy in high-stacking fault energy metals such as Sn takes place very effective by the recovery. Therefore, microstructures recrystallize only under restricted loading conditions: dynamic loading condition where strain hardening is more effective than recovery. Therefore, the experimentally observable transformation of the microstructures by recrystallization enables us, in principle, to correlate the field use loading conditions with those produced in accelerated reliability tests. Furthermore, the recrystallization provides the means to incorporate the effects of microstructural evolution into the lifetime prediction models.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"629-635"},"PeriodicalIF":0.0,"publicationDate":"2010-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2051268","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2049847
H. Gaul, Martin Schneider-Ramelow, Herbert Reichl
To close the gap between the development of wire bonding equipment and the knowledge about the welding process itself, a friction power model is presented. The model can be used to calculate the welding quality of a wedge in dependence to the bonding and material parameters. Based on theories for Au ball/wedge bonding, the model is enhanced for us wedge/wedge (us w/w) bonding with aluminum wire. Therefore, the deformation of the wire is described by the von Mises stress, and the geometry changes due to the decreasing wedge height during bonding are taken into consideration. Furthermore, the paper introduces the minimum friction amplitude needed for any frictional cleaning of the interface and takes the precleaning during touchdown into consideration. To prove the model, four equations are highlighted to theoretically predict the shear force, the tool tip and pad amplitude, and the characteristic of the deformation during the us stage of w/w bonding. These magnitudes are measured for different bonding parameters while bonding 25 μm AlSi-1 wire to Au metalized Si test structures. The model parameters were then fit to the experimental results for all bonding parameters.
{"title":"Analytic Model Verification of the Interfacial Friction Power in Al us w/w Bonding on Au Pads","authors":"H. Gaul, Martin Schneider-Ramelow, Herbert Reichl","doi":"10.1109/TCAPT.2010.2049847","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2049847","url":null,"abstract":"To close the gap between the development of wire bonding equipment and the knowledge about the welding process itself, a friction power model is presented. The model can be used to calculate the welding quality of a wedge in dependence to the bonding and material parameters. Based on theories for Au ball/wedge bonding, the model is enhanced for us wedge/wedge (us w/w) bonding with aluminum wire. Therefore, the deformation of the wire is described by the von Mises stress, and the geometry changes due to the decreasing wedge height during bonding are taken into consideration. Furthermore, the paper introduces the minimum friction amplitude needed for any frictional cleaning of the interface and takes the precleaning during touchdown into consideration. To prove the model, four equations are highlighted to theoretically predict the shear force, the tool tip and pad amplitude, and the characteristic of the deformation during the us stage of w/w bonding. These magnitudes are measured for different bonding parameters while bonding 25 μm AlSi-1 wire to Au metalized Si test structures. The model parameters were then fit to the experimental results for all bonding parameters.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"607-613"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2049847","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2051034
Bong-Min Song, B. Han, A. Bar-Cohen, Rajdeep Sharma, M. Arik
The lifetime of an actively-cooled light emitting diode (LED)-based luminaire is dependent not only on the junction temperature of LEDs, but also on the reliability of active cooling devices. We propose a novel hierarchical model to assess the lifetime of an actively cooled LED-based luminaire that can provide light output equivalent to a 100 W incandescent lamp. After design considerations for LED-based luminaires with active cooling are discussed, the proposed model is described using component-level sub-physics-of-failure models. The model is implemented to predict the lifetime of a LED-based recessed downlight with synthetic jet cooling. The effects of the time-dependent performance degradation mechanisms of the active cooling device on the lifetime of the luminaire are also discussed.
{"title":"Hierarchical Life Prediction Model for Actively Cooled LED-Based Luminaire","authors":"Bong-Min Song, B. Han, A. Bar-Cohen, Rajdeep Sharma, M. Arik","doi":"10.1109/TCAPT.2010.2051034","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2051034","url":null,"abstract":"The lifetime of an actively-cooled light emitting diode (LED)-based luminaire is dependent not only on the junction temperature of LEDs, but also on the reliability of active cooling devices. We propose a novel hierarchical model to assess the lifetime of an actively cooled LED-based luminaire that can provide light output equivalent to a 100 W incandescent lamp. After design considerations for LED-based luminaires with active cooling are discussed, the proposed model is described using component-level sub-physics-of-failure models. The model is implemented to predict the lifetime of a LED-based recessed downlight with synthetic jet cooling. The effects of the time-dependent performance degradation mechanisms of the active cooling device on the lifetime of the luminaire are also discussed.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"728-737"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2051034","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2049358
Yun-Ze Li, Yu-ying Wang, Kok-Meng Lee
Transient performance analysis is essential for the successful design of a spacecraft thermal management system. This paper presents three dynamic models for analyzing system-level transient responses of a loop heat pipe (LHP)-micro-electromechanical-system (MEMS) thermal management system consisting of a LHP and a variable emittance radiator employing MEMS technologies. The recommended hybrid mathematical model, which is deduced from the fundamental 3-node and 4-node thermal networks, provides an efficient closed-form equation enabling direct calculation of the fluid mass flowrate in the LHP from the nodal temperatures of the thermal management system, and a set of state equations that independently compute the temperature responses of the cooled object, LHP evaporator, LHP condenser, and MEMS radiator. The temperature transients of a 50 W LHP-MEMS thermal management system, as well as the hydraulic responses inside the employed LHP, were numerically investigated and discussed in detail.
瞬态性能分析对航天器热管理系统的成功设计至关重要。本文提出了三种动态模型，用于分析采用MEMS技术的由LHP和变发射度散热器组成的回路热管-微机电系统热管理系统的系统级瞬态响应。推荐的混合数学模型是由基本的3节点和4节点热网络推导出来的，提供了一个有效的封闭形式方程，可以根据热管理系统的节点温度直接计算LHP中的流体质量流量，以及一组独立计算被冷却物体、LHP蒸发器、LHP冷凝器和MEMS散热器的温度响应的状态方程。对50 W LHP- mems热管理系统的温度瞬态以及LHP内部的液压响应进行了数值研究和详细讨论。
{"title":"Dynamic Modeling and Transient Performance Analysis of a LHP-MEMS Thermal Management System for Spacecraft Electronics","authors":"Yun-Ze Li, Yu-ying Wang, Kok-Meng Lee","doi":"10.1109/TCAPT.2010.2049358","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2049358","url":null,"abstract":"Transient performance analysis is essential for the successful design of a spacecraft thermal management system. This paper presents three dynamic models for analyzing system-level transient responses of a loop heat pipe (LHP)-micro-electromechanical-system (MEMS) thermal management system consisting of a LHP and a variable emittance radiator employing MEMS technologies. The recommended hybrid mathematical model, which is deduced from the fundamental 3-node and 4-node thermal networks, provides an efficient closed-form equation enabling direct calculation of the fluid mass flowrate in the LHP from the nodal temperatures of the thermal management system, and a set of state equations that independently compute the temperature responses of the cooled object, LHP evaporator, LHP condenser, and MEMS radiator. The temperature transients of a 50 W LHP-MEMS thermal management system, as well as the hydraulic responses inside the employed LHP, were numerically investigated and discussed in detail.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"597-606"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2049358","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2044576
Zong-yuan Liu, Sheng Liu, Kai Wang, Xiaobing Luo
Effects of variations of yttrium aluminum garnet:Ce phosphor thickness and concentration on optical consistency of produced white light-emitting diodes (LEDs) including the consistency of brightness and light colors were studied by optical simulation. Five packaging methods with different phosphor locations were compared. Optical models of LED chip and the phosphor were presented and a Monte Carlo ray-tracing simulation procedure was developed. Both color binning and brightness level were used to sort the simulated LEDs to evaluate their optical consistency. Results revealed that the optical consistency of white LEDs strongly depends on how the phosphor thickness and the concentration vary. To obtain desired color binning, conformal phosphor coating is not a favorable packaging method due to its low brightness level and poor brightness consistency by large shifts of the brightness level as the phosphor thickness and concentration varying. Planar remoter phosphor improves the brightness level and its consistency, but realization of high color consistency becomes more difficult due to its smaller variation ranges of the phosphor thickness and concentration. Hemispherical remoter phosphor can fulfill the requirements of both high color consistency and high brightness consistency due to its capability of larger variation ranges of the phosphor thickness and concentration. By applying this method with thick phosphor thickness or high phosphor concentration, this method can be a promising packaging method for the low cost production.
{"title":"Studies on Optical Consistency of White LEDs Affected by Phosphor Thickness and Concentration Using Optical Simulation","authors":"Zong-yuan Liu, Sheng Liu, Kai Wang, Xiaobing Luo","doi":"10.1109/TCAPT.2010.2044576","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2044576","url":null,"abstract":"Effects of variations of yttrium aluminum garnet:Ce phosphor thickness and concentration on optical consistency of produced white light-emitting diodes (LEDs) including the consistency of brightness and light colors were studied by optical simulation. Five packaging methods with different phosphor locations were compared. Optical models of LED chip and the phosphor were presented and a Monte Carlo ray-tracing simulation procedure was developed. Both color binning and brightness level were used to sort the simulated LEDs to evaluate their optical consistency. Results revealed that the optical consistency of white LEDs strongly depends on how the phosphor thickness and the concentration vary. To obtain desired color binning, conformal phosphor coating is not a favorable packaging method due to its low brightness level and poor brightness consistency by large shifts of the brightness level as the phosphor thickness and concentration varying. Planar remoter phosphor improves the brightness level and its consistency, but realization of high color consistency becomes more difficult due to its smaller variation ranges of the phosphor thickness and concentration. Hemispherical remoter phosphor can fulfill the requirements of both high color consistency and high brightness consistency due to its capability of larger variation ranges of the phosphor thickness and concentration. By applying this method with thick phosphor thickness or high phosphor concentration, this method can be a promising packaging method for the low cost production.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"680-687"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2044576","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2052052
K. Górecki, J. Zarebski
In this paper, the nonlinear compact thermal model of power semiconductor devices based on the Cauer network is proposed. The analytical description of the model and the method of the model parameter estimation are presented. The accuracy and usefulness of the model is verified experimentally for the selected metal-oxide-semiconductor (MOS) power transistor at its various cooling conditions.
{"title":"Nonlinear Compact Thermal Model of Power Semiconductor Devices","authors":"K. Górecki, J. Zarebski","doi":"10.1109/TCAPT.2010.2052052","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2052052","url":null,"abstract":"In this paper, the nonlinear compact thermal model of power semiconductor devices based on the Cauer network is proposed. The analytical description of the model and the method of the model parameter estimation are presented. The accuracy and usefulness of the model is verified experimentally for the selected metal-oxide-semiconductor (MOS) power transistor at its various cooling conditions.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"643-647"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2052052","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520488","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-16DOI: 10.1109/TCAPT.2010.2046639
Xiao Cao, Tao Wang, K. Ngo, G. Lu
Due to the thin structure used in planar packaging, the electric field intensity within the encapsulation is high, leading to degradation of the dielectric performance. To resolve this issue, a metal posts interconnected parallel plate structure (MPIPPS) is used to reduce the high electric field concentration in the power module. However, the high bonding joint in MPIPPS causes large thermo-mechanical stress within the solder layers. This paper proposes a methodology to optimize the joint height based on a trade-off between the thermo-mechanical performance and dielectric performance of the power module. The impact of the joint height on thermo-mechanical stress and dielectric performance of the module is investigated quantitatively using ANSYS and Maxwell simulations. The results show that using a 0.4 mm joint height and Nusil R-2188 encapsulation, the power module can achieve 3 kV breakdown voltage. Experimental results agree with the simulation results.
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