Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254169
P. Sintupatsuk, S. Khomfoi, P. Paisuwanna
A dc to dc multilevel modular capacitor clamped converter (M2C3) with electrical grounding isolation and bidirectional power flow for a dc microgrid application is proposed in this paper. The principle of this particular M2C3 is based upon volt-sec balance of capacitors connected as a modular cell in the circuit so that the M2C3 can be similarly operated as a dc transformer. The M2C3 can be interfaced between a battery and a dc grid. Moreover, two M2C3 can be interfaced using a high frequency transformer in order to achieve grounding isolation and exchange energy between M2C3. The transferred energy would provide the fault tolerance ability in the case of a M2C3 is malfunctioned. Both grounding isolation and bidirectional power flow are one of key functions for dc microgrid applications. The simulation study is performed using PSIM 9.0. Also, the 3-kw prototype is developed to investigate the notion for a dc microgrid application.
{"title":"A dc to dc multilevel modular capacitor clamped converter with electrical grounding isolation and bidirectional power flow for a dc microgrid application","authors":"P. Sintupatsuk, S. Khomfoi, P. Paisuwanna","doi":"10.1109/ECTICON.2012.6254169","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254169","url":null,"abstract":"A dc to dc multilevel modular capacitor clamped converter (M<sup>2</sup>C<sup>3</sup>) with electrical grounding isolation and bidirectional power flow for a dc microgrid application is proposed in this paper. The principle of this particular M<sup>2</sup>C<sup>3</sup> is based upon volt-sec balance of capacitors connected as a modular cell in the circuit so that the M<sup>2</sup>C<sup>3</sup> can be similarly operated as a dc transformer. The M<sup>2</sup>C<sup>3</sup> can be interfaced between a battery and a dc grid. Moreover, two M<sup>2</sup>C<sup>3</sup> can be interfaced using a high frequency transformer in order to achieve grounding isolation and exchange energy between M<sup>2</sup>C<sup>3</sup>. The transferred energy would provide the fault tolerance ability in the case of a M<sup>2</sup>C<sup>3</sup> is malfunctioned. Both grounding isolation and bidirectional power flow are one of key functions for dc microgrid applications. The simulation study is performed using PSIM 9.0. Also, the 3-kw prototype is developed to investigate the notion for a dc microgrid application.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"13 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75190458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254316
A. S. Babokany, M. Jabbari, G. Shahgholian, M. Mahdavian
To have a systematic synthesis and galvanic isolation, it is common to use a full-bridge bidirectional DC-DC converter which is sometimes called dual active bridge. A comparative evaluation of full-bridge based bidirectional DC-DC converter is presented in this paper. Basic operation, control algorithm, advantages and disadvantages of several types of bidirectional converters are explained.
{"title":"A review of bidirectional dual active bridge converter","authors":"A. S. Babokany, M. Jabbari, G. Shahgholian, M. Mahdavian","doi":"10.1109/ECTICON.2012.6254316","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254316","url":null,"abstract":"To have a systematic synthesis and galvanic isolation, it is common to use a full-bridge bidirectional DC-DC converter which is sometimes called dual active bridge. A comparative evaluation of full-bridge based bidirectional DC-DC converter is presented in this paper. Basic operation, control algorithm, advantages and disadvantages of several types of bidirectional converters are explained.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"47 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88493649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254311
M. Mahdavian, N. Wattanapongsakorn, M. Azadeh, A. Ayati, M. Mahdavian, M. Jabbari, S. Bahadory
In recent years, enterprise resources planning system is considered as powerful tool of acquiring competitive advantage in the organizations. However, the implementation of this system suffers from low success rate. One of the important issues in enterprise resource planning implementation is individuals' resistance and many implementation projects have been failed due to severe resistance. Therefore, this study mainly aims to have a small share to increase the success rate of implementing this system. In this regard, the most important factors of resistance to change in ERP implementation are identified in this study and then it will be studied whether the organizations under study have paid due attention to such factors or not.
{"title":"Identifying main resistance factors in ERP implementation: A case study","authors":"M. Mahdavian, N. Wattanapongsakorn, M. Azadeh, A. Ayati, M. Mahdavian, M. Jabbari, S. Bahadory","doi":"10.1109/ECTICON.2012.6254311","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254311","url":null,"abstract":"In recent years, enterprise resources planning system is considered as powerful tool of acquiring competitive advantage in the organizations. However, the implementation of this system suffers from low success rate. One of the important issues in enterprise resource planning implementation is individuals' resistance and many implementation projects have been failed due to severe resistance. Therefore, this study mainly aims to have a small share to increase the success rate of implementing this system. In this regard, the most important factors of resistance to change in ERP implementation are identified in this study and then it will be studied whether the organizations under study have paid due attention to such factors or not.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82845256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254281
P. Nilsuwan, A. Boonpoonga, J. Tagapanij, P. Sirisuk
This paper presents a smart antenna system using a combination of nonconventional least square (NCLS) optimization and direct data domain least square (D3LS) for direction-of-arrival (DOA) estimation and beamforming, respectively. In the proposed system, NCLS optimization is utilized to estimate DOA of incoming signal first. The estimated DOA is then assisted for initial processing of D3LS in beamforming. The performance in term of estimated signal amplitude and estimated DOA of the proposed system is evaluated via simulations.
{"title":"Smart antenna using a combination of D3LS and NCLS algorithms","authors":"P. Nilsuwan, A. Boonpoonga, J. Tagapanij, P. Sirisuk","doi":"10.1109/ECTICON.2012.6254281","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254281","url":null,"abstract":"This paper presents a smart antenna system using a combination of nonconventional least square (NCLS) optimization and direct data domain least square (D3LS) for direction-of-arrival (DOA) estimation and beamforming, respectively. In the proposed system, NCLS optimization is utilized to estimate DOA of incoming signal first. The estimated DOA is then assisted for initial processing of D3LS in beamforming. The performance in term of estimated signal amplitude and estimated DOA of the proposed system is evaluated via simulations.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"59 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91007028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254199
W. Thipprasert, P. Jirapong
Electrical insulators of the Provincial Electricity Authority (PEA) of medium system are mostly porcelain insulator types that consists of suspension, pin type, line post, and pin post insulators. The distribution lines will be polluted by industrial contaminants, salt fog or natural dust. Experience shows that pollution flashover is one of the main natural calamities harming and affecting the voltage stability and reliability of distribution system. This paper compares the test results obtained from artificial pollution tests according to IEC 60507 with line post type and pin post type insulators of medium system under same test conditions. The salt fog test results indicate that the pollution flashover performance of line post insulator is less than to 50 percent of wet power frequency withstand voltage at equivalent salt deposit density (ESDD) = 0.5 mg/cm2 and the leakage current (LC) of line post insulator increased to 10.2 mA at ESDD = 0.5 mg/cm2 at nominal voltage. In the experiment indicate that AC pollution flashover performance of pin post insulator has better than line post insulator in the serious pollution area.
{"title":"Comparison of AC flashover performance for line post and pin post insulators in distribution 22 kV","authors":"W. Thipprasert, P. Jirapong","doi":"10.1109/ECTICON.2012.6254199","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254199","url":null,"abstract":"Electrical insulators of the Provincial Electricity Authority (PEA) of medium system are mostly porcelain insulator types that consists of suspension, pin type, line post, and pin post insulators. The distribution lines will be polluted by industrial contaminants, salt fog or natural dust. Experience shows that pollution flashover is one of the main natural calamities harming and affecting the voltage stability and reliability of distribution system. This paper compares the test results obtained from artificial pollution tests according to IEC 60507 with line post type and pin post type insulators of medium system under same test conditions. The salt fog test results indicate that the pollution flashover performance of line post insulator is less than to 50 percent of wet power frequency withstand voltage at equivalent salt deposit density (ESDD) = 0.5 mg/cm2 and the leakage current (LC) of line post insulator increased to 10.2 mA at ESDD = 0.5 mg/cm2 at nominal voltage. In the experiment indicate that AC pollution flashover performance of pin post insulator has better than line post insulator in the serious pollution area.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"65 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91040620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254266
Patcharapong Treeviriyanupab, P. Sangwongngam, K. Sripimanwat, Ornlarp Sangaroon
The quantum key reconciliation is an essential step of QKD protocol. Its main objective is to correct the transmission error after the distribution of quantum objects over a quantum channel, where two legitimate parties use a classical interactive communication for agreeing on their common key. This paper presents an alternative quantum key reconciliation method based on the Slepian-Wolf coding scheme with the chosen optimal set of BCH code rates as close to the Slepian-Wolf bound. In the proposed scheme, the BCH decoder is modified by adding one-bit feedback based on syndrome decoding to detect uncorrectable errors whenever the decoding process fails. The performance evaluation of this proposed scheme can achieve the reconciliation efficiency and reduce the cost of interactive communication via an error-free public channel comparable to the well-known reconciliation protocols. It is then suitable to apply for higher-speed discrete-variable QKD applications.
{"title":"BCH-based Slepian-Wolf coding with feedback syndrome decoding for quantum key reconciliation","authors":"Patcharapong Treeviriyanupab, P. Sangwongngam, K. Sripimanwat, Ornlarp Sangaroon","doi":"10.1109/ECTICON.2012.6254266","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254266","url":null,"abstract":"The quantum key reconciliation is an essential step of QKD protocol. Its main objective is to correct the transmission error after the distribution of quantum objects over a quantum channel, where two legitimate parties use a classical interactive communication for agreeing on their common key. This paper presents an alternative quantum key reconciliation method based on the Slepian-Wolf coding scheme with the chosen optimal set of BCH code rates as close to the Slepian-Wolf bound. In the proposed scheme, the BCH decoder is modified by adding one-bit feedback based on syndrome decoding to detect uncorrectable errors whenever the decoding process fails. The performance evaluation of this proposed scheme can achieve the reconciliation efficiency and reduce the cost of interactive communication via an error-free public channel comparable to the well-known reconciliation protocols. It is then suitable to apply for higher-speed discrete-variable QKD applications.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"39 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79044764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254236
A. Pinsakul, S. Chaimool, P. Akkaraekthalin
This paper proposes a magneto-dielectric metasubstrate (MDM) for a microstrip patch antenna (MPA). A miniaturization MPA with miniaturization factor of 2.33 and radiation efficiency of 87% is designed, numerically tested, fabricated and measured. The results of the simulation and measurement are in good agreement. Furthermore, we propose the advantage of MDM, in comparison with dielectric and magnetic substrate.
{"title":"Miniaturized microstrip patch antenna printed on magneto-dielectic metasubstrate","authors":"A. Pinsakul, S. Chaimool, P. Akkaraekthalin","doi":"10.1109/ECTICON.2012.6254236","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254236","url":null,"abstract":"This paper proposes a magneto-dielectric metasubstrate (MDM) for a microstrip patch antenna (MPA). A miniaturization MPA with miniaturization factor of 2.33 and radiation efficiency of 87% is designed, numerically tested, fabricated and measured. The results of the simulation and measurement are in good agreement. Furthermore, we propose the advantage of MDM, in comparison with dielectric and magnetic substrate.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"24 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85274278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254328
C. Lin, Sheng-Feng Lin
In this paper, we propose a low speed built-in-self-test (BIST) scheme for testing static parameters of high-speed digital-to-analog converter (DAC). Based on under-sampling technique, the DAC output signal is modulated into low speed pulse signal by pulse-width-modulation (PWM) with two sinusoidal carriers. The nonlinearity errors of DAC hence represents on duty ratio of converted pulse signal. In addition, a precise embedded time-to-digital converter (TDC) is inserted to measure the pulse width of converted signal on chip. The static parameters of DAC then can be estimated through analyzing output signal of TDC captured by conventional logic analyzer. To demonstrate the proposed scheme, we applied the method on 8-bits 200MS/s DAC. The experiment showed very good result that the maximum estimated error of DNL and INL are less than 0.2LSB and 0.35LSB. Moreover, the most important merit is that the required test environment and equipment are low speed compared to DAC under test.
{"title":"A BIST scheme for testing DAC","authors":"C. Lin, Sheng-Feng Lin","doi":"10.1109/ECTICON.2012.6254328","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254328","url":null,"abstract":"In this paper, we propose a low speed built-in-self-test (BIST) scheme for testing static parameters of high-speed digital-to-analog converter (DAC). Based on under-sampling technique, the DAC output signal is modulated into low speed pulse signal by pulse-width-modulation (PWM) with two sinusoidal carriers. The nonlinearity errors of DAC hence represents on duty ratio of converted pulse signal. In addition, a precise embedded time-to-digital converter (TDC) is inserted to measure the pulse width of converted signal on chip. The static parameters of DAC then can be estimated through analyzing output signal of TDC captured by conventional logic analyzer. To demonstrate the proposed scheme, we applied the method on 8-bits 200MS/s DAC. The experiment showed very good result that the maximum estimated error of DNL and INL are less than 0.2LSB and 0.35LSB. Moreover, the most important merit is that the required test environment and equipment are low speed compared to DAC under test.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"90 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84503194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254162
I. Chaisayun, S. Maitreechit
In this paper, a versatile squarer circuit based on OTAs is proposed. The important feature of the proposed squarer is that it has two inputs (voltage input vin and current input iin), and its output iout can be the square of in v or the square of iin. The non-ideal effect in OTAs caused from the finite input resistance is compensated by adding the compensation current at input of OTA. Simulation results by using PSpice are carried out to show performance of the circuit.
{"title":"An OTA based versatile squarer circuit","authors":"I. Chaisayun, S. Maitreechit","doi":"10.1109/ECTICON.2012.6254162","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254162","url":null,"abstract":"In this paper, a versatile squarer circuit based on OTAs is proposed. The important feature of the proposed squarer is that it has two inputs (voltage input vin and current input iin), and its output iout can be the square of in v or the square of iin. The non-ideal effect in OTAs caused from the finite input resistance is compensated by adding the compensation current at input of OTA. Simulation results by using PSpice are carried out to show performance of the circuit.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"43 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81338493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254120
Chainarong Amornbunchornvej, T. Limpiti, A. Assawamakin, A. Intarapanich, S. Tongsima
Various unsupervised clustering algorithms have been used to infer population structure in genetic data. The goals are to separate individuals of similar genetic characteristics into clusters and to estimate the number of clusters within each dataset. Among them, a framework called iterative pruning principal component analysis (ipPCA) have been developed. It performs PCA iteratively on subsets of data samples and clusters them using fuzzy c-mean. We believe that the choice of model-based clustering method affects the individual assignments and cluster quality, as well as the estimated number of clusters. Thus, in this paper we introduce a hierarchical tree clustering concept from graph theory, whose performance is independent of cluster shapes, into the ipPCA framework. We also add a PCA-based feature selection technique as a data pre-processing step to reduce data dimension and increase computational efficiency. The resulting algorithm is called HiClust-ipPCA. We illustrate the improved clustering results of the HiClust-ipPCA algorithm using 47-breed bovine and 28-breed sheep datasets.
{"title":"Improved iterative pruning principal component analysis with graph-theoretic hierarchical clustering","authors":"Chainarong Amornbunchornvej, T. Limpiti, A. Assawamakin, A. Intarapanich, S. Tongsima","doi":"10.1109/ECTICON.2012.6254120","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254120","url":null,"abstract":"Various unsupervised clustering algorithms have been used to infer population structure in genetic data. The goals are to separate individuals of similar genetic characteristics into clusters and to estimate the number of clusters within each dataset. Among them, a framework called iterative pruning principal component analysis (ipPCA) have been developed. It performs PCA iteratively on subsets of data samples and clusters them using fuzzy c-mean. We believe that the choice of model-based clustering method affects the individual assignments and cluster quality, as well as the estimated number of clusters. Thus, in this paper we introduce a hierarchical tree clustering concept from graph theory, whose performance is independent of cluster shapes, into the ipPCA framework. We also add a PCA-based feature selection technique as a data pre-processing step to reduce data dimension and increase computational efficiency. The resulting algorithm is called HiClust-ipPCA. We illustrate the improved clustering results of the HiClust-ipPCA algorithm using 47-breed bovine and 28-breed sheep datasets.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"38 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83393853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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