Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254367
N. Phurahong, S. Kaitwanidvilai
This paper proposes a new technique for designing a robust controller for an ACMC (Average Current Mode Control) buck converter. The proposed technique is based on the concept of 2DOF H∞ loop shaping control (2DOF HLS) which can be adopted to find the robust controller. However, the structure of the conventional robust controller is normally complicated with high order. This makes the difficulty in the implementation. The proposed technique can overcome this problem by using genetic algorithm (GA) to solve the structure specified 2DOF H∞ loop shaping control. Simulation results in the ACMC buck converter verify the effectiveness of the proposed controller.
{"title":"Fixed structure robust 2DOF H∞ loop shaping control for ACMC buck converter using genetic algorithm","authors":"N. Phurahong, S. Kaitwanidvilai","doi":"10.1109/ECTICON.2012.6254367","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254367","url":null,"abstract":"This paper proposes a new technique for designing a robust controller for an ACMC (Average Current Mode Control) buck converter. The proposed technique is based on the concept of 2DOF H∞ loop shaping control (2DOF HLS) which can be adopted to find the robust controller. However, the structure of the conventional robust controller is normally complicated with high order. This makes the difficulty in the implementation. The proposed technique can overcome this problem by using genetic algorithm (GA) to solve the structure specified 2DOF H∞ loop shaping control. Simulation results in the ACMC buck converter verify the effectiveness of the proposed controller.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"33 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79620585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254119
A. Nosan, R. Punchalard
The gradient algorithm used absolute value of error signal as a criterion to adjust the filter coefficient of adaptive IIR notch filter is presented in this paper. The objective is to estimate or track the frequency of a single sinusoidal signal corrupted by additive white Gaussian noise. The proposed algorithm can solve the problem of selecting an initial condition as met in the previous method. Moreover, it also has a high convergence speed.
{"title":"Absolute Gradient Algorithm for Adaptive IIR Notch Filter","authors":"A. Nosan, R. Punchalard","doi":"10.1109/ECTICON.2012.6254119","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254119","url":null,"abstract":"The gradient algorithm used absolute value of error signal as a criterion to adjust the filter coefficient of adaptive IIR notch filter is presented in this paper. The objective is to estimate or track the frequency of a single sinusoidal signal corrupted by additive white Gaussian noise. The proposed algorithm can solve the problem of selecting an initial condition as met in the previous method. Moreover, it also has a high convergence speed.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"25 6 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78003838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254302
W. Phuangmalai, M. Konghirun, N. Chayopitak
This paper presents the use of particle swarm optimization (PSO) algorithm applied to the optimal design of the 4/2 switched reluctance motor (SRM). The main advantage of designing 4/2 SRM is the robust rotor structure for high speed unidirectional rotating applications such as the air conditioner's blower. In the designing process, the finite element method magnetics (FEMM) is also employed to analyze the designing SRM with its optimized parameters given by PSO. This PSO algorithm is efficient and flexible. The objective function is based on the ripple torque minimization with respect to rotor node position. The PSO algorithm is described and the preliminary FEMM simulation results will be given for verifying optimal rotor design by PSO algorithm. In the final paper, the complete FEMM simulation results with detailed analysis will be provided.
{"title":"A design study of 4/2 switched reluctance motor using particle swarm optimization","authors":"W. Phuangmalai, M. Konghirun, N. Chayopitak","doi":"10.1109/ECTICON.2012.6254302","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254302","url":null,"abstract":"This paper presents the use of particle swarm optimization (PSO) algorithm applied to the optimal design of the 4/2 switched reluctance motor (SRM). The main advantage of designing 4/2 SRM is the robust rotor structure for high speed unidirectional rotating applications such as the air conditioner's blower. In the designing process, the finite element method magnetics (FEMM) is also employed to analyze the designing SRM with its optimized parameters given by PSO. This PSO algorithm is efficient and flexible. The objective function is based on the ripple torque minimization with respect to rotor node position. The PSO algorithm is described and the preliminary FEMM simulation results will be given for verifying optimal rotor design by PSO algorithm. In the final paper, the complete FEMM simulation results with detailed analysis will be provided.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"44 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77107567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254210
P. Kirdpipat, S. Thipchaksurat
In this paper, we present the impact of mobility on our scheme called Location-based Routing with Adaptive Request Zone (LoRAReZ). In LoRAReZ, the size of expected zone and request zone are set adaptively based on the distance between the source node and destination node. We evaluate the impact of mobility on the performance of LoRAReZ in terms of packet delivery fraction, routing overhead, end-to-end delay, throughput and power consumption by comparing with those of the traditional Ad Hoc On-Demand Distance Vector (AODV) and Modified Ad Hoc On-Demand Distance Vector (MAODV). The results show that LoRAReZ can provide the better performance than those of AODV and MAODV.
{"title":"Impact of mobility on Location-based Routing with Adaptive Request Zone in Mobile Ad Hoc Networks","authors":"P. Kirdpipat, S. Thipchaksurat","doi":"10.1109/ECTICON.2012.6254210","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254210","url":null,"abstract":"In this paper, we present the impact of mobility on our scheme called Location-based Routing with Adaptive Request Zone (LoRAReZ). In LoRAReZ, the size of expected zone and request zone are set adaptively based on the distance between the source node and destination node. We evaluate the impact of mobility on the performance of LoRAReZ in terms of packet delivery fraction, routing overhead, end-to-end delay, throughput and power consumption by comparing with those of the traditional Ad Hoc On-Demand Distance Vector (AODV) and Modified Ad Hoc On-Demand Distance Vector (MAODV). The results show that LoRAReZ can provide the better performance than those of AODV and MAODV.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"42 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73761450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254193
T. Lerddararadsamee, Y. Jiraraksopakun
In this paper, we proposed a method for fully-automatic EM segmentation on brain MR images without a priori knowledge. Instead of manually predetermination on number of tissue classes, the proposed method automatically find mean intensities of distinct tissues from the histogram. The brain MR images were chosen to test our proposed method, but our method can, in fact, be general for other MR segmentations using EM with which the Gaussian mixture distribution of an image histogram holds. The results from our method suggested that a fully automatic segmentation using EM can be achieved with no significant difference in segmentation accuracy compared to the conventional EM.
{"title":"Local maximum detection for fully automatic classification of EM algorithm","authors":"T. Lerddararadsamee, Y. Jiraraksopakun","doi":"10.1109/ECTICON.2012.6254193","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254193","url":null,"abstract":"In this paper, we proposed a method for fully-automatic EM segmentation on brain MR images without a priori knowledge. Instead of manually predetermination on number of tissue classes, the proposed method automatically find mean intensities of distinct tissues from the histogram. The brain MR images were chosen to test our proposed method, but our method can, in fact, be general for other MR segmentations using EM with which the Gaussian mixture distribution of an image histogram holds. The results from our method suggested that a fully automatic segmentation using EM can be achieved with no significant difference in segmentation accuracy compared to the conventional EM.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"197 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72776121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254168
T. Nishimura, Y. Adachi, Y. Ohta, K. Higuchi, E. Takegami, S. Tomioka, K. Jirasereeamornkul, K. Chamnongthai
If a pulse frequency, a load resistance of an LLC current-resonant DC-DC converter are changed, the dynamic characteristics is varied greatly, that is, the LLC current-resonant DC-DC converter has non-linear characteristics. In many applications of DC-DC converters, loads cannot be specified in advance, and they will be changed suddenly from no loads to full loads. A DC-DC converter system used a conventional single controller cannot be adapted to change dynamics and it occurs large output voltage variation. In this paper, a robust digital controller for suppress the change of step response characteristics and variations of output voltages in the load sudden changes is proposed. Experimental studies using a micro-processor for the controller demonstrate that this type of digital controller is effective to suppress the variations.
{"title":"Robust digital control for an LLC current-resonant DC-DC converter","authors":"T. Nishimura, Y. Adachi, Y. Ohta, K. Higuchi, E. Takegami, S. Tomioka, K. Jirasereeamornkul, K. Chamnongthai","doi":"10.1109/ECTICON.2012.6254168","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254168","url":null,"abstract":"If a pulse frequency, a load resistance of an LLC current-resonant DC-DC converter are changed, the dynamic characteristics is varied greatly, that is, the LLC current-resonant DC-DC converter has non-linear characteristics. In many applications of DC-DC converters, loads cannot be specified in advance, and they will be changed suddenly from no loads to full loads. A DC-DC converter system used a conventional single controller cannot be adapted to change dynamics and it occurs large output voltage variation. In this paper, a robust digital controller for suppress the change of step response characteristics and variations of output voltages in the load sudden changes is proposed. Experimental studies using a micro-processor for the controller demonstrate that this type of digital controller is effective to suppress the variations.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"27 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76267356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254329
P. Vongkoon, P. Liutanakul
Nowadays power electronics converter that uses for emulate electrical characteristic V-I curve of renewable dc power source are widely interested in research fields. This paper concerns with a photovoltaic (PV) array simulator using a classical dc/dc buck converter as power stage. The inductor current of the converter is used as control variable that is characterized by digital R-S-T controller, so the converter can emulate accurately the V-I curve, even under partial shading condition. Fundamental of controller design is presented with the technique of canceling discrete zero of plant. The details of PV array model are also investigated in order to prepare an appropriated current loop command signal. The design concept is realized by 330 Watts of prototype. Finally, the experimental results validate the proposed controller.
{"title":"Digital R-S-T controller for current loop control of DC/DC buck converter: A photovoltaic (PV) array simulator under partial shading condition","authors":"P. Vongkoon, P. Liutanakul","doi":"10.1109/ECTICON.2012.6254329","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254329","url":null,"abstract":"Nowadays power electronics converter that uses for emulate electrical characteristic V-I curve of renewable dc power source are widely interested in research fields. This paper concerns with a photovoltaic (PV) array simulator using a classical dc/dc buck converter as power stage. The inductor current of the converter is used as control variable that is characterized by digital R-S-T controller, so the converter can emulate accurately the V-I curve, even under partial shading condition. Fundamental of controller design is presented with the technique of canceling discrete zero of plant. The details of PV array model are also investigated in order to prepare an appropriated current loop command signal. The design concept is realized by 330 Watts of prototype. Finally, the experimental results validate the proposed controller.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"192 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79777368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254116
P. Phongsanam, S. Mitatha, P. Yupapin
We propose a new design of most important logical circuits using optical devices for all-optical addition/subtraction applications, in which the simultaneous operation of addition/subtraction arithmetic operation can be performed by using the dark-bright soliton conversion control. In operation, all-optical data input for addition/subtraction of binary operation logic `0' and `1' are formed by dark soliton (D) and bright soliton (B) pulses, respectively. By using the dark-bright soliton conversion behavior, the conversion between dark and bright soliton pulses can be obtained and form the logic pulses by a π/2 phase shifted device (i.e. an optical coupler), in which the binary operation can be formed simultaneously at the through and drop ports, respectively. In application, the proposed scheme can be recognized as a simple and flexible system for forming the logic switching system, which can be used for advanced logical system.
{"title":"All-optical adder/substractor using dark-bright soliton conversion control","authors":"P. Phongsanam, S. Mitatha, P. Yupapin","doi":"10.1109/ECTICON.2012.6254116","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254116","url":null,"abstract":"We propose a new design of most important logical circuits using optical devices for all-optical addition/subtraction applications, in which the simultaneous operation of addition/subtraction arithmetic operation can be performed by using the dark-bright soliton conversion control. In operation, all-optical data input for addition/subtraction of binary operation logic `0' and `1' are formed by dark soliton (D) and bright soliton (B) pulses, respectively. By using the dark-bright soliton conversion behavior, the conversion between dark and bright soliton pulses can be obtained and form the logic pulses by a π/2 phase shifted device (i.e. an optical coupler), in which the binary operation can be formed simultaneously at the through and drop ports, respectively. In application, the proposed scheme can be recognized as a simple and flexible system for forming the logic switching system, which can be used for advanced logical system.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"66 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90407936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254223
B. Hazarika, N. Afzulpurkar, C. Punyasai, D. Kumar Das
The principle of electron force microscopy is a well-known phenomenon of sensing in high sensitive MEMS based accelerometers & AFM. We intend to extend this concept towards development of a gyroscope, based on the fact that gyroscope sensors are accelerometers, but with a drive mode. In this paper we present a design of a MEMS based tunneling gyroscope with electron tunneling a sense mechanism. The important parameters required for modeling of the single axis gyroscope is like spring constant, damping coefficient and resonance frequencies are calculated using FEA analysis using COVENTORWARE. A SIMULINK based model is used to examine the response behavior of the model.
{"title":"Design, simulation & modelling of MEMS based comb-drive tunneling effect gyroscope","authors":"B. Hazarika, N. Afzulpurkar, C. Punyasai, D. Kumar Das","doi":"10.1109/ECTICON.2012.6254223","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254223","url":null,"abstract":"The principle of electron force microscopy is a well-known phenomenon of sensing in high sensitive MEMS based accelerometers & AFM. We intend to extend this concept towards development of a gyroscope, based on the fact that gyroscope sensors are accelerometers, but with a drive mode. In this paper we present a design of a MEMS based tunneling gyroscope with electron tunneling a sense mechanism. The important parameters required for modeling of the single axis gyroscope is like spring constant, damping coefficient and resonance frequencies are calculated using FEA analysis using COVENTORWARE. A SIMULINK based model is used to examine the response behavior of the model.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"130 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83990197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-05-16DOI: 10.1109/ECTICON.2012.6254346
S. Kitcharoenwat, M. Konghirun, A. Sangswang
This paper presents a novel single-phase ac-ac converter topology that is capable of creating voltage output to buck or boost mode. The structure of topology uses minimal switches controlled with the two-section overlap in each cycle of the ac input. The proposed topology is simple, low-cost, and contains minimum number of device. The control strategy can regulate a wide output voltage range with low harmonic distortion and improve the power factor. The closed-loop control is divided into two parts. The first part is the voltage control of dual dc-link capacitors, and the second part controls the ac output voltage. In the part of voltage control at the dc-link capacitors, the switches operate in the boost mode. The ac input current is controlled by PID control with the aim for power factor correction. The output voltage is also regulated by the PID control where the sinusoidal pulse-width modulation (sPWM) technique is chosen. The simulation results illustrate the regulated output ac voltage control, the control of the charging dual dc-link voltage capacitors, the response of the input voltage change and the response of the load change.
{"title":"A novel single phase AC-AC converter with power factor control","authors":"S. Kitcharoenwat, M. Konghirun, A. Sangswang","doi":"10.1109/ECTICON.2012.6254346","DOIUrl":"https://doi.org/10.1109/ECTICON.2012.6254346","url":null,"abstract":"This paper presents a novel single-phase ac-ac converter topology that is capable of creating voltage output to buck or boost mode. The structure of topology uses minimal switches controlled with the two-section overlap in each cycle of the ac input. The proposed topology is simple, low-cost, and contains minimum number of device. The control strategy can regulate a wide output voltage range with low harmonic distortion and improve the power factor. The closed-loop control is divided into two parts. The first part is the voltage control of dual dc-link capacitors, and the second part controls the ac output voltage. In the part of voltage control at the dc-link capacitors, the switches operate in the boost mode. The ac input current is controlled by PID control with the aim for power factor correction. The output voltage is also regulated by the PID control where the sinusoidal pulse-width modulation (sPWM) technique is chosen. The simulation results illustrate the regulated output ac voltage control, the control of the charging dual dc-link voltage capacitors, the response of the input voltage change and the response of the load change.","PeriodicalId":6319,"journal":{"name":"2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"76 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88821116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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