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2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)最新文献

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Conduction processes in Cu/low-K interconnection Cu/低钾互连中的传导过程
G. Bersuker, V. Blaschke, S. Choi, D. Wick
Electrical characterization of Cu/low-k structures was performed to address intrinsic material properties. It was shown that ionic conduction due to contamination inherent to the dielectric was the leading cause of an intrinsic intra metal line leakage current at low temperatures, while at elevated temperatures a contribution from electron current was detected. Dielectric and barrier layer parameters that control the conduction process were evaluated.
对Cu/low-k结构进行了电学表征,以解决材料的固有特性。结果表明,在低温下,由介质污染引起的离子传导是金属内部漏电流的主要原因,而在高温下,则检测到来自电子电流的贡献。对控制传导过程的介电层和势垒层参数进行了评价。
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引用次数: 10
Leakage and breakdown reliability issues associated with low-k dielectrics in a dual-damascene Cu process 泄漏和击穿可靠性问题与低k介电介质在双大马士革铜工艺
R. Tsu, J. McPherson, W. Mckee
Leakage and breakdown characteristics of low-k dielectrics are becoming increasingly important reliability issues for interconnects as they are scaled to 0.18 um and below. Several of the low-k dielectrics, integrated into a dual-damascene Cu process flow, are quite leaky and have difficulty in meeting a leakage spec of 1E-8 A/cm/sup 2/ at 25/spl deg/C. Time-dependent dielectric breakdown (TDDB) for some of the low-k candidate films is also an issue because of generally low breakdown strengths <2 MV/cm. Furthermore, Cu out-diffusion through poor barrier confinement can result in increased electronic leakage and premature TDDB. Also, moisture absorption by these low-k materials serves to: increase the dielectric constant, increase the leakage and reduce the breakdown strength. These findings can have important reliability implications for Cu/low-k and care must be exercised in dual-damascene integration schemes.
低k介电介质的泄漏和击穿特性正成为互连中越来越重要的可靠性问题,因为它们被缩小到0.18 um及以下。一些低k介电体,集成到双damascene Cu工艺流程中,相当泄漏,并且在25/spl℃时难以满足1E-8 a /cm/sup 2/的泄漏规格。对于一些低k候选薄膜来说,时间相关介电击穿(TDDB)也是一个问题,因为它们的击穿强度通常较低,<2 MV/cm。此外,Cu通过不良的势垒限制向外扩散会导致电子泄漏增加和过早的TDDB。此外,这些低k材料的吸湿作用:增加介电常数,增加泄漏,降低击穿强度。这些发现可能对Cu/低钾的可靠性有重要的影响,在双大马士革集成方案中必须注意。
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引用次数: 72
Reliability of optical fiber Bragg grating sensors at elevated temperature 高温下光纤Bragg光栅传感器的可靠性
U. Sennhauser, A. Frank, P. Mauron, P. Nellen
Mechanical and optical reliability of fibers and Bragg gratings at elevated temperature of up to 250/spl deg/C are modeled and parameters are determined in an extended test program. Stress corrosion and grating decay are investigated for two commercially available Bragg grating types.
在高达250/spl度/C的高温下,光纤和布拉格光栅的机械和光学可靠性进行了建模,并在扩展的测试程序中确定了参数。研究了两种市售布拉格光栅的应力腐蚀和光栅衰减。
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引用次数: 9
Failure analysis and stress simulation in small multichip BGAs 小型多芯片BGAs的失效分析与应力模拟
T. Moore, J. Jarvis
This paper examines one of the common modes of structural failure in multichip BGAs, determines its locations within the package structure, relates it to the stresses generated in the reliability tests under which it occurs, and by Finite Element simulations, determines an explanation for the failure, and finally proposes a method to avoid this failure mechanism. Several designs of multichip BGA substrates were manufactured and production silicon assembled into them. These were all 14/spl times/22 mm 119 ball PBGA. These were subjected to a set of package reliability tests, until some units failed electrical test. The failed units were analysed and the physical location and shape of the failure was determined in many cases. From this information, the mechanical mode of failure for each unit was determined. In addition there was sufficient information in some of the analyses to provide definite suggestions as to the mechanism of failure. Meanwhile, Finite Element Analysis was performed using simplified representations of the multichip BGAs, in order to find the locations of highest stress, and the expected modes of failure. This data was matched to the failure modes found in the physical analysis. Some novel failure analysis techniques were used to expose the damage in the failed units. A particular failure mode occurred frequently in temperature cycle, and the sites of failure were located by failure analysis. The failure was due to open circuit in the copper tracks in the top layer of the substrate caused by cracking in the solder resist directly underneath the edge of the die attach fillet. Finite element analysis was carried out and the location of the actual failures was found to be a local zone of high tensile stress in the solder resist.
本文研究了多芯片BGAs中结构失效的一种常见模式,确定了其在封装结构中的位置,并将其与可靠性试验中产生的应力联系起来,通过有限元模拟,确定了失效的原因,最后提出了避免这种失效机制的方法。制作了几种设计的多芯片BGA衬底,并组装了生产硅。这些都是14/ sp1倍/22毫米119球PBGA。这些都经过了一系列的包装可靠性测试,直到一些单元没有通过电气测试。对失效单元进行了分析,并在许多情况下确定了失效的物理位置和形状。根据这些信息,确定了每个单元的机械失效模式。此外,在一些分析中有足够的资料,可以对失效的机制提出明确的建议。同时,采用简化的多芯片BGAs表示进行有限元分析,以找到最高应力位置和预期的失效模式。该数据与物理分析中发现的失效模式相匹配。采用了一些新颖的失效分析技术来揭示失效部件的损伤。在温度循环中经常出现特定的失效模式,通过失效分析确定了失效点。失败的原因是由于基材顶层铜轨的开路,这是由直接位于模具附片边缘下方的阻焊剂开裂引起的。进行了有限元分析,发现实际失效的位置是焊锡抗拉应力高的局部区域。
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引用次数: 33
Short and long-term stability problems of Hall plates in plastic packages 塑料包装中霍尔板的短期和长期稳定性问题
D. Manic, J. Petr, R. Popovic
Thermal-mechanical stresses occur in plastic IC packages. These stresses affect Hall plate magnetic sensitivity via the piezo-Hall effect. In this paper the short and long-term stability problems of Hall plates encapsulated in SOP and TSSOP packages are considered. A sensitivity shift is observed when reflow soldering, temperature cycling, or humidity testing are performed. Moreover, this shift is not stable in time and a slow relaxation is observed. This parameter shift is seen as a serious reliability failure of the Hall plates. Sensitivity drift is related to packaging stress drift due to the viscoelastic flow of the molding compound. The normal in-plane stress drift is calculated from the high-accuracy magnetic measurements.
热机械应力发生在塑料IC封装中。这些应力通过压电霍尔效应影响霍尔板的磁灵敏度。本文研究了用SOP和TSSOP封装的霍尔板的短期和长期稳定性问题。当进行回流焊、温度循环或湿度测试时,会观察到灵敏度的变化。此外,这种转变在时间上不稳定,并且观察到缓慢的松弛。这种参数移位被视为霍尔板的严重可靠性失效。灵敏度漂移与成型复合材料粘弹性流动引起的封装应力漂移有关。通过高精度的磁测量,计算了法向面内应力漂移。
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引用次数: 26
Investigation of ultra-thin gate oxide reliability behavior by separate characterization of soft breakdown and hard breakdown 通过软击穿和硬击穿的分离表征研究超薄栅极氧化物的可靠性行为
T. Pompl, H. Wurzer, M. Kerber, I. Eisele
It is shown in this work that the soft breakdown can follow a significantly different temperature and field acceleration behavior than the dielectric breakdown (hard breakdown). These properties have a strong influence on reliability prediction of ultra-thin oxides and can result in misinterpretation if soft breakdown and hard breakdown events are mixed up during gate oxide reliability testing. The activation energy and the field acceleration of the soft breakdown are compared to the disturbed-bond breakage process proposed in the thermochemical E-model. It is concluded that soft breakdown can be caused by H-Si and H-O bond breakage due to the electric field in the oxide. The activation energy for soft breakdown also indicates that formation of a soft breakdown path is influenced by hydrogen diffusion in the oxide.
研究表明,软击穿与介质击穿(硬击穿)相比,具有明显不同的温度和场加速度行为。这些特性对超薄氧化物的可靠性预测有很大的影响,如果在栅极氧化物可靠性测试中混合了软击穿和硬击穿事件,可能会导致误读。将软击穿的活化能和场加速度与热化学e模型中提出的扰动键断裂过程进行了比较。结果表明,氧化体中的电场作用可导致H-Si和H-O键断裂,从而导致软击穿。软击穿的活化能也表明,软击穿路径的形成受到氢在氧化物中的扩散的影响。
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引用次数: 37
Effect of W coating on microengine performance W涂层对微发动机性能的影响
S. Mani, J. Fleming, J. Walraven, J. Sniegowski, M.P. se Beer, L. W. Irwin, D. M. Tanner, D. Laván, M. Dugger, J. Jakubczak, W. M. Miller
Two major problems associated with Si-based MEMS (MicroElectroMechanical Systems) devices are stiction and wear. Surface modifications are needed to reduce both adhesion and friction in micromechanical structures to solve these problems. In this paper, we will present a CVD (Chemical Vapor Deposition) process that selectively coats MEMS devices with tungsten and significantly enhances device durability. Tungsten CVD is used in the integrated-circuit industry, which makes this approach manufacturable. This selective deposition process results in a very conformal coating and can potentially address both stiction and wear problems confronting MEMS processing. The selective deposition of tungsten is accomplished through the silicon reduction of WF/sub 6/. The self-limiting nature of the process ensures consistent process control. The tungsten is deposited after the removal of the sacrificial oxides to minimize stress and process integration problems. The tungsten coating adheres well and is hard and conducting, which enhances performance for numerous devices. Furthermore, since the deposited tungsten infiltrates under adhered silicon parts and the volume of W deposited is less than the amount of Si consumed, it appears to be possible to release adhered parts that are contacted over small areas such as dimples. The wear resistance of tungsten coated parts has been shown to be significantly improved by microengine test structures.
与硅基MEMS(微机电系统)器件相关的两个主要问题是粘滞和磨损。为了解决这些问题,需要对微观机械结构进行表面改性,以减少粘着和摩擦。在本文中,我们将介绍一种CVD(化学气相沉积)工艺,该工艺可以选择性地在MEMS器件上涂覆钨,并显着提高器件的耐用性。钨CVD用于集成电路工业,这使得该方法可制造。这种选择性沉积工艺产生了非常适形的涂层,可以潜在地解决MEMS加工面临的粘滞和磨损问题。钨的选择性沉积是通过WF/sub / 6的硅还原来完成的。过程的自限性保证了过程控制的一致性。钨是在去除牺牲氧化物后沉积的,以尽量减少应力和工艺集成问题。钨涂层粘附性好,硬度高,导电性好,提高了许多设备的性能。此外,由于沉积的钨渗透到粘附的硅部件下,并且沉积的W的体积小于消耗的Si的量,因此在小区域(如韧窝)接触的粘附部件似乎有可能释放。微发动机试验结构表明,钨涂层零件的耐磨性得到了显著提高。
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引用次数: 21
MEMS reliability in shock environments 冲击环境下MEMS的可靠性
D. M. Tanner, J. Walraven, K. Helgesen, L. W. Irwin, F. Brown, N. F. Smith, Nathan Masters Sandia
In order to determine the susceptibility of our MEMS (MicroElectroMechanical Systems) devices to shock, tests were performed using haversine shock pulses with widths of 1 to 0.2 ms in the range from 500 g to 40000 g. We chose a surface-micromachined microengine because it has all the components needed for evaluation: springs that flex, gears that are anchored, and clamps and spring stops to maintain alignment. The microengines, which were unpowered for the tests, performed quite well at most shock levels with a majority functioning after the impact. Debris from the die edges moved at levels greater than 4000 g causing shorts in the actuators and posing reliability concerns. The coupling agent used to prevent stiction in the MEMS release weakened the die-attach bond, which produced failures at 10000 g and above. At 20000 g we began to observe structural damage in some of the thin flexures and 2.5-micron diameter pin joints. We observed electrical failures caused by the movement of debris. Additionally, we observed a new failure mode where stationary comb fingers contact the ground plane resulting in electrical shorts. These new failures were observed in our control group indicating that they were not shock related.
为了确定我们的MEMS(微机电系统)设备对冲击的敏感性,在500 g到40000 g的范围内,使用宽度为1到0.2 ms的haversine冲击脉冲进行了测试。我们选择了表面微机械加工的微发动机,因为它具有评估所需的所有组件:弯曲的弹簧,固定的齿轮,夹具和弹簧停止以保持对齐。在测试中没有动力的微型发动机在大多数冲击级别下表现相当好,大多数在撞击后仍能正常工作。模具边缘的碎片在超过4000克的水平上移动,导致致动器短路,并引起可靠性问题。在MEMS释放过程中,用于防止粘滞的偶联剂削弱了模连接键,导致10000 g及以上的失效。在20000g时,我们开始观察到一些薄挠曲和2.5微米直径的销钉接头的结构损伤。我们观察到碎片移动引起的电气故障。此外,我们观察到一种新的失效模式,即静止的梳指接触接地面导致电短路。在我们的对照组中观察到这些新的失败,表明它们与休克无关。
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引用次数: 178
MEMS reliability in a vibration environment 振动环境下MEMS的可靠性
D. Tanner, J. Walraven, K. Helgesen, L. W. Irwin, D. Gregory, J. Stake, N. F. Smith
MicroElectroMechanical Systems (MEMS) were subjected to a vibration environment that had a peak acceleration of 120 g and spanned frequencies from 20 to 2000 Hz. The device chosen for this test was a surface-micromachined microengine because it possesses many elements (springs, gears, rubbing surfaces) that may be susceptible to vibration. The microengines were unpowered during the test. We observed 2 vibration-related failures and 3 electrical failures out of 22 microengines tested. Surprisingly, the electrical failures also arose in four microengines in our control group indicating that they were not vibration related. Failure analysis revealed that the electrical failures were due to shorting of stationary comb fingers to the ground plane.
微机电系统(MEMS)承受峰值加速度为120 g、频率从20到2000 Hz的振动环境。本试验选择的设备是表面微机械加工的微发动机,因为它具有许多可能易受振动影响的元件(弹簧、齿轮、摩擦表面)。在测试期间,微型发动机没有动力。在测试的22个微型发动机中,我们观察到2个与振动相关的故障和3个电气故障。令人惊讶的是,在我们的对照组中,四个微型发动机也出现了电气故障,这表明它们与振动无关。故障分析表明,电气故障是由于固定梳指与地平面短路造成的。
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引用次数: 62
Temperature effect on the reliability of ZrO/sub 2/ gate dielectric deposited directly on silicon 温度对直接沉积在硅上的ZrO/sub - 2/栅极介质可靠性的影响
W. Qi, R. Nieh, K. Onishi, B. Lee, L. Kang, Y. Jeon, S. Gopalan, Jack C. Lee
Temperature effect on the reliability of ZrO/sub 2/ gate dielectric has been presented. High effective voltage-ramp breakdown field was observed. The activation energy of temperature accelerated voltage-ramp breakdown calculated from Arrhenius plot indicates that the breakdown of ZrO/sub 2/ is less sensitive to temperature than a thermal oxide of similar electrical thickness. ZrO/sub 2/ films exhibit excellent TDDB characteristics with low charge trapping and no stress induced leakage current. The field and temperature acceleration for TDDB for the 15.8 /spl Aring/ capacitance equivalent oxide thickness (CET) ZrO/sub 2/ shows that the activation energy for TDDB falls into the range reported for oxide from 39 /spl Aring/ to 150 /spl Aring/. It was found that the extrapolated 10-year lifetime operating voltage can be as high as -1.9 V, even at 150/spl deg/C based on the "log(t/sub BD/) vs E" extrapolation model for a film with a CET of 15.8 /spl Aring/.
研究了温度对ZrO/sub - 2/栅极介质可靠性的影响。观察到高有效电压斜坡击穿场。由Arrhenius图计算的温度加速电压斜坡击穿的活化能表明,ZrO/sub 2/击穿对温度的敏感性低于电厚度相近的热氧化物。ZrO/ sub2 /薄膜具有优异的TDDB特性,具有低电荷捕获和无应力引起的泄漏电流。TDDB在15.8 /spl /电容等效氧化物厚度(CET) ZrO/sub 2/时的场加速度和温度加速度表明,TDDB的活化能在39 /spl / ~ 150 /spl /之间。根据“log(t/sub BD/) vs E”外推模型,对于CET为15.8 /spl Aring/的薄膜,外推的10年寿命工作电压可以高达-1.9 V,甚至在150/spl℃。
{"title":"Temperature effect on the reliability of ZrO/sub 2/ gate dielectric deposited directly on silicon","authors":"W. Qi, R. Nieh, K. Onishi, B. Lee, L. Kang, Y. Jeon, S. Gopalan, Jack C. Lee","doi":"10.1109/RELPHY.2000.843893","DOIUrl":"https://doi.org/10.1109/RELPHY.2000.843893","url":null,"abstract":"Temperature effect on the reliability of ZrO/sub 2/ gate dielectric has been presented. High effective voltage-ramp breakdown field was observed. The activation energy of temperature accelerated voltage-ramp breakdown calculated from Arrhenius plot indicates that the breakdown of ZrO/sub 2/ is less sensitive to temperature than a thermal oxide of similar electrical thickness. ZrO/sub 2/ films exhibit excellent TDDB characteristics with low charge trapping and no stress induced leakage current. The field and temperature acceleration for TDDB for the 15.8 /spl Aring/ capacitance equivalent oxide thickness (CET) ZrO/sub 2/ shows that the activation energy for TDDB falls into the range reported for oxide from 39 /spl Aring/ to 150 /spl Aring/. It was found that the extrapolated 10-year lifetime operating voltage can be as high as -1.9 V, even at 150/spl deg/C based on the \"log(t/sub BD/) vs E\" extrapolation model for a film with a CET of 15.8 /spl Aring/.","PeriodicalId":6387,"journal":{"name":"2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)","volume":"30 1","pages":"72-76"},"PeriodicalIF":0.0,"publicationDate":"2000-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75808466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
期刊
2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)
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