Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310260
D. Markovic, M. Motomura, Byeong-Gyu Nam
Architectures supporting machine learning for embedded perception and cognition are continuing their rapid evolution, inspired by modern data analytics and enabled by the low energy cost of CMOS processing. This makes it feasible to migrate data analytics toward edge and wearable devices. To further support increased requirements for multiuser connectivity and sparse data, multiuser MIMO and compressive reconstruction are also required.
{"title":"Session 13 overview: Machine learning and signal processing: Digital architectures and systems subcommittee","authors":"D. Markovic, M. Motomura, Byeong-Gyu Nam","doi":"10.1109/ISSCC.2018.8310260","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310260","url":null,"abstract":"Architectures supporting machine learning for embedded perception and cognition are continuing their rapid evolution, inspired by modern data analytics and enabled by the low energy cost of CMOS processing. This makes it feasible to migrate data analytics toward edge and wearable devices. To further support increased requirements for multiuser connectivity and sparse data, multiuser MIMO and compressive reconstruction are also required.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"134 1","pages":"214-215"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73522304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310177
Youngcheol Chae, Mahdi Kashmiri, K. Makinwa
Analog techniques continue to defy simple categories. This session illustrates the diversity and vigor of modern analog circuitry. Entries span the range of amplifiers, Class-D audio, references, programmable filters and oscillators. New frontiers of precision, power, and performance are established. The first paper describes a low-noise voltage buffer with 0.6pA input current and 0.6μV offset. The second and third papers describe sub-0.5V operation of a crystal oscillator and an RC oscillator with Allan deviation floor down to 250ppb. The next three papers expand the performance of Class-D audio amplifiers in terms of power, THD+N, and quiescent current. The last paper describes a programmable FIR filter operating at 3.25GS/s.
{"title":"Session 3 overview: Analog techniques: Analog subcommittee","authors":"Youngcheol Chae, Mahdi Kashmiri, K. Makinwa","doi":"10.1109/ISSCC.2018.8310177","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310177","url":null,"abstract":"Analog techniques continue to defy simple categories. This session illustrates the diversity and vigor of modern analog circuitry. Entries span the range of amplifiers, Class-D audio, references, programmable filters and oscillators. New frontiers of precision, power, and performance are established. The first paper describes a low-noise voltage buffer with 0.6pA input current and 0.6μV offset. The second and third papers describe sub-0.5V operation of a crystal oscillator and an RC oscillator with Allan deviation floor down to 250ppb. The next three papers expand the performance of Class-D audio amplifiers in terms of power, THD+N, and quiescent current. The last paper describes a programmable FIR filter operating at 3.25GS/s.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"23 1","pages":"48-49"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78283901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310250
Jonathan Chang, C. Shiah, Leland Chang
SRAM continues to be the critical technology enabler for a wide range of applications from low-power to high-performance computing. This session showcases the leading-edge SRAM developments from the semiconductor industry. Intel presents the smallest SRAM bitcell for 10nm technology, with design assist techniques to enable low VMIN operation. Samsung presents the smallest bitcell for 7nm technology and shows a double-write driver technique to further improve VMIN. TSMC demonstrates a 7nm 5GHz L1 cache for high-performance computing.
{"title":"Session 11 overview: SRAM: Memory subcommittee","authors":"Jonathan Chang, C. Shiah, Leland Chang","doi":"10.1109/ISSCC.2018.8310250","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310250","url":null,"abstract":"SRAM continues to be the critical technology enabler for a wide range of applications from low-power to high-performance computing. This session showcases the leading-edge SRAM developments from the semiconductor industry. Intel presents the smallest SRAM bitcell for 10nm technology, with design assist techniques to enable low VMIN operation. Samsung presents the smallest bitcell for 7nm technology and shows a double-write driver technique to further improve VMIN. TSMC demonstrates a 7nm 5GHz L1 cache for high-performance computing.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"8 1","pages":"194-195"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84013119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310414
Jaeha Kim, Ki-Tae Park
The emergence of artificial intelligence (Al) capable of human tasks and more and better, is approaching fast. Shortly, most businesses, including the IC industry, will choose Al over humans, if Al can deliver the same results with lower risks and costs. Consequently, many questions arise for us: what will be the respective roles of Al and humans in developing ICs? How will Al shape the IC industry? What is the right career choice for young people in the field? This panel will showcase diverse experts who will share their vision on this daunting new development in our business.
{"title":"EE6: Can artificial intelligence replace my job? The dawn of a new IC industry with AI","authors":"Jaeha Kim, Ki-Tae Park","doi":"10.1109/ISSCC.2018.8310414","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310414","url":null,"abstract":"The emergence of artificial intelligence (Al) capable of human tasks and more and better, is approaching fast. Shortly, most businesses, including the IC industry, will choose Al over humans, if Al can deliver the same results with lower risks and costs. Consequently, many questions arise for us: what will be the respective roles of Al and humans in developing ICs? How will Al shape the IC industry? What is the right career choice for young people in the field? This panel will showcase diverse experts who will share their vision on this daunting new development in our business.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"6 1","pages":"531-533"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88672433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310211
Youngmin Shin, P. Restle, E. Beigné
The eight papers in this session highlight developments in neuromorphic acceleration, clocking circuits and security building blocks. A highlighted paper demonstrates a neuromorphic accelerator with stochastic synapses and embedded online reinforcement learning in autonomous micro-robots. The clocking papers presented demonstrate an all-digital multiplying DLL, a synthesizable fractional-N PLL and a synthesizable period-jitter sensor. Improvements to random-number generators and physically unclonable functions provide lower error rates and lossless stabilization by a novel remapping scheme.
{"title":"Session 7 overview: Neuromorphic, clocking and security circuits: Digital circuits subcommittee","authors":"Youngmin Shin, P. Restle, E. Beigné","doi":"10.1109/ISSCC.2018.8310211","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310211","url":null,"abstract":"The eight papers in this session highlight developments in neuromorphic acceleration, clocking circuits and security building blocks. A highlighted paper demonstrates a neuromorphic accelerator with stochastic synapses and embedded online reinforcement learning in autonomous micro-robots. The clocking papers presented demonstrate an all-digital multiplying DLL, a synthesizable fractional-N PLL and a synthesizable period-jitter sensor. Improvements to random-number generators and physically unclonable functions provide lower error rates and lossless stabilization by a novel remapping scheme.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"14 1","pages":"116-117"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87725744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310203
M. Meghelli, Hyeon-Min Bae, F. O’Mahony
High-speed serial I/Os continue to be pushed to higher bandwidth and density for every new generation of systems, which enable the scaling of data centers, fueled by a world that is becoming increasingly connected and digital. This session starts with the presentation of two low-power transmitters demonstrating a data rate of 112Gb/s using PAM-4 modulation, both implemented in advanced CMOS FinFet technologies. It continues with a presentation of a multi-standard 4-lane 1.25-to-28.05Gb/s transceiver designed in 14nm CMOS FinFET technology and supporting up to 40dB of channel loss at a power efficiency of 6pJ/b. Three papers describing PAM-4 transceivers are presented next, two implemented in 16nm CMOS FinFET technology targeting long reach links at 56Gb/s and 64Gb/s respectively, and one implemented in 28nm CMOS FDSOI targeting 64Gb/s short reach links. Finally, the session concludes with a paper describing a 4.16pJ/b 32Gb/s PAM-4 transceiver implemented in 65nm CMOS technology.
{"title":"Session 6 overview: Ultra-high-speed wireline: Wireline subcommittee","authors":"M. Meghelli, Hyeon-Min Bae, F. O’Mahony","doi":"10.1109/ISSCC.2018.8310203","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310203","url":null,"abstract":"High-speed serial I/Os continue to be pushed to higher bandwidth and density for every new generation of systems, which enable the scaling of data centers, fueled by a world that is becoming increasingly connected and digital. This session starts with the presentation of two low-power transmitters demonstrating a data rate of 112Gb/s using PAM-4 modulation, both implemented in advanced CMOS FinFet technologies. It continues with a presentation of a multi-standard 4-lane 1.25-to-28.05Gb/s transceiver designed in 14nm CMOS FinFET technology and supporting up to 40dB of channel loss at a power efficiency of 6pJ/b. Three papers describing PAM-4 transceivers are presented next, two implemented in 16nm CMOS FinFET technology targeting long reach links at 56Gb/s and 64Gb/s respectively, and one implemented in 28nm CMOS FDSOI targeting 64Gb/s short reach links. Finally, the session concludes with a paper describing a 4.16pJ/b 32Gb/s PAM-4 transceiver implemented in 65nm CMOS technology.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"15 1","pages":"100-101"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78175017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310410
V. Sze, A. Burdett, Sonia Leon, Rikky Muller, F. Sheikh, Yildiz Sinangil, T. Stetzler, I. Verbauwhede, Alice Wang, R. Yazicigil
The Workshop on Circuits for Social Good highlights various ways that circuits can help address some of the most important challenges facing society today, ranging from health care to energy conservation. The program aims to give a broad perspective on how one can have meaningful societal impact. It begins with several keynotes and invited talks from industry, academia and startups, followed by interactive round-table discussions on topics, including machine learning, medical devices, next generation communications, security and IoT, as well as discussions on career paths in research, product development, and entrepreneurship.
{"title":"EE2: Workshop on circuits for social good","authors":"V. Sze, A. Burdett, Sonia Leon, Rikky Muller, F. Sheikh, Yildiz Sinangil, T. Stetzler, I. Verbauwhede, Alice Wang, R. Yazicigil","doi":"10.1109/ISSCC.2018.8310410","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310410","url":null,"abstract":"The Workshop on Circuits for Social Good highlights various ways that circuits can help address some of the most important challenges facing society today, ranging from health care to energy conservation. The program aims to give a broad perspective on how one can have meaningful societal impact. It begins with several keynotes and invited talks from industry, academia and startups, followed by interactive round-table discussions on topics, including machine learning, medical devices, next generation communications, security and IoT, as well as discussions on career paths in research, product development, and entrepreneurship.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"119 1","pages":"523-525"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81708286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870462
Tai-Cheng Lee, B. Verbruggen, U. Moon
Analog-to-digital converters (ADCs) continue to evolve from classical architectures into hybrid converters that combine the strengths of various ADC types. This session demonstrates multiple hybrid ADCs ranging from MHz to GHz bandwidths, employing combinations of SAR, pipeline and oversampling architectures. Pipelined-SAR ADCs utilizing PVT-stabilized dynamic amplifiers, separate comparators per decision and digital amplifiers are disclosed. Noise-shaping phase-domain excess-loop-delay compensation as well as a double noise-shaping quantizer are employed in the ADCs to improve the conversion efficiency.
{"title":"Session 28 overview: Hybrid ADCs","authors":"Tai-Cheng Lee, B. Verbruggen, U. Moon","doi":"10.1109/ISSCC.2017.7870462","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870462","url":null,"abstract":"Analog-to-digital converters (ADCs) continue to evolve from classical architectures into hybrid converters that combine the strengths of various ADC types. This session demonstrates multiple hybrid ADCs ranging from MHz to GHz bandwidths, employing combinations of SAR, pipeline and oversampling architectures. Pipelined-SAR ADCs utilizing PVT-stabilized dynamic amplifiers, separate comparators per decision and digital amplifiers are disclosed. Noise-shaping phase-domain excess-loop-delay compensation as well as a double noise-shaping quantizer are employed in the ADCs to improve the conversion efficiency.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"36 1","pages":"464-465"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76107410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870357
Jan Genoe, H. Fuketa, E. Cantatore
This session covers a diverse set of novel technologies and circuits. The first 3 papers of this session implement circuits in large area technologies. Subsequent papers describe optical beam steering, interfaces to scalable quantum computing, ultra-high-resolution gravimetric mass sensing using NEMS arrays, dopamine sensing using graphene electrodes, 4F2 X-point technologies for archive systems, and integrated photonic crystals for physically unclonable functions (PUFs).
{"title":"Session 15 overview: Innovations in technologies and circuits","authors":"Jan Genoe, H. Fuketa, E. Cantatore","doi":"10.1109/ISSCC.2017.7870357","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870357","url":null,"abstract":"This session covers a diverse set of novel technologies and circuits. The first 3 papers of this session implement circuits in large area technologies. Subsequent papers describe optical beam steering, interfaces to scalable quantum computing, ultra-high-resolution gravimetric mass sensing using NEMS arrays, dopamine sensing using graphene electrodes, 4F2 X-point technologies for archive systems, and integrated photonic crystals for physically unclonable functions (PUFs).","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"15 1","pages":"254-255"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81760653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870490
Harry Lee, M. Straayer, C. Mangelsdorf
After the success of this evening event in 2016, Survey Says! returns to entertain the ISSCC audience. Two teams of panelists, all data-converter experts, compete to guess the most popular responses to a series of survey questions. While similar to the US game show “Family Feud”, in this event the audience's participation is also solicited to make the evening more amusing and controversial than the TV game show. This year a new set of survey questions, both fun and technical, will be featured. Survey questions probe both professional and personal sides, for example: “What do you like about your job?” or “How do you get more time to tape-out?” or “Why does your project fall behind?”. The contestants may ask for the audience's help after two failed guesses. This is an opportunity to learn how others in the field think in various situations and also to see how even the most experienced experts can struggle to guess even obvious answers when under pressure.
{"title":"EE6: Return of survey says!","authors":"Harry Lee, M. Straayer, C. Mangelsdorf","doi":"10.1109/ISSCC.2017.7870490","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870490","url":null,"abstract":"After the success of this evening event in 2016, Survey Says! returns to entertain the ISSCC audience. Two teams of panelists, all data-converter experts, compete to guess the most popular responses to a series of survey questions. While similar to the US game show “Family Feud”, in this event the audience's participation is also solicited to make the evening more amusing and controversial than the TV game show. This year a new set of survey questions, both fun and technical, will be featured. Survey questions probe both professional and personal sides, for example: “What do you like about your job?” or “How do you get more time to tape-out?” or “Why does your project fall behind?”. The contestants may ask for the audience's help after two failed guesses. This is an opportunity to learn how others in the field think in various situations and also to see how even the most experienced experts can struggle to guess even obvious answers when under pressure.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"1 1","pages":"525"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76389486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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