Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993170
A. Aranganathan, C. Suriyakala
In this paper, we deal with mobile ad-hoc networks have emerged as a major next generation wireless technology. An attack in MANET is very vulnerable for all the layers. An attack acts as a malicious node which affects the network performance. Sybil attack is one of the severe attacks in network layer which creates confusion in the routing which can be detected and prevented by an Agent. Agent can able to update the routing information throughout the network and also to reduce the network load. In this research, we propose a mobile agent based scheme to detect the new identities of Sybil attackers without using centralized trusted third party or any extra hardware such as directional antenna or a geographical positioning system and also can be prevented by cryptographic system. The improved in the packet delivery ratio, reduced network overload and the improved bandwidth efficiency are performed using ns2 tool.
{"title":"Mobile agent based security in MANETS against Sybil attack","authors":"A. Aranganathan, C. Suriyakala","doi":"10.1109/ICCICCT.2014.6993170","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993170","url":null,"abstract":"In this paper, we deal with mobile ad-hoc networks have emerged as a major next generation wireless technology. An attack in MANET is very vulnerable for all the layers. An attack acts as a malicious node which affects the network performance. Sybil attack is one of the severe attacks in network layer which creates confusion in the routing which can be detected and prevented by an Agent. Agent can able to update the routing information throughout the network and also to reduce the network load. In this research, we propose a mobile agent based scheme to detect the new identities of Sybil attackers without using centralized trusted third party or any extra hardware such as directional antenna or a geographical positioning system and also can be prevented by cryptographic system. The improved in the packet delivery ratio, reduced network overload and the improved bandwidth efficiency are performed using ns2 tool.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"39 1","pages":"1338-1342"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86730977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6992986
Linz Elizabeth Kurian, B. Mathew
Memories are always sensitive to soft errors which affect memory reliability. A common method for protecting memories from soft errors is the use of Error Correcting Codes (ECC). As technology shrinks, Multiple Cell Upsets (MCU) pose a major issue in the reliability of memories exposed to radiation environments. Here a Decimal Matrix Code (DMC) based on divide-symbol is used to enhance memory reliability. Large number of redundant bits are used in this approach. A comparison was made by implementing the design by using different adder structures such as Ripple carry, Carry lookahead and Kogge Stone adder. The design was modeled using VHDL, simulated and synthesized using Xilinx IS E 14.2. The results show that the design implemented by using Kogge stone adder has higher performance.
存储器对软错误非常敏感，软错误会影响存储器的可靠性。保护存储器免受软错误的常用方法是使用纠错码(ECC)。随着技术的萎缩，多单元干扰(MCU)对暴露在辐射环境中的存储器的可靠性提出了一个主要问题。本文采用基于除号的十进制矩阵码(DMC)来提高存储器的可靠性。这种方法使用了大量的冗余位。通过使用Ripple进位法、carry超前法和Kogge Stone进位法等不同的加法器结构来实现设计，并进行了比较。设计采用VHDL进行建模，采用Xilinx IS E 14.2进行仿真合成。结果表明，采用Kogge石加法器实现的设计具有较高的性能。
{"title":"Performance comparison of an error correction technique in memory","authors":"Linz Elizabeth Kurian, B. Mathew","doi":"10.1109/ICCICCT.2014.6992986","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6992986","url":null,"abstract":"Memories are always sensitive to soft errors which affect memory reliability. A common method for protecting memories from soft errors is the use of Error Correcting Codes (ECC). As technology shrinks, Multiple Cell Upsets (MCU) pose a major issue in the reliability of memories exposed to radiation environments. Here a Decimal Matrix Code (DMC) based on divide-symbol is used to enhance memory reliability. Large number of redundant bits are used in this approach. A comparison was made by implementing the design by using different adder structures such as Ripple carry, Carry lookahead and Kogge Stone adder. The design was modeled using VHDL, simulated and synthesized using Xilinx IS E 14.2. The results show that the design implemented by using Kogge stone adder has higher performance.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"39 1","pages":"355-359"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86983611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6992970
V. Rahul, G. Devadhas
This paper presents a hybrid modulation based multilevel static synchronous compensator (STATCOM) voltage control method. A multilevel STATCOM is a combination of high voltage converter and low voltage converter with an energy source. STATCOM use either a battery or storage element as the energy bank. Most probably STATCOM consists of capacitors as reactive power supplying or reactive power absorbing element. During the operation of STATCOM, the capacitor voltage may vary from its value, there the importance of this work. A new control strategy is introduced in this paper in focus on the capacitor voltage. An experimental model is developed by using MATLAB SIMULINK block and the result shows that the STATCOM along with the new control technique perform satisfactorily.
{"title":"Hybrid modulation based STATCOM with an external photovoltaic source","authors":"V. Rahul, G. Devadhas","doi":"10.1109/ICCICCT.2014.6992970","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6992970","url":null,"abstract":"This paper presents a hybrid modulation based multilevel static synchronous compensator (STATCOM) voltage control method. A multilevel STATCOM is a combination of high voltage converter and low voltage converter with an energy source. STATCOM use either a battery or storage element as the energy bank. Most probably STATCOM consists of capacitors as reactive power supplying or reactive power absorbing element. During the operation of STATCOM, the capacitor voltage may vary from its value, there the importance of this work. A new control strategy is introduced in this paper in focus on the capacitor voltage. An experimental model is developed by using MATLAB SIMULINK block and the result shows that the STATCOM along with the new control technique perform satisfactorily.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"32 1","pages":"278-283"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86985966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993175
K. Sreeja, S. Sushanth Kumar
Diabetic retinopathy is an open topic on which research has been ongoing for the past few decades. The damage caused by diabetic retinopathy can be prevented by the early detection of microaneurysm in the retina. This review focuses on microaneurysm detection, which is the commonly observed complication in diabetic patients. Some of algorithms used for microaneurysm detection from retinal fundus images are reviewed and summarized.
{"title":"Recent studies on microaneurysm detection: A review","authors":"K. Sreeja, S. Sushanth Kumar","doi":"10.1109/ICCICCT.2014.6993175","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993175","url":null,"abstract":"Diabetic retinopathy is an open topic on which research has been ongoing for the past few decades. The damage caused by diabetic retinopathy can be prevented by the early detection of microaneurysm in the retina. This review focuses on microaneurysm detection, which is the commonly observed complication in diabetic patients. Some of algorithms used for microaneurysm detection from retinal fundus images are reviewed and summarized.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"60 1","pages":"1366-1371"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87058221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993106
K. J. Mohan, Riboy Cheriyan
In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPSK, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL.
{"title":"Proficient receptive combined address generator archetypal for WiMAX and WiFi deinterleaver precinct","authors":"K. J. Mohan, Riboy Cheriyan","doi":"10.1109/ICCICCT.2014.6993106","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993106","url":null,"abstract":"In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPSK, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"48 1","pages":"1005-1009"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85606138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993087
J. Saravanan, P. Manikandan
This paper proposed new topology of quasi Z-source series resonant inverter by using three switches. The main advantages of new three switch quasi Z-source series resonant inverter is simple control strategies, widely varying input voltages, obtain a sine wave output voltage in high frequency. It consists of quasi Z-source boost converter with single switch and series resonant inverter. Moreover obtain a required frequency by setting series resonant inverter frequency. Theoretical analysis of three switch quasi Z-source series resonant inverter presented. The proposed inverter is a wide range of voltage gain. It is suitable for applications in photovoltaic (PV) systems, fuel cell. A simulation result is presented to verify the proposed inverter concept and theoretical analysis.
{"title":"Three switch quasi Z-source series resonant inverter","authors":"J. Saravanan, P. Manikandan","doi":"10.1109/ICCICCT.2014.6993087","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993087","url":null,"abstract":"This paper proposed new topology of quasi Z-source series resonant inverter by using three switches. The main advantages of new three switch quasi Z-source series resonant inverter is simple control strategies, widely varying input voltages, obtain a sine wave output voltage in high frequency. It consists of quasi Z-source boost converter with single switch and series resonant inverter. Moreover obtain a required frequency by setting series resonant inverter frequency. Theoretical analysis of three switch quasi Z-source series resonant inverter presented. The proposed inverter is a wide range of voltage gain. It is suitable for applications in photovoltaic (PV) systems, fuel cell. A simulation result is presented to verify the proposed inverter concept and theoretical analysis.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"14 1","pages":"906-910"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87465485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993176
R. Manju, A. S. Nargunam, A. Rajendran
In real time applications, single modal biometric system have the limitations, due to noise sensitivity, intra class variability, non universality, data quality etc. These difficulties can be rectified by Multibiometric system. This paper presents effective fusion methodologies by multiple traits. The proposed multimodal biometric authenticated system have a number of incomparable merits, starts from Borda count method, principle component analysis(PCA) and Fisher's linear Discriminant methods for entity matchers (face, iris, and fingerprint). For traits authentication from the different fusion method, to fuse different biometric results obtained from matches. This result shows that fusion of entity can the growth of biometric system performance.
{"title":"Recital scrutiny of multimodal biometric endorsement System","authors":"R. Manju, A. S. Nargunam, A. Rajendran","doi":"10.1109/ICCICCT.2014.6993176","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993176","url":null,"abstract":"In real time applications, single modal biometric system have the limitations, due to noise sensitivity, intra class variability, non universality, data quality etc. These difficulties can be rectified by Multibiometric system. This paper presents effective fusion methodologies by multiple traits. The proposed multimodal biometric authenticated system have a number of incomparable merits, starts from Borda count method, principle component analysis(PCA) and Fisher's linear Discriminant methods for entity matchers (face, iris, and fingerprint). For traits authentication from the different fusion method, to fuse different biometric results obtained from matches. This result shows that fusion of entity can the growth of biometric system performance.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"4 1","pages":"1372-1376"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82164897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993163
Bommepalli Madhava Reddy, T. Subbareddy, Saureddy Omkar Reddy, V. Elamaran
FECG (Fetal Electrocardiogram) signal convey information in making timely decisions during pregnancy. It is very important to extract and detect the FECG signal from a composite maternal abdominal signals for task of fetal monitoring. We implement adaptive filters for the task of separation of FECG signal from the abdominal ECG signal and understand its nature. A Least Mean Square (LMS) algorithm is implemented for the purpose of detection adaptively. Data compression techniques are implemented foe the filtered ECG signal for the purpose of easy storage and transmission. Since the data is more important and sensitive, it is necessary to implement lossless compression with high compression ratio by reducing the redundancy involved in the ECG signal with low noise. A Fast Fourier Transform, Discrete Cosine Transform (DCT), DCT-II and Discrete Sine Transform (DST) methods are used here for the purpose of compression. The performance metrics like compression ratio, low percent mean square (PRD) are compared and the results are tabulated by using Matlab software tool.
{"title":"A tutorial review on data compression with detection of fetal heart beat from noisy ECG","authors":"Bommepalli Madhava Reddy, T. Subbareddy, Saureddy Omkar Reddy, V. Elamaran","doi":"10.1109/ICCICCT.2014.6993163","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993163","url":null,"abstract":"FECG (Fetal Electrocardiogram) signal convey information in making timely decisions during pregnancy. It is very important to extract and detect the FECG signal from a composite maternal abdominal signals for task of fetal monitoring. We implement adaptive filters for the task of separation of FECG signal from the abdominal ECG signal and understand its nature. A Least Mean Square (LMS) algorithm is implemented for the purpose of detection adaptively. Data compression techniques are implemented foe the filtered ECG signal for the purpose of easy storage and transmission. Since the data is more important and sensitive, it is necessary to implement lossless compression with high compression ratio by reducing the redundancy involved in the ECG signal with low noise. A Fast Fourier Transform, Discrete Cosine Transform (DCT), DCT-II and Discrete Sine Transform (DST) methods are used here for the purpose of compression. The performance metrics like compression ratio, low percent mean square (PRD) are compared and the results are tabulated by using Matlab software tool.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"7 1","pages":"1310-1314"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82363753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993108
P. Y. Muhammed Anshad, S. Sushanth Kumar
Computer Aided Diagnosis (CAD) is one of the trusted methods in the field of medicine. CAD system assists the doctors for the diagnosis of diseases in higher degree of perfection within a short period of time. Now CAD is the most preferable method for the initial diagnosis of cancer using X-ray, CT, mammogram or MRI images. CAD works as an intermediate in between the radiologist and the input images. The output from CAD doesn't think about as a final result however used as a reference for more tests in the relevant field. In fact CAD helps the doctors for detection of cancer more precisely and early. The combination of artificial intelligence, digital image processing technique and radiological image processing etc makes the CAD system more reliable and efficient. Sensitivity, specificity, absolute detection rate etc are the important parameters of the CAD system. Now CAD system is mostly used for breast cancer detection, lung cancer detection, colon cancer, coronary artery disease, congenital heart defect, lung cancer, bone cancer, brain tumor etc. Any part of body can affect cancer and very high possibility to spread other parts. These days CAD system developed to a great extends, however it's not reached to 100% accuracy. In this article that discusses the necessary options, motivation, findings from the early developments and future expansions of CAD systems.
{"title":"Recent methods for the detection of tumor using computer aided diagnosis — A review","authors":"P. Y. Muhammed Anshad, S. Sushanth Kumar","doi":"10.1109/ICCICCT.2014.6993108","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993108","url":null,"abstract":"Computer Aided Diagnosis (CAD) is one of the trusted methods in the field of medicine. CAD system assists the doctors for the diagnosis of diseases in higher degree of perfection within a short period of time. Now CAD is the most preferable method for the initial diagnosis of cancer using X-ray, CT, mammogram or MRI images. CAD works as an intermediate in between the radiologist and the input images. The output from CAD doesn't think about as a final result however used as a reference for more tests in the relevant field. In fact CAD helps the doctors for detection of cancer more precisely and early. The combination of artificial intelligence, digital image processing technique and radiological image processing etc makes the CAD system more reliable and efficient. Sensitivity, specificity, absolute detection rate etc are the important parameters of the CAD system. Now CAD system is mostly used for breast cancer detection, lung cancer detection, colon cancer, coronary artery disease, congenital heart defect, lung cancer, bone cancer, brain tumor etc. Any part of body can affect cancer and very high possibility to spread other parts. These days CAD system developed to a great extends, however it's not reached to 100% accuracy. In this article that discusses the necessary options, motivation, findings from the early developments and future expansions of CAD systems.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"10 1","pages":"1014-1019"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79695359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993129
Nitin O. Mathur, B. Lakshmi
In modern digital communication systems, arbitrary sample rate conversion is the most computation intensive task. In addition, a reconfigurable sample rate converter is often required to meet the sampling rate requirements of different radio standards. This paper proposes a pipelined architecture for FPGA implementation of arbitrary rate converter employing cut-set retiming and Sum-Of-Power-Of-Two (SOPOT) techniques to achieve high throughput while reducing the hardware. The proposed architecture for 16 bit precision is designed and implemented using Xilinx ISE 14.2 and XC3S500E-4FG320 FPGA device. The implementation results show that the proposed architecture improves throughput by 4.5 times.
在现代数字通信系统中，任意采样率转换是计算量最大的任务。此外，通常需要可重构采样率转换器来满足不同无线电标准的采样率要求。本文提出了一种用于FPGA实现任意速率转换器的流水线结构，采用割集重定时和2次幂和(SOPOT)技术来实现高吞吐量，同时减少硬件。采用Xilinx ISE 14.2和XC3S500E-4FG320 FPGA器件设计并实现了16位精度的架构。实现结果表明，该架构的吞吐量提高了4.5倍。
{"title":"High throughput arbitrary sample rate converter for software radios","authors":"Nitin O. Mathur, B. Lakshmi","doi":"10.1109/ICCICCT.2014.6993129","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993129","url":null,"abstract":"In modern digital communication systems, arbitrary sample rate conversion is the most computation intensive task. In addition, a reconfigurable sample rate converter is often required to meet the sampling rate requirements of different radio standards. This paper proposes a pipelined architecture for FPGA implementation of arbitrary rate converter employing cut-set retiming and Sum-Of-Power-Of-Two (SOPOT) techniques to achieve high throughput while reducing the hardware. The proposed architecture for 16 bit precision is designed and implemented using Xilinx ISE 14.2 and XC3S500E-4FG320 FPGA device. The implementation results show that the proposed architecture improves throughput by 4.5 times.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"8 1","pages":"1121-1123"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84138036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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