Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6992970
V. Rahul, G. Devadhas
This paper presents a hybrid modulation based multilevel static synchronous compensator (STATCOM) voltage control method. A multilevel STATCOM is a combination of high voltage converter and low voltage converter with an energy source. STATCOM use either a battery or storage element as the energy bank. Most probably STATCOM consists of capacitors as reactive power supplying or reactive power absorbing element. During the operation of STATCOM, the capacitor voltage may vary from its value, there the importance of this work. A new control strategy is introduced in this paper in focus on the capacitor voltage. An experimental model is developed by using MATLAB SIMULINK block and the result shows that the STATCOM along with the new control technique perform satisfactorily.
{"title":"Hybrid modulation based STATCOM with an external photovoltaic source","authors":"V. Rahul, G. Devadhas","doi":"10.1109/ICCICCT.2014.6992970","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6992970","url":null,"abstract":"This paper presents a hybrid modulation based multilevel static synchronous compensator (STATCOM) voltage control method. A multilevel STATCOM is a combination of high voltage converter and low voltage converter with an energy source. STATCOM use either a battery or storage element as the energy bank. Most probably STATCOM consists of capacitors as reactive power supplying or reactive power absorbing element. During the operation of STATCOM, the capacitor voltage may vary from its value, there the importance of this work. A new control strategy is introduced in this paper in focus on the capacitor voltage. An experimental model is developed by using MATLAB SIMULINK block and the result shows that the STATCOM along with the new control technique perform satisfactorily.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"32 1","pages":"278-283"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86985966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993175
K. Sreeja, S. Sushanth Kumar
Diabetic retinopathy is an open topic on which research has been ongoing for the past few decades. The damage caused by diabetic retinopathy can be prevented by the early detection of microaneurysm in the retina. This review focuses on microaneurysm detection, which is the commonly observed complication in diabetic patients. Some of algorithms used for microaneurysm detection from retinal fundus images are reviewed and summarized.
{"title":"Recent studies on microaneurysm detection: A review","authors":"K. Sreeja, S. Sushanth Kumar","doi":"10.1109/ICCICCT.2014.6993175","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993175","url":null,"abstract":"Diabetic retinopathy is an open topic on which research has been ongoing for the past few decades. The damage caused by diabetic retinopathy can be prevented by the early detection of microaneurysm in the retina. This review focuses on microaneurysm detection, which is the commonly observed complication in diabetic patients. Some of algorithms used for microaneurysm detection from retinal fundus images are reviewed and summarized.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"60 1","pages":"1366-1371"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87058221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993087
J. Saravanan, P. Manikandan
This paper proposed new topology of quasi Z-source series resonant inverter by using three switches. The main advantages of new three switch quasi Z-source series resonant inverter is simple control strategies, widely varying input voltages, obtain a sine wave output voltage in high frequency. It consists of quasi Z-source boost converter with single switch and series resonant inverter. Moreover obtain a required frequency by setting series resonant inverter frequency. Theoretical analysis of three switch quasi Z-source series resonant inverter presented. The proposed inverter is a wide range of voltage gain. It is suitable for applications in photovoltaic (PV) systems, fuel cell. A simulation result is presented to verify the proposed inverter concept and theoretical analysis.
{"title":"Three switch quasi Z-source series resonant inverter","authors":"J. Saravanan, P. Manikandan","doi":"10.1109/ICCICCT.2014.6993087","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993087","url":null,"abstract":"This paper proposed new topology of quasi Z-source series resonant inverter by using three switches. The main advantages of new three switch quasi Z-source series resonant inverter is simple control strategies, widely varying input voltages, obtain a sine wave output voltage in high frequency. It consists of quasi Z-source boost converter with single switch and series resonant inverter. Moreover obtain a required frequency by setting series resonant inverter frequency. Theoretical analysis of three switch quasi Z-source series resonant inverter presented. The proposed inverter is a wide range of voltage gain. It is suitable for applications in photovoltaic (PV) systems, fuel cell. A simulation result is presented to verify the proposed inverter concept and theoretical analysis.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"14 1","pages":"906-910"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87465485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993129
Nitin O. Mathur, B. Lakshmi
In modern digital communication systems, arbitrary sample rate conversion is the most computation intensive task. In addition, a reconfigurable sample rate converter is often required to meet the sampling rate requirements of different radio standards. This paper proposes a pipelined architecture for FPGA implementation of arbitrary rate converter employing cut-set retiming and Sum-Of-Power-Of-Two (SOPOT) techniques to achieve high throughput while reducing the hardware. The proposed architecture for 16 bit precision is designed and implemented using Xilinx ISE 14.2 and XC3S500E-4FG320 FPGA device. The implementation results show that the proposed architecture improves throughput by 4.5 times.
在现代数字通信系统中，任意采样率转换是计算量最大的任务。此外，通常需要可重构采样率转换器来满足不同无线电标准的采样率要求。本文提出了一种用于FPGA实现任意速率转换器的流水线结构，采用割集重定时和2次幂和(SOPOT)技术来实现高吞吐量，同时减少硬件。采用Xilinx ISE 14.2和XC3S500E-4FG320 FPGA器件设计并实现了16位精度的架构。实现结果表明，该架构的吞吐量提高了4.5倍。
{"title":"High throughput arbitrary sample rate converter for software radios","authors":"Nitin O. Mathur, B. Lakshmi","doi":"10.1109/ICCICCT.2014.6993129","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993129","url":null,"abstract":"In modern digital communication systems, arbitrary sample rate conversion is the most computation intensive task. In addition, a reconfigurable sample rate converter is often required to meet the sampling rate requirements of different radio standards. This paper proposes a pipelined architecture for FPGA implementation of arbitrary rate converter employing cut-set retiming and Sum-Of-Power-Of-Two (SOPOT) techniques to achieve high throughput while reducing the hardware. The proposed architecture for 16 bit precision is designed and implemented using Xilinx ISE 14.2 and XC3S500E-4FG320 FPGA device. The implementation results show that the proposed architecture improves throughput by 4.5 times.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"8 1","pages":"1121-1123"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84138036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993110
R. Rahul, R. Thilagavathy
The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.
{"title":"A low phase noise CMOS voltage-controlled differential ring oscillator","authors":"R. Rahul, R. Thilagavathy","doi":"10.1109/ICCICCT.2014.6993110","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993110","url":null,"abstract":"The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"8 1","pages":"1025-1028"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83642359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6992935
G. V. A. Kumar, T. Subbareddy, Bommepalli Madhava Reddy, N. Raju, V. Elamaran
This study work is basically aimed at designing and testing of hardware module to perform inversion operation of a matrix in a small time. Here, an approach is made for calculating 3×3 matrix inverse. There are many mathematical methods available for performing matrix inversion and out of them a suitable method, like Adjoint Matrix Method is selected by analysing the computational requirements. The mathematical method of calculating the inverse of matrix is then suitably converted into VHDL code. The code is then tested for simulation using a set of test matrices. After simulation is verified by checking the results of test inputs the code is tested for synthesizability. After the synthesizability is verified then it is finally tested for hardware verification by dumping into FPGA. Altera's DE1 board which consists a Cyclone-II series FPGA EP2C20F484C7 FPGA is used for this study. The test inputs can be fed in either by using on board GPIO or UI or S RAM. The outputs are taken the same way either by GPIO or UI or written to S RAM and are then to be verified by comparing with actual results.
{"title":"An approach to design a matrix inversion hardware module using FPGA","authors":"G. V. A. Kumar, T. Subbareddy, Bommepalli Madhava Reddy, N. Raju, V. Elamaran","doi":"10.1109/ICCICCT.2014.6992935","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6992935","url":null,"abstract":"This study work is basically aimed at designing and testing of hardware module to perform inversion operation of a matrix in a small time. Here, an approach is made for calculating 3×3 matrix inverse. There are many mathematical methods available for performing matrix inversion and out of them a suitable method, like Adjoint Matrix Method is selected by analysing the computational requirements. The mathematical method of calculating the inverse of matrix is then suitably converted into VHDL code. The code is then tested for simulation using a set of test matrices. After simulation is verified by checking the results of test inputs the code is tested for synthesizability. After the synthesizability is verified then it is finally tested for hardware verification by dumping into FPGA. Altera's DE1 board which consists a Cyclone-II series FPGA EP2C20F484C7 FPGA is used for this study. The test inputs can be fed in either by using on board GPIO or UI or S RAM. The outputs are taken the same way either by GPIO or UI or written to S RAM and are then to be verified by comparing with actual results.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"91 1","pages":"87-90"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85874536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6992948
A. Parashar
Transmission Control Protocol is one of the key protocol of Transport Layer in TCP/IP Protocols suite. While IP transmits data between individual computers on the Internet, TCP transfers data between actual applications running on the system. TCP provides connection oriented and reliable data stream. TCP achieves this reliability by assigning a sequence number to each segment it transmits and requiring a acknowledgment (ACK) from the receiving end. If the ACK is not received within the time-out interval, the data is retransmitted. This research paper describes improved Transmission Control Protocol model which transfers data efficiently among its peer.
{"title":"Improved transmission control protocol model","authors":"A. Parashar","doi":"10.1109/ICCICCT.2014.6992948","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6992948","url":null,"abstract":"Transmission Control Protocol is one of the key protocol of Transport Layer in TCP/IP Protocols suite. While IP transmits data between individual computers on the Internet, TCP transfers data between actual applications running on the system. TCP provides connection oriented and reliable data stream. TCP achieves this reliability by assigning a sequence number to each segment it transmits and requiring a acknowledgment (ACK) from the receiving end. If the ACK is not received within the time-out interval, the data is retransmitted. This research paper describes improved Transmission Control Protocol model which transfers data efficiently among its peer.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"28 1","pages":"161-164"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81350850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993047
Rachit Sapra, Michael J. Mathew, S. Majumder
Robot motion planning in workspace suffers from issues like multiple Inverse Kinematics solutions and computationally expensive collision detection. The concept of Configuration Space was thus introduced in robotics to ease the problem of motion planning. This paper presents an approach to transform obstacles in the workspace to obstacles in the Configuration space for a 2 Degree of Freedom (DOF) R-R planar manipulator. The proposed algorithm uses a single primitive using which various convex and non-convex obstacles in the world can be transformed to their configuration space equivalent. The explicit construction of entire obstacle in configuration space is computationally expensive. Thus, only the boundaries of obstacle in configuration space have been generated by utilizing the properties of configuration space transforms. This approach can be generalized, with some modifications, to represent configuration space obstacles for robots with higher DOF. After reading this paper, the reader should be able to understand the need for configuration space in robotics, some of its essential properties and be able to construct one for planar manipulators.
{"title":"Efficient computation of configuration space transforms for collision-free motion planning","authors":"Rachit Sapra, Michael J. Mathew, S. Majumder","doi":"10.1109/ICCICCT.2014.6993047","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993047","url":null,"abstract":"Robot motion planning in workspace suffers from issues like multiple Inverse Kinematics solutions and computationally expensive collision detection. The concept of Configuration Space was thus introduced in robotics to ease the problem of motion planning. This paper presents an approach to transform obstacles in the workspace to obstacles in the Configuration space for a 2 Degree of Freedom (DOF) R-R planar manipulator. The proposed algorithm uses a single primitive using which various convex and non-convex obstacles in the world can be transformed to their configuration space equivalent. The explicit construction of entire obstacle in configuration space is computationally expensive. Thus, only the boundaries of obstacle in configuration space have been generated by utilizing the properties of configuration space transforms. This approach can be generalized, with some modifications, to represent configuration space obstacles for robots with higher DOF. After reading this paper, the reader should be able to understand the need for configuration space in robotics, some of its essential properties and be able to construct one for planar manipulators.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"1 1","pages":"684-689"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89646467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993108
P. Y. Muhammed Anshad, S. Sushanth Kumar
Computer Aided Diagnosis (CAD) is one of the trusted methods in the field of medicine. CAD system assists the doctors for the diagnosis of diseases in higher degree of perfection within a short period of time. Now CAD is the most preferable method for the initial diagnosis of cancer using X-ray, CT, mammogram or MRI images. CAD works as an intermediate in between the radiologist and the input images. The output from CAD doesn't think about as a final result however used as a reference for more tests in the relevant field. In fact CAD helps the doctors for detection of cancer more precisely and early. The combination of artificial intelligence, digital image processing technique and radiological image processing etc makes the CAD system more reliable and efficient. Sensitivity, specificity, absolute detection rate etc are the important parameters of the CAD system. Now CAD system is mostly used for breast cancer detection, lung cancer detection, colon cancer, coronary artery disease, congenital heart defect, lung cancer, bone cancer, brain tumor etc. Any part of body can affect cancer and very high possibility to spread other parts. These days CAD system developed to a great extends, however it's not reached to 100% accuracy. In this article that discusses the necessary options, motivation, findings from the early developments and future expansions of CAD systems.
{"title":"Recent methods for the detection of tumor using computer aided diagnosis — A review","authors":"P. Y. Muhammed Anshad, S. Sushanth Kumar","doi":"10.1109/ICCICCT.2014.6993108","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993108","url":null,"abstract":"Computer Aided Diagnosis (CAD) is one of the trusted methods in the field of medicine. CAD system assists the doctors for the diagnosis of diseases in higher degree of perfection within a short period of time. Now CAD is the most preferable method for the initial diagnosis of cancer using X-ray, CT, mammogram or MRI images. CAD works as an intermediate in between the radiologist and the input images. The output from CAD doesn't think about as a final result however used as a reference for more tests in the relevant field. In fact CAD helps the doctors for detection of cancer more precisely and early. The combination of artificial intelligence, digital image processing technique and radiological image processing etc makes the CAD system more reliable and efficient. Sensitivity, specificity, absolute detection rate etc are the important parameters of the CAD system. Now CAD system is mostly used for breast cancer detection, lung cancer detection, colon cancer, coronary artery disease, congenital heart defect, lung cancer, bone cancer, brain tumor etc. Any part of body can affect cancer and very high possibility to spread other parts. These days CAD system developed to a great extends, however it's not reached to 100% accuracy. In this article that discusses the necessary options, motivation, findings from the early developments and future expansions of CAD systems.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"10 1","pages":"1014-1019"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79695359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-10DOI: 10.1109/ICCICCT.2014.6993106
K. J. Mohan, Riboy Cheriyan
In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPSK, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL.
{"title":"Proficient receptive combined address generator archetypal for WiMAX and WiFi deinterleaver precinct","authors":"K. J. Mohan, Riboy Cheriyan","doi":"10.1109/ICCICCT.2014.6993106","DOIUrl":"https://doi.org/10.1109/ICCICCT.2014.6993106","url":null,"abstract":"In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPSK, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"48 1","pages":"1005-1009"},"PeriodicalIF":0.0,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85606138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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