Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059444
C. Cooper, Bruce Hughes
Additive manufacturing has revolutionized the way products are designed and fabricated to include the field of printed electronics. Direct write (DW) technologies used to print three-dimensional (3D) electronic and sensor devices have experienced spectacular growth due to their capability to offer rapid prototyping of high-performance devices for a broad range of applications. This growth is driven by many factors to include significantly reduced design-to-product lead time and fabrication of complex geometries on conformal and flexible substrates. Originally developed by the Defense Advanced Research Projects Agency (DARPA) Mesoscopic Integrated Conformal Electronics (MICE) Program for the fabrication of mesoscale electronics, DW technologies have been explored for a range of applications including active and passive components, sensors, 3D structures, as well as applications in biology. This paper focuses on one emerging DW approach, Aerosol Jet Printing (AJP), as a non-contact method to print fine features using different types of materials over various surfaces. Aerosol Jet systems are able to print a wide variety of electronically, optically, and biologically functional materials on geometrically complex substrates that can be conformal, flexible, and stretchable. The Aerosol Jet process utilizes printable inks based on solutions or nanoparticle suspensions and can include metals, alloys, ceramics, polymers, adhesives, and/or biomaterials. A wide variety of substrates, to include silicon, polyimide, glass, FR-4 and aluminum oxide can be used to print these materials provided the ink is compatible with the substrate. Like other DW technologies, the AJP process offers the distinct benefit of fabrication without conventional masks, with a reduction in material consumption due to selective deposition of inks at digitally defined locations on the substrate. Use of this additive process eliminates the waste of hazardous materials used in the etching processes employed by subtractive methods. AJP systems use an atomizer to create a dense aerosol of micro-droplets that are focused into an aerosol stream, resulting in deposits that can be one tenth the size of the nozzle opening at a standoff height of up to 5 millimeters. These capabilities enable the fabrication of highly integrated devices expanding from the originally targeted mesoscale application to micro- and nano-scale applications. Design and innovative fabrication of more connected and “smart” products can be realized using AJP to meet the miniaturized, flexible, and conformal form factors desired in today's Internet of Things (IoT) global marketplace. AJP technology has opened up new avenues for bio-integrated electronics to include electronic textiles, wearable electrochemical systems, electronic epidermal tattoos, and permanent and dissolvable implantable devices. While it has been demonstrated that AJP is an enabling technology in the growing field of wearable devices, there are major c
{"title":"Aerosol Jet Printing of Electronics: An Enabling Technology for Wearable Devices","authors":"C. Cooper, Bruce Hughes","doi":"10.23919/PanPacific48324.2020.9059444","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059444","url":null,"abstract":"Additive manufacturing has revolutionized the way products are designed and fabricated to include the field of printed electronics. Direct write (DW) technologies used to print three-dimensional (3D) electronic and sensor devices have experienced spectacular growth due to their capability to offer rapid prototyping of high-performance devices for a broad range of applications. This growth is driven by many factors to include significantly reduced design-to-product lead time and fabrication of complex geometries on conformal and flexible substrates. Originally developed by the Defense Advanced Research Projects Agency (DARPA) Mesoscopic Integrated Conformal Electronics (MICE) Program for the fabrication of mesoscale electronics, DW technologies have been explored for a range of applications including active and passive components, sensors, 3D structures, as well as applications in biology. This paper focuses on one emerging DW approach, Aerosol Jet Printing (AJP), as a non-contact method to print fine features using different types of materials over various surfaces. Aerosol Jet systems are able to print a wide variety of electronically, optically, and biologically functional materials on geometrically complex substrates that can be conformal, flexible, and stretchable. The Aerosol Jet process utilizes printable inks based on solutions or nanoparticle suspensions and can include metals, alloys, ceramics, polymers, adhesives, and/or biomaterials. A wide variety of substrates, to include silicon, polyimide, glass, FR-4 and aluminum oxide can be used to print these materials provided the ink is compatible with the substrate. Like other DW technologies, the AJP process offers the distinct benefit of fabrication without conventional masks, with a reduction in material consumption due to selective deposition of inks at digitally defined locations on the substrate. Use of this additive process eliminates the waste of hazardous materials used in the etching processes employed by subtractive methods. AJP systems use an atomizer to create a dense aerosol of micro-droplets that are focused into an aerosol stream, resulting in deposits that can be one tenth the size of the nozzle opening at a standoff height of up to 5 millimeters. These capabilities enable the fabrication of highly integrated devices expanding from the originally targeted mesoscale application to micro- and nano-scale applications. Design and innovative fabrication of more connected and “smart” products can be realized using AJP to meet the miniaturized, flexible, and conformal form factors desired in today's Internet of Things (IoT) global marketplace. AJP technology has opened up new avenues for bio-integrated electronics to include electronic textiles, wearable electrochemical systems, electronic epidermal tattoos, and permanent and dissolvable implantable devices. While it has been demonstrated that AJP is an enabling technology in the growing field of wearable devices, there are major c","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"27 1","pages":"1-11"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90324004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059311
John Quackenbush
In medicine, a physician's goal is to evaluate a patient's physical condition, perform tests to obtain information, synthesize that information, and, based on experience and standard medical practice, arrive at a course of treatment for that patient. Medical research tests health and medical interventions in a controlled fashion, comparing matched treatment and control groups, with the goal of identifying those interventions that provide a robust and statistically significant improvement in patient outcomes. But despite a commitment to “evidence-based medicine,” most patient care remains anecdotal at best. Even therapies certified through clinical trials often fail to perform as well outside of the initial study population and ae used “off label” in groups in which the therapy has not been rigorously tested.
{"title":"Data will Drive the Healthcare Revolution","authors":"John Quackenbush","doi":"10.23919/PanPacific48324.2020.9059311","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059311","url":null,"abstract":"In medicine, a physician's goal is to evaluate a patient's physical condition, perform tests to obtain information, synthesize that information, and, based on experience and standard medical practice, arrive at a course of treatment for that patient. Medical research tests health and medical interventions in a controlled fashion, comparing matched treatment and control groups, with the goal of identifying those interventions that provide a robust and statistically significant improvement in patient outcomes. But despite a commitment to “evidence-based medicine,” most patient care remains anecdotal at best. Even therapies certified through clinical trials often fail to perform as well outside of the initial study population and ae used “off label” in groups in which the therapy has not been rigorously tested.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"47 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85691706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059369
Xiaohan Wu, Ruijing Ge, Myungsoo Kim, D. Akinwande, Jack C. Lee
Since the discovery of graphene, two-dimensional (2D) materials have drawn much attention as a promising candidate in the next-generation electron devices, optoelectronics and bioelectronics1, 2. Over the last few years, researchers have proved the existence of the non-volatile resistance switching (NVRS) behavior in various 2D materials, including graphene oxide, functionalized MoS2, partially degraded black phosphorus and multi-layer hexagonal boron-nitride (h-BN), etc.3–6, where the resistance can be switched between a high-resistance state (HRS) and a low-resistance state (LRS) and maintained for a long time without power supply 7. In 2015, Sangwan et al. discovered that grain boundaries in single-layer MoS2 can produce NVRS based on planar (horizontal) structure8. However, the planar structure without 3D stacking ability has the limitation of low integration density. Therefore, to overcome vertical scaling obstacle in NVRS based on conventional metal-insulator-metal (MIM) structure, it is desired to find out the thinnest materials that can produce the resistance switching behavior based on vertical device structure. Recently, we discovered that NVRS phenomenon is accessible in a variety of single-layer transition metal dichalcogenides (TMDs) and single-layer h-BN in vertical MIM configuration9–12. Compared with other 2D material-based NVRS devices, single-layer h-BN has only one atomic layer and ∼0.33 nm in thickness, which is the thinnest active layer in non-volatile resistance memory. These devices can be collectively labelled as “atomristor”, which means the memristor effect in atomically thin nanomaterials. The TMDs and h-BN atomristors have been studied using a crossbar or a litho-free & transfer-free structure, demonstrating forming-free switching with large on/off ratio (up to 6 orders of magnitude) and low switching voltage (down to < 1V). In addition, the devices are proved via pulse operation with fast switching speed (< 15 ns), which is comparable to the state-of-the-art speed in 2D memristors. The non-volatile RF switches based on h-BN atomristors are realized with low insertion loss (< 0.2 dB) and high isolation (> 15 dB) up to 100 GHz. The operating frequencies cover the RF, 5G, and mm-wave bands, making this a promising low-power switch for diverse communication and connectivity front-end systems. The results of this work indicate a potential universal resistive switching behavior in 2D monolayers, which is applicable to memory technology, neuromorphic computing, RF switch and flexible electronics.
{"title":"Atomristors: Non-Volatile Resistance Switching in 2D Monolayers","authors":"Xiaohan Wu, Ruijing Ge, Myungsoo Kim, D. Akinwande, Jack C. Lee","doi":"10.23919/PanPacific48324.2020.9059369","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059369","url":null,"abstract":"Since the discovery of graphene, two-dimensional (2D) materials have drawn much attention as a promising candidate in the next-generation electron devices, optoelectronics and bioelectronics1, 2. Over the last few years, researchers have proved the existence of the non-volatile resistance switching (NVRS) behavior in various 2D materials, including graphene oxide, functionalized MoS2, partially degraded black phosphorus and multi-layer hexagonal boron-nitride (h-BN), etc.3–6, where the resistance can be switched between a high-resistance state (HRS) and a low-resistance state (LRS) and maintained for a long time without power supply 7. In 2015, Sangwan et al. discovered that grain boundaries in single-layer MoS2 can produce NVRS based on planar (horizontal) structure8. However, the planar structure without 3D stacking ability has the limitation of low integration density. Therefore, to overcome vertical scaling obstacle in NVRS based on conventional metal-insulator-metal (MIM) structure, it is desired to find out the thinnest materials that can produce the resistance switching behavior based on vertical device structure. Recently, we discovered that NVRS phenomenon is accessible in a variety of single-layer transition metal dichalcogenides (TMDs) and single-layer h-BN in vertical MIM configuration9–12. Compared with other 2D material-based NVRS devices, single-layer h-BN has only one atomic layer and ∼0.33 nm in thickness, which is the thinnest active layer in non-volatile resistance memory. These devices can be collectively labelled as “atomristor”, which means the memristor effect in atomically thin nanomaterials. The TMDs and h-BN atomristors have been studied using a crossbar or a litho-free & transfer-free structure, demonstrating forming-free switching with large on/off ratio (up to 6 orders of magnitude) and low switching voltage (down to < 1V). In addition, the devices are proved via pulse operation with fast switching speed (< 15 ns), which is comparable to the state-of-the-art speed in 2D memristors. The non-volatile RF switches based on h-BN atomristors are realized with low insertion loss (< 0.2 dB) and high isolation (> 15 dB) up to 100 GHz. The operating frequencies cover the RF, 5G, and mm-wave bands, making this a promising low-power switch for diverse communication and connectivity front-end systems. The results of this work indicate a potential universal resistive switching behavior in 2D monolayers, which is applicable to memory technology, neuromorphic computing, RF switch and flexible electronics.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"112 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87896752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059449
Y. Orii, S. Hirose, Hiroki Toda, Masakazu Kobayashi
As the use of IT increases importance with big data and AI, the issue of power consumption has been highlighted. Under these circumstances, the development of new materials is more and more important. Materials Informatics (MI) is one of the hottest technologies in the material development field, because of its potential to reduce the time and costs of discovering innovative materials. To achieve this, the key is to collect data that has been accumulated for many years at research institutions and companies, and to make information extracted from the data into knowledge. This article introduces the development of two methods based on AI: the “cognitive approach”, which reads vast amounts of literature information and digitizes data, and the “analytic approach”, which theoretically estimates the structure and physical properties of chemical substances from predictive models.
{"title":"Development of Materials Informatics Platform","authors":"Y. Orii, S. Hirose, Hiroki Toda, Masakazu Kobayashi","doi":"10.23919/PanPacific48324.2020.9059449","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059449","url":null,"abstract":"As the use of IT increases importance with big data and AI, the issue of power consumption has been highlighted. Under these circumstances, the development of new materials is more and more important. Materials Informatics (MI) is one of the hottest technologies in the material development field, because of its potential to reduce the time and costs of discovering innovative materials. To achieve this, the key is to collect data that has been accumulated for many years at research institutions and companies, and to make information extracted from the data into knowledge. This article introduces the development of two methods based on AI: the “cognitive approach”, which reads vast amounts of literature information and digitizes data, and the “analytic approach”, which theoretically estimates the structure and physical properties of chemical substances from predictive models.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"35 2","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72617456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059547
Y. Taira
Recent advancement of information and communication technology requires high-bandwidth data transmission. Signal transmission using optical fibers is widely used because of its extremely large signal bandwidth and length product. Since the signals in VLSIs are electrical, there is always a need for EO/OE converters in a form of optical transceiver/receiver. As the required I/O bandwidth to/from VLSIs such as switch chips and CPUs increases, conventional VLSI packaging faces the I/O bandwidth bottleneck. Optical co-packaging or optical transceivers on the package is the solution, where high bandwidth data I/O is carried out without using the bottom I/O channels of the package module. Although early examples of optical co-packaging relied on a package-on-package approach where packaged optical transceivers are socket mounted on a VLSI package, the whole package needs to be re-evaluated to support the volume demand to enable wide use of optical co-packaging such as for large-scale data-centers and 5G network. The assembly process and the long-term reliability of the components are some of the key matrices. The technology options will be discussed to realize optical co-packaging in terms of design materials and processing.
{"title":"Technology for Optical Co-Packaging","authors":"Y. Taira","doi":"10.23919/PanPacific48324.2020.9059547","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059547","url":null,"abstract":"Recent advancement of information and communication technology requires high-bandwidth data transmission. Signal transmission using optical fibers is widely used because of its extremely large signal bandwidth and length product. Since the signals in VLSIs are electrical, there is always a need for EO/OE converters in a form of optical transceiver/receiver. As the required I/O bandwidth to/from VLSIs such as switch chips and CPUs increases, conventional VLSI packaging faces the I/O bandwidth bottleneck. Optical co-packaging or optical transceivers on the package is the solution, where high bandwidth data I/O is carried out without using the bottom I/O channels of the package module. Although early examples of optical co-packaging relied on a package-on-package approach where packaged optical transceivers are socket mounted on a VLSI package, the whole package needs to be re-evaluated to support the volume demand to enable wide use of optical co-packaging such as for large-scale data-centers and 5G network. The assembly process and the long-term reliability of the components are some of the key matrices. The technology options will be discussed to realize optical co-packaging in terms of design materials and processing.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"1 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72729117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059395
T. Jensen, R. Lasky
Modern electronics require an extremely large number of circuits to perform their many impressive feats. For example, a modern smartphone can have several billion logic circuits in the main microprocessor. This circuit density creates a significant amount of heat that must be dissipated. If the heat is not adequately dissipated, the life expectancy and performance of the circuits are significantly reduced.
{"title":"The Basics of Metal Thermal Interface Materials (TIMs)","authors":"T. Jensen, R. Lasky","doi":"10.23919/PanPacific48324.2020.9059395","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059395","url":null,"abstract":"Modern electronics require an extremely large number of circuits to perform their many impressive feats. For example, a modern smartphone can have several billion logic circuits in the main microprocessor. This circuit density creates a significant amount of heat that must be dissipated. If the heat is not adequately dissipated, the life expectancy and performance of the circuits are significantly reduced.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"70 1","pages":"1-9"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74773221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059308
E. Fossum
As of 2020, CMOS image sensors are expected to enable the production of about 200 cameras every second around the world, or over 6 billion per year. In this talk, the story of how we got here is briefly presented, from CCDs, to the invention of the CMOS image sensor at the NASA Jet Propulsion Laboratory in the 1990s, to the present.
{"title":"The Invention of CMOS Image Sensors: A Camera in Every Pocket","authors":"E. Fossum","doi":"10.23919/PanPacific48324.2020.9059308","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059308","url":null,"abstract":"As of 2020, CMOS image sensors are expected to enable the production of about 200 cameras every second around the world, or over 6 billion per year. In this talk, the story of how we got here is briefly presented, from CCDs, to the invention of the CMOS image sensor at the NASA Jet Propulsion Laboratory in the 1990s, to the present.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"52 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75951857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059347
P. Wesling
The new Heterogeneous Integration Roadmap (HIR) provides a long-term vision for the electronics industry, identifying difficult future challenges and potential solutions. Under the sponsorship of SEMI, ASME, and three IEEE Societies, the roadmap offers professionals, industry, academia, and research institutes a comprehensive view of the landscape and strategic technology requirements for the electronics industry's evolution over the next 15 years, and provides a 25-year vision for the heterogeneous integration of emerging devices and emerging materials with longer research and development timelines. The purpose is to stimulate precompetitive collaboration and thereby accelerate the pace of progress. The International Technology Roadmap for Semiconductors (ITRS) set the cadence for the Moore's Law scaling that has been the norm for the semiconductor industry. However, because of scaling, cost and power-dissipation issues, as well as the laws of physics, the final ITRS was issued in 2015. The HIR pulls together many strands of that earlier Roadmap, to focus on microelectronics design, materials and packaging issues. The current version covers 2.5D, 3D, and wafer-level packaging, integrated photonics, MEMS and sensors, and system-in-package (SiP); support areas such as test, thermal, simulation, co-design, and interconnects; as well as application areas such as high-performance computing, 5G, medical, aerospace, automotive, and mobile – detailing both near-term and longer-term metrics and goals. It identifies difficult future challenges and proposes potential solutions. Comprising the output of 22 Technical Working Groups with worldwide participation, it will be substantially updated every two years. Version 1.0 is available freely for download, as well as in the form of a printed softbound book. Details for accessing this new Roadmap are presented. An invitation is made for involvement in version 2.0, now under preparation.
{"title":"The Heterogeneous Integration Roadmap: Enabling Technology for Systems of the Future","authors":"P. Wesling","doi":"10.23919/PanPacific48324.2020.9059347","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059347","url":null,"abstract":"The new Heterogeneous Integration Roadmap (HIR) provides a long-term vision for the electronics industry, identifying difficult future challenges and potential solutions. Under the sponsorship of SEMI, ASME, and three IEEE Societies, the roadmap offers professionals, industry, academia, and research institutes a comprehensive view of the landscape and strategic technology requirements for the electronics industry's evolution over the next 15 years, and provides a 25-year vision for the heterogeneous integration of emerging devices and emerging materials with longer research and development timelines. The purpose is to stimulate precompetitive collaboration and thereby accelerate the pace of progress. The International Technology Roadmap for Semiconductors (ITRS) set the cadence for the Moore's Law scaling that has been the norm for the semiconductor industry. However, because of scaling, cost and power-dissipation issues, as well as the laws of physics, the final ITRS was issued in 2015. The HIR pulls together many strands of that earlier Roadmap, to focus on microelectronics design, materials and packaging issues. The current version covers 2.5D, 3D, and wafer-level packaging, integrated photonics, MEMS and sensors, and system-in-package (SiP); support areas such as test, thermal, simulation, co-design, and interconnects; as well as application areas such as high-performance computing, 5G, medical, aerospace, automotive, and mobile – detailing both near-term and longer-term metrics and goals. It identifies difficult future challenges and proposes potential solutions. Comprising the output of 22 Technical Working Groups with worldwide participation, it will be substantially updated every two years. Version 1.0 is available freely for download, as well as in the form of a printed softbound book. Details for accessing this new Roadmap are presented. An invitation is made for involvement in version 2.0, now under preparation.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"207 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73935829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059339
P. Lall, Vikas Yadav, David Locker
Applications in downhole drilling, automotive industry and avionics industry require exposure of electronics to sustained high temperatures electronics combined with vibration loads. In these conditions, maximum temperature can exceed 200 °C and vibration G-level up to 10G. Combined effect of elevated temperature and vibration can cause faster failure in electronics components. In this study, reliability for SAC105 and SAC305 electronics operation at elevated test temperature and vibration has been studied. Pristine and aged test board with lead-free SAC daisy chain CABGA packages have been subjected to harmonic vibration at their 1st natural frequency at three test temperatures (25°C, 55°C and 155°C) and vibration with amplitude of 5G, 10G and 14g. Test boards were exposed to isothermal aging conditions at 150°C for 60 days. Hysteresis loop and plastic work density of critical solder joint extracted using FEA based global and local method. S-N curves were obtained for test vehicle. Failure mode analysis has been done for test board. Anand Viscoplasticity material data from the prior studies by the authors have been used to capture the high-strain rate temperature dependent aging behavior of the solder joints. A new model has been proposed to predict the high frequency fatigue life under simultaneous temperature-vibration.
{"title":"Sustained High-Temperature Vibration Reliability of Thermally Aged Leadfree Assemblies in Automotive Environments","authors":"P. Lall, Vikas Yadav, David Locker","doi":"10.23919/PanPacific48324.2020.9059339","DOIUrl":"https://doi.org/10.23919/PanPacific48324.2020.9059339","url":null,"abstract":"Applications in downhole drilling, automotive industry and avionics industry require exposure of electronics to sustained high temperatures electronics combined with vibration loads. In these conditions, maximum temperature can exceed 200 °C and vibration G-level up to 10G. Combined effect of elevated temperature and vibration can cause faster failure in electronics components. In this study, reliability for SAC105 and SAC305 electronics operation at elevated test temperature and vibration has been studied. Pristine and aged test board with lead-free SAC daisy chain CABGA packages have been subjected to harmonic vibration at their 1st natural frequency at three test temperatures (25°C, 55°C and 155°C) and vibration with amplitude of 5G, 10G and 14g. Test boards were exposed to isothermal aging conditions at 150°C for 60 days. Hysteresis loop and plastic work density of critical solder joint extracted using FEA based global and local method. S-N curves were obtained for test vehicle. Failure mode analysis has been done for test board. Anand Viscoplasticity material data from the prior studies by the authors have been used to capture the high-strain rate temperature dependent aging behavior of the solder joints. A new model has been proposed to predict the high frequency fatigue life under simultaneous temperature-vibration.","PeriodicalId":6691,"journal":{"name":"2020 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"117 1","pages":"1-18"},"PeriodicalIF":0.0,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76870523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-02-01DOI: 10.23919/PanPacific48324.2020.9059459
Ranjan Chatterjee, D. Gamota
The Vertical Segments of the Electronic Products Manufacturing Industry (Semiconductor, Outsourced System Assembly, and Test, and Printed Circuit Board Assembly) are converging and service offerings are consolidating due to advanced technology adoption and market dynamics. The convergence will cause shifts in the flow of materials across the supply chain as well as the introduction of equipment and processes across the segments. The ability to develop Smart Manufacturing and Industry 4.0 enabling technologies (e.g., big data analytics, artificial intelligence, cloud/edge computing, robotics, automation, IoT) that can be deployed within and between the Vertical Segments is critical. A Smart Manufacturing Technology Working Group (TWG) was formed by International Electronics Manufacturing Initiative (iNEMI) that included thought leaders from across the electronic products manufacturing industry. The TWG published a roadmap that included the situation analysis, critical gaps and key needs to realize Smart Manufacturing.
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