Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675218
F. Hao, S. Karpov, R. Talalaev
Miniaturization of LED chip dimensions raises up numerous exploitation problems. At high current densities, both thermal droop and non-thermal droop caused by Auger recombination reduce the LED efficiency. At low current densities, a similar reduction originates from carrier surface recombination at the sidewalls of the chip. In addition, size-dependent current crowding and device self-heating interfere the main LED characteristics. Therefore, careful physics-based optimization of the LED design is necessary to make feasible development of the efficient mini- and micro-LEDs. Coupled electrical-thermal-optical simulations are applied to identify key mechanisms affecting the device performance, which is dependent on the chip size. The paper shows how modeling and simulation can serve for better understanding of mini- and micro-LED operation and for optimization of their designs and operation conditions.
{"title":"Scaling and optimization of chip design for mini- and micro-LEDs","authors":"F. Hao, S. Karpov, R. Talalaev","doi":"10.1109/SSLChinaIFWS54608.2021.9675218","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675218","url":null,"abstract":"Miniaturization of LED chip dimensions raises up numerous exploitation problems. At high current densities, both thermal droop and non-thermal droop caused by Auger recombination reduce the LED efficiency. At low current densities, a similar reduction originates from carrier surface recombination at the sidewalls of the chip. In addition, size-dependent current crowding and device self-heating interfere the main LED characteristics. Therefore, careful physics-based optimization of the LED design is necessary to make feasible development of the efficient mini- and micro-LEDs. Coupled electrical-thermal-optical simulations are applied to identify key mechanisms affecting the device performance, which is dependent on the chip size. The paper shows how modeling and simulation can serve for better understanding of mini- and micro-LED operation and for optimization of their designs and operation conditions.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"19 1","pages":"146-149"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82672305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675169
Yu Liu, M. Luo
An experiment was carried out to explore visual comfort when reading grey texts on uniform neutral backgrounds at five illuminance levels (0, 10, 100, 500, and 1000 lx) among three age groups. A total of 20 children, 20 adults and 20 aged observers participated in the experiment using a 6-category points method. The display white was set at 500 cd/m2 and 6500K. Visual comfort is defined as visibility in this case. The findings suggested that lightness contrast of the aged group around L * of 100 to give better visual comfort. For children and the adult groups, positive lightness contrast around 50 to give better visual comfort. The results also showed that white or black was not the best background for children and adults observers, and background colours had little effect for the aged observers. Visual comfort for the children and adult observers decreases when there is a reduction of illuminance level. For the aged observers, illuminance reaches 10 lx to achieve the best visual comfort, then visual comfort decreases as the illuminance level increases.
{"title":"Effects of Ambient Illuminance on Visual Comfort for Reading for different age groups","authors":"Yu Liu, M. Luo","doi":"10.1109/SSLChinaIFWS54608.2021.9675169","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675169","url":null,"abstract":"An experiment was carried out to explore visual comfort when reading grey texts on uniform neutral backgrounds at five illuminance levels (0, 10, 100, 500, and 1000 lx) among three age groups. A total of 20 children, 20 adults and 20 aged observers participated in the experiment using a 6-category points method. The display white was set at 500 cd/m2 and 6500K. Visual comfort is defined as visibility in this case. The findings suggested that lightness contrast of the aged group around L * of 100 to give better visual comfort. For children and the adult groups, positive lightness contrast around 50 to give better visual comfort. The results also showed that white or black was not the best background for children and adults observers, and background colours had little effect for the aged observers. Visual comfort for the children and adult observers decreases when there is a reduction of illuminance level. For the aged observers, illuminance reaches 10 lx to achieve the best visual comfort, then visual comfort decreases as the illuminance level increases.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"1 1","pages":"184-186"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87154434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675222
Cheng Haijuan, G. Weiling, Ma Qijing, Guo Hao, Qin Yalong
In order to study the performance of GaN schottky barrier diodes (SBD) with different structures, the forward and reverse characteristics of GaN SBD with original, hybrid anode and gate controlled edge terminal (GET) are simulated, and the effects of the structural parameters of each device on the electrical characteristics are compared. The simulation results show that the turn-on voltage of hybrid anode GaN SBD is the lowest (0.74V),The forward current is the largest, the breakdown voltage is in the middle. The turn-on voltage of GET GaN SBD is in the middle, and the forward current is lower than that of original structure, but the breakdown voltage is the highest, reaching 1586V. Comprehensively considered, the performance of GET GaN SBD is the best.
为了研究不同结构GaN肖特基势垒二极管(SBD)的性能，模拟了原始、混合阳极和栅极控制边缘终端(GET)的GaN肖特基势垒二极管(SBD)的正向和反向特性，并比较了每种器件的结构参数对其电学特性的影响。仿真结果表明，混合阳极GaN SBD的导通电压最低(0.74V)，正向电流最大，击穿电压在中间。GET GaN SBD的导通电压处于中间位置，正向电流低于原结构，但击穿电压最高，达到1586V。综合考虑，GET GaN SBD的性能最好。
{"title":"Performance Simulation of GaN SBD With Different Structures","authors":"Cheng Haijuan, G. Weiling, Ma Qijing, Guo Hao, Qin Yalong","doi":"10.1109/SSLChinaIFWS54608.2021.9675222","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675222","url":null,"abstract":"In order to study the performance of GaN schottky barrier diodes (SBD) with different structures, the forward and reverse characteristics of GaN SBD with original, hybrid anode and gate controlled edge terminal (GET) are simulated, and the effects of the structural parameters of each device on the electrical characteristics are compared. The simulation results show that the turn-on voltage of hybrid anode GaN SBD is the lowest (0.74V),The forward current is the largest, the breakdown voltage is in the middle. The turn-on voltage of GET GaN SBD is in the middle, and the forward current is lower than that of original structure, but the breakdown voltage is the highest, reaching 1586V. Comprehensively considered, the performance of GET GaN SBD is the best.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"26 1","pages":"42-44"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81627601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675246
Weining Liu, Zicheng Yu, Xing Wei, L. Zhang, Guohao Yu, B. Zhang
In this paper, we adopted electrodeless photoelectrochemical etching technology to fabricate the enhancement-mode high electron mobility transistors (HEMTs). The technique of photoelectrochemical etching is a low damage etching method. Enhancement-mode recess gate HEMTs were successfully fabricated after electrodeless photoelectrochemical etching. While, in terms of IDmax, compared with 505 mA/mm of non-etched depletion devices, the output current of the recess gate device is slightly reduced to 495 mA/mm. It shows that this etching method has low etching damage to GaN and is suitable for the fabrication of recess gate devices.
{"title":"Fabrication of enhancement-mode high electron mobility transistors (HEMTs) by electrodeless photoelectrochemical etching","authors":"Weining Liu, Zicheng Yu, Xing Wei, L. Zhang, Guohao Yu, B. Zhang","doi":"10.1109/SSLChinaIFWS54608.2021.9675246","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675246","url":null,"abstract":"In this paper, we adopted electrodeless photoelectrochemical etching technology to fabricate the enhancement-mode high electron mobility transistors (HEMTs). The technique of photoelectrochemical etching is a low damage etching method. Enhancement-mode recess gate HEMTs were successfully fabricated after electrodeless photoelectrochemical etching. While, in terms of IDmax, compared with 505 mA/mm of non-etched depletion devices, the output current of the recess gate device is slightly reduced to 495 mA/mm. It shows that this etching method has low etching damage to GaN and is suitable for the fabrication of recess gate devices.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"112 1","pages":"36-38"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79366005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675223
Hui Liu, Baoshun Zhang, Jinyan Wang, C. Zeng, Zhiqun Cheng, Z. Dong
In this paper, we developed a tapered-gate SiC VDMOSFET. The upper part of the gate of the new structure is vertical structure, and the lower part is V-shaped structure. In addition, there are also two P+ shielding layers on both sides below the gate. Simulation results reveal that the special structure is more conducive to the flow of electrons to the drift region, and the P+ shield can also protect the gate dielectric layer in the reverse blocking. In the optimized structure, the specific ON-resistance of the device reduced by 12.1%, and the current density increased by 46.6%. The figure of merit (FoM = V2BV/Ron) is 1.27 kV2/mΩ.cm2. The tapered-gate SiC VDMOSFET we designed can obtain higher current density in a smaller area, low ON-Resistance and high breakdown voltage.
{"title":"4H-SiC Tapered-Gate MOSFET with Low ON-resistance and Hight Current Density","authors":"Hui Liu, Baoshun Zhang, Jinyan Wang, C. Zeng, Zhiqun Cheng, Z. Dong","doi":"10.1109/SSLChinaIFWS54608.2021.9675223","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675223","url":null,"abstract":"In this paper, we developed a tapered-gate SiC VDMOSFET. The upper part of the gate of the new structure is vertical structure, and the lower part is V-shaped structure. In addition, there are also two P+ shielding layers on both sides below the gate. Simulation results reveal that the special structure is more conducive to the flow of electrons to the drift region, and the P+ shield can also protect the gate dielectric layer in the reverse blocking. In the optimized structure, the specific ON-resistance of the device reduced by 12.1%, and the current density increased by 46.6%. The figure of merit (FoM = V2BV/Ron) is 1.27 kV2/mΩ.cm2. The tapered-gate SiC VDMOSFET we designed can obtain higher current density in a smaller area, low ON-Resistance and high breakdown voltage.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"124 1","pages":"10-12"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77458538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675165
Guojie Hu, Guanglei Zhong, Xuejian Xie, Xianglong Yang, Xiufang Chen, Yan Peng, X. Hu, Xiangang Xu, Jisheng Han, K. Cheong
The morphology and distribution of polytypes are studied by confocal laser scanning microscopy (CLSM) and Micro-Raman spectroscopy. Based on the experimental results, two possible formation mechanisms of foreign polytypes are proposed. One phenomenon is that the polytype transition interface tilts toward the seed crystal plane, which is related to the step flow growth mechanism. By reducing the crystal growth rate at the starting point of the step, this foreign polytypes can be effectively avoided. Another phenomenon is that the polytype transition interface is parallel to the seed crystal plane, which usually occurs in the later growth stage. This is related to the increase of the temperature of the growth front, which is also confirmed by the theoretical simulation results obtained by commercial VR™-PVT SiC software.
{"title":"Formation Mechanism of Two Types of Polytype Transformation in off-axis 4H-SiC Boules","authors":"Guojie Hu, Guanglei Zhong, Xuejian Xie, Xianglong Yang, Xiufang Chen, Yan Peng, X. Hu, Xiangang Xu, Jisheng Han, K. Cheong","doi":"10.1109/SSLChinaIFWS54608.2021.9675165","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675165","url":null,"abstract":"The morphology and distribution of polytypes are studied by confocal laser scanning microscopy (CLSM) and Micro-Raman spectroscopy. Based on the experimental results, two possible formation mechanisms of foreign polytypes are proposed. One phenomenon is that the polytype transition interface tilts toward the seed crystal plane, which is related to the step flow growth mechanism. By reducing the crystal growth rate at the starting point of the step, this foreign polytypes can be effectively avoided. Another phenomenon is that the polytype transition interface is parallel to the seed crystal plane, which usually occurs in the later growth stage. This is related to the increase of the temperature of the growth front, which is also confirmed by the theoretical simulation results obtained by commercial VR™-PVT SiC software.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"20 1","pages":"74-77"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81425952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Micro-LED is regarded as a new type of display panel technology with its advantages of high luminous efficiency, fast response speed, and high contrast. ITO film has been used widely in optoelectronic devices due to its low resistivity, high light transmittance, and good adhesion to the substrate. In this paper, Micro-LEDs with ITO thickness of 50nm and 110nm are designed and prepared. The size of Micro-LED is 40, 60, 80, 100µm, respectively. The performance of those Micro-LED was tested and analyzed. The result show that the thicker of ITO, has the smaller series resistance, and the smaller specific contact resistivity of P-GaN and ITO; when the current is low, ITO thickness is negatively correlated with the optical properties of Micro LED, while when the current is high, ITO thickness is positively correlated with the optical properties of Micro LED. For the 60um Micro LED, sample with 50nm ITO compared with that of 110nm ITO, the optical output power and luminous efficiency increased by 8.2% and 20.5% at current density is 278.89 A/cm2, but decreased by 10.33% and 7.3% at the current density 1666.67 A/cm2. In terms of heat, the thicker the ITO, the smaller the K factor, and the better thermal stability of Micro-LED.
{"title":"Effect of chip size and ITO thickness on Micro LED performance","authors":"Jiaxin Chen, Wei-ling Guo, Mengmei Li, Hao Guo, Hao Xu, Aoqi Fang","doi":"10.1109/SSLChinaIFWS54608.2021.9675202","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675202","url":null,"abstract":"Micro-LED is regarded as a new type of display panel technology with its advantages of high luminous efficiency, fast response speed, and high contrast. ITO film has been used widely in optoelectronic devices due to its low resistivity, high light transmittance, and good adhesion to the substrate. In this paper, Micro-LEDs with ITO thickness of 50nm and 110nm are designed and prepared. The size of Micro-LED is 40, 60, 80, 100µm, respectively. The performance of those Micro-LED was tested and analyzed. The result show that the thicker of ITO, has the smaller series resistance, and the smaller specific contact resistivity of P-GaN and ITO; when the current is low, ITO thickness is negatively correlated with the optical properties of Micro LED, while when the current is high, ITO thickness is positively correlated with the optical properties of Micro LED. For the 60um Micro LED, sample with 50nm ITO compared with that of 110nm ITO, the optical output power and luminous efficiency increased by 8.2% and 20.5% at current density is 278.89 A/cm2, but decreased by 10.33% and 7.3% at the current density 1666.67 A/cm2. In terms of heat, the thicker the ITO, the smaller the K factor, and the better thermal stability of Micro-LED.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"76 1","pages":"139-142"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83902269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675276
M. I. Niass, M. Sharif, Yi-fu Wang, Fang Wang, Yuhuai Liu
Exploiting the advanced LASTIP-Crosslight simulator, theoretical analysis for a novel edge emitting laser diode (EELD) composed of trinary Boron Gallium Nitride BxGa1-xN is performed in this work to enhance the P-type conductivity. The simulation results obtained with a prototypical proposal expect lasing at a target UVC wavelength of 270 nm. Furthermore, the minimum direct-resistance can be obtained under the N-electrode area width of 0.5 µm or the P-electrode area width of 3 µm. This result is attributed to the linear and nonlinear relationships between the direct-resistance and the width sizes of N-electrode and P-electrode.
{"title":"Deep Ultraviolet Edge Emitting Laser Diode Using Novel Boron Gallium Nitride over Sapphire Substrate: Simulation Study","authors":"M. I. Niass, M. Sharif, Yi-fu Wang, Fang Wang, Yuhuai Liu","doi":"10.1109/SSLChinaIFWS54608.2021.9675276","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675276","url":null,"abstract":"Exploiting the advanced LASTIP-Crosslight simulator, theoretical analysis for a novel edge emitting laser diode (EELD) composed of trinary Boron Gallium Nitride BxGa1-xN is performed in this work to enhance the P-type conductivity. The simulation results obtained with a prototypical proposal expect lasing at a target UVC wavelength of 270 nm. Furthermore, the minimum direct-resistance can be obtained under the N-electrode area width of 0.5 µm or the P-electrode area width of 3 µm. This result is attributed to the linear and nonlinear relationships between the direct-resistance and the width sizes of N-electrode and P-electrode.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"22 1","pages":"86-90"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88402577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675205
Cheng Ruan, Tianyu Xu, Ya. Huang, Yang Wang
With the rapid development of social science, technology and economy, the attention of domestic classroom healthy lighting light environment continues to rise. At present, there is insufficient in-depth research on the lighting light quality and light health of the research area. The paper takes the blackboard lighting quality and the visual comfort of teachers and students as the research object. We summarize and analyze the current blackboard lighting products, and put forward lighting design suggestions to help children and adolescents' vision health.
{"title":"Research and discussion on classroom blackboard lighting","authors":"Cheng Ruan, Tianyu Xu, Ya. Huang, Yang Wang","doi":"10.1109/SSLChinaIFWS54608.2021.9675205","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675205","url":null,"abstract":"With the rapid development of social science, technology and economy, the attention of domestic classroom healthy lighting light environment continues to rise. At present, there is insufficient in-depth research on the lighting light quality and light health of the research area. The paper takes the blackboard lighting quality and the visual comfort of teachers and students as the research object. We summarize and analyze the current blackboard lighting products, and put forward lighting design suggestions to help children and adolescents' vision health.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"21 1","pages":"187-190"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86984978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-06DOI: 10.1109/SSLChinaIFWS54608.2021.9675183
Hao Xu, Weiling Guo, Jie Deng, Jiaxin Chen, Dong Li, Jie Sun
To further improve the performance of the LED and seek a better electrode structure of LED, this paper designs and prepares a variety of devices with different electrode window sizes and spacings based on the P/N electrode discontinuous ohmic contact LED. By comparing the influence of different electrode window sizes and spacings on the photoelectric performance of LED under 5-500mA driving current, the best performance electrode window size and spacing are obtained. The test results in this paper show that when the N electrode window spacing is reduced from 45µm to 37µm, the device voltage decreases, and the spectral area increases. When the size of the N electrode window is reduced from 5µm×17µm to 5µm×10µm, although the voltage of the device has increased, the luminous efficiency under the rated current of 150mA is increased by 4.9%. When the distance between the P electrode windows is increased from 20µm to 30µm, the voltage of the device will increase, but the luminous efficiency under the test current of 150mA is increased by 7.2%. Although the size of the P electrode window has little effect on the light-emitting performance of the device, increasing the size of the P electrode window to a certain extent can improve the electrical characteristics of the device. The best structure obtained in this paper to improve the light-emitting performance of the device is: the size of the N electrode window is 5µm×10µm, and the spacing is 37µm; the size of the P electrode window is 15µm×5µm, and the spacing is 30µm.
{"title":"Optimization of P/N discontinuous ohmic contact LED","authors":"Hao Xu, Weiling Guo, Jie Deng, Jiaxin Chen, Dong Li, Jie Sun","doi":"10.1109/SSLChinaIFWS54608.2021.9675183","DOIUrl":"https://doi.org/10.1109/SSLChinaIFWS54608.2021.9675183","url":null,"abstract":"To further improve the performance of the LED and seek a better electrode structure of LED, this paper designs and prepares a variety of devices with different electrode window sizes and spacings based on the P/N electrode discontinuous ohmic contact LED. By comparing the influence of different electrode window sizes and spacings on the photoelectric performance of LED under 5-500mA driving current, the best performance electrode window size and spacing are obtained. The test results in this paper show that when the N electrode window spacing is reduced from 45µm to 37µm, the device voltage decreases, and the spectral area increases. When the size of the N electrode window is reduced from 5µm×17µm to 5µm×10µm, although the voltage of the device has increased, the luminous efficiency under the rated current of 150mA is increased by 4.9%. When the distance between the P electrode windows is increased from 20µm to 30µm, the voltage of the device will increase, but the luminous efficiency under the test current of 150mA is increased by 7.2%. Although the size of the P electrode window has little effect on the light-emitting performance of the device, increasing the size of the P electrode window to a certain extent can improve the electrical characteristics of the device. The best structure obtained in this paper to improve the light-emitting performance of the device is: the size of the N electrode window is 5µm×10µm, and the spacing is 37µm; the size of the P electrode window is 15µm×5µm, and the spacing is 30µm.","PeriodicalId":6816,"journal":{"name":"2021 18th China International Forum on Solid State Lighting & 2021 7th International Forum on Wide Bandgap Semiconductors (SSLChina: IFWS)","volume":"118 1","pages":"105-108"},"PeriodicalIF":0.0,"publicationDate":"2021-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83486438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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