Pub Date : 2025-09-24DOI: 10.1109/LMWT.2025.3606516
Jijun Ren;Chenyang Wang;Mian Wu;Yukun Liu;Yikai Li
In short-wave communication systems, the nonlinear characteristics and memory effects of high-frequency power amplifiers (HF-PAs) result in in-band intermodulation distortion (IMD) and out-of-band harmonic distortion, which significantly degrade communication quality. Digital predistortion (DPD) techniques primarily target IMD suppression; however, the harmonic components occur at integer multiples of the fundamental frequency, which is beyond the sampling bandwidth range of the DPD system. As a result, they cannot be directly modeled digitally and must be suppressed using cascaded external analog filters. To overcome these limitations, this letter proposes a novel DPD model based on an enhanced echo state network (ESN). The input signal is processed through bidirectional time delay and nonlinear order expansion, and the resulting features are fed into ESN to more effectively capture the nonlinear memory effects of HF-PA. The experimental results demonstrate that the proposed model significantly reduces IMD components and suppresses the second and third harmonics to below –59 and –62 dBc, respectively.
{"title":"An Integrated Scheme of Enhanced Echo State Network of Harmonic Cancellation Digital Predistortion for Short-Wave Power Amplifiers","authors":"Jijun Ren;Chenyang Wang;Mian Wu;Yukun Liu;Yikai Li","doi":"10.1109/LMWT.2025.3606516","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3606516","url":null,"abstract":"In short-wave communication systems, the nonlinear characteristics and memory effects of high-frequency power amplifiers (HF-PAs) result in in-band intermodulation distortion (IMD) and out-of-band harmonic distortion, which significantly degrade communication quality. Digital predistortion (DPD) techniques primarily target IMD suppression; however, the harmonic components occur at integer multiples of the fundamental frequency, which is beyond the sampling bandwidth range of the DPD system. As a result, they cannot be directly modeled digitally and must be suppressed using cascaded external analog filters. To overcome these limitations, this letter proposes a novel DPD model based on an enhanced echo state network (ESN). The input signal is processed through bidirectional time delay and nonlinear order expansion, and the resulting features are fed into ESN to more effectively capture the nonlinear memory effects of HF-PA. The experimental results demonstrate that the proposed model significantly reduces IMD components and suppresses the second and third harmonics to below –59 and –62 dBc, respectively.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"36 1","pages":"139-142"},"PeriodicalIF":3.4,"publicationDate":"2025-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-22DOI: 10.1109/LMWT.2025.3609698
Qiyao Jiang;Zhuo Xu;Zaize Chen;Jun Yin;Liang Wu;Quan Pan;Rui P. Martins;Pui-In Mak
This letter presents a terahertz (THz) lensless source-combining triple-push (SCTP) radiator. By combining the three-phase outputs through the transistor source nodes, large 3rd-harmonic components are introduced in both gate-to-source and drain-to-source voltages, significantly enhancing the amplitude of the 3rd-harmonic current ($I_{{mathrm d_3mathrm f0}}$ ) and resulting in high output power and dc-to-THz efficiency. Fabricated in 65-nm CMOS, the 272.3-to-281.3-GHz radiator prototype delivers an effective isotropic radiated power (EIRP) of −2.26 dBm and a radiated power ($P_{textrm {rad}}$ ) of −8.46 dBm at 279.7 GHz, without using a silicon lens. The radiator consumes 56.9 mW and achieves a high dc-to-$P_{textrm {rad}}$ efficiency of 0.25%.
{"title":"A 280-GHz Lensless Triple-Push Radiator With Source-Combining Technique","authors":"Qiyao Jiang;Zhuo Xu;Zaize Chen;Jun Yin;Liang Wu;Quan Pan;Rui P. Martins;Pui-In Mak","doi":"10.1109/LMWT.2025.3609698","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3609698","url":null,"abstract":"This letter presents a terahertz (THz) lensless source-combining triple-push (SCTP) radiator. By combining the three-phase outputs through the transistor source nodes, large 3<sup>rd</sup>-harmonic components are introduced in both gate-to-source and drain-to-source voltages, significantly enhancing the amplitude of the 3<sup>rd</sup>-harmonic current (<inline-formula> <tex-math>$I_{{mathrm d_3mathrm f0}}$ </tex-math></inline-formula>) and resulting in high output power and dc-to-THz efficiency. Fabricated in 65-nm CMOS, the 272.3-to-281.3-GHz radiator prototype delivers an effective isotropic radiated power (EIRP) of −2.26 dBm and a radiated power (<inline-formula> <tex-math>$P_{textrm {rad}}$ </tex-math></inline-formula>) of −8.46 dBm at 279.7 GHz, without using a silicon lens. The radiator consumes 56.9 mW and achieves a high dc-to-<inline-formula> <tex-math>$P_{textrm {rad}}$ </tex-math></inline-formula> efficiency of 0.25%.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2085-2088"},"PeriodicalIF":3.4,"publicationDate":"2025-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-18DOI: 10.1109/LMWT.2025.3604314
{"title":"IEEE Microwave and Wireless Technology Letters Information for Authors","authors":"","doi":"10.1109/LMWT.2025.3604314","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3604314","url":null,"abstract":"","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 9","pages":"C3-C3"},"PeriodicalIF":3.4,"publicationDate":"2025-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11173200","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145078631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-08DOI: 10.1109/LMWT.2025.3605152
Amit Ranjan Azad;Akhilesh Mohan
In the above article [1], the authors have presented a compact dual-band dual-mode substrate integrated waveguide (SIW) balanced bandpass filter with common-mode (CM) suppression. The filter is designed using a single perturbed SIW circular cavity. The metallic vias and slot perturbations are introduced to tune the first four resonant modes in order to create a dual-band response. However, we noticed that the mechanism of producing the dual bands described in the above paper [1] was originally reported in our paper [2], in which a single perturbed SIW circular cavity was utilized to generate dual-band characteristics. The metallic vias and slotlines were introduced as perturbation elements to create two passbands and tune them independently. The dual-band filters demonstrated in [1] and [2] are presented below to highlight the originality of our work.
{"title":"Comments on “Compact Dual-Band Dual-Mode SIW Balanced BPF With Intrinsic Common-Mode Suppression”","authors":"Amit Ranjan Azad;Akhilesh Mohan","doi":"10.1109/LMWT.2025.3605152","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3605152","url":null,"abstract":"In the above article [1], the authors have presented a compact dual-band dual-mode substrate integrated waveguide (SIW) balanced bandpass filter with common-mode (CM) suppression. The filter is designed using a single perturbed SIW circular cavity. The metallic vias and slot perturbations are introduced to tune the first four resonant modes in order to create a dual-band response. However, we noticed that the mechanism of producing the dual bands described in the above paper [1] was originally reported in our paper [2], in which a single perturbed SIW circular cavity was utilized to generate dual-band characteristics. The metallic vias and slotlines were introduced as perturbation elements to create two passbands and tune them independently. The dual-band filters demonstrated in [1] and [2] are presented below to highlight the originality of our work.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2097-2097"},"PeriodicalIF":3.4,"publicationDate":"2025-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article reports a 5-bit wideband vector-modulator phase shifter (VMPS) for submillimeter-wave (sub-mmW) and terahertz (THz) phased-array systems. To achieve a high-resolution broadband phase-shifting feature, a comb-shaped differential quadrature coupler is proposed to reduce the phase/amplitude imbalances of in-phase and quadrature signals across the broadband frequencies. In addition, to mitigate the impact of the input impedance variations of the variable gain amplifier-based vector modulator (VM) on phase characteristics, fourth-order input matching networks are adopted for the VM modules. Fabricated on a 0.13-$mu $ m SiGe BiCMOS process, the chip occupies a core area of 0.15 mm2 and consumes 25.6 mW. Measured results show that the VMPS achieves 360° coverage with 64 states and provides 5-bit phase accuracy from 184 to 236 GHz, exhibiting near calibration-free characteristics. It features $a lt 7.5^{circ }$ rms phase error in 190–230 GHz and $a lt 1.5$ -dB rms amplitude error in 180–230 GHz.
{"title":"A G-Band 5-Bit Vector-Modulator Phase Shifter With 52-GHz Bandwidth for Phased-Array Systems in 0.13-μm SiGe BiCMOS","authors":"Nengxu Zhu;Huiying Wu;Bing Liu;Yue Zhang;Xin Zhang;Zhen Yang;Zenglong Zhao;Yiting Zhang;Zhifu Hu;Meilin He;Keyuan Chen;Fanyi Meng","doi":"10.1109/LMWT.2025.3604591","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3604591","url":null,"abstract":"This article reports a 5-bit wideband vector-modulator phase shifter (VMPS) for submillimeter-wave (sub-mmW) and terahertz (THz) phased-array systems. To achieve a high-resolution broadband phase-shifting feature, a comb-shaped differential quadrature coupler is proposed to reduce the phase/amplitude imbalances of in-phase and quadrature signals across the broadband frequencies. In addition, to mitigate the impact of the input impedance variations of the variable gain amplifier-based vector modulator (VM) on phase characteristics, fourth-order input matching networks are adopted for the VM modules. Fabricated on a 0.13-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m SiGe BiCMOS process, the chip occupies a core area of 0.15 mm<sup>2</sup> and consumes 25.6 mW. Measured results show that the VMPS achieves 360° coverage with 64 states and provides 5-bit phase accuracy from 184 to 236 GHz, exhibiting near calibration-free characteristics. It features <inline-formula> <tex-math>$a lt 7.5^{circ }$ </tex-math></inline-formula> rms phase error in 190–230 GHz and <inline-formula> <tex-math>$a lt 1.5$ </tex-math></inline-formula>-dB rms amplitude error in 180–230 GHz.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2077-2080"},"PeriodicalIF":3.4,"publicationDate":"2025-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-05DOI: 10.1109/LMWT.2025.3603604
Xuan Li;Mai Luo;Hai Ye;Fanyi Meng
This letter presents a mm-wave variable gain amplifier (VGA) supporting the fifth-generation (5G) new radio frequency range 2 (NR FR2), implemented in an 180-nm silicon-germanium (SiGe) bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. To reduce gain and phase errors within the wideband range, a resistor–capacitor (RC) feedback-based phase compensation technique is proposed. The proposed circuit architecture comprises a cascode low-noise amplifier (LNA) stage cascaded with a current-steering VGA stage. Measurement results demonstrate that the circuit achieves a gain adjustment range of −4.1 to 15.9 dB across 12 to 47 GHz, with a 3-dB fractional bandwidth of up to 118.6%. The measured root-mean-square (rms) phase and gain errors are less than 4.5° and 0.67 dB, respectively, while occupying a core area of merely 0.1 mm2.
{"title":"A Compact 12 to 47 GHz Variable Gain Amplifier With Low Gain/Phase Errors for 5G NR FR2","authors":"Xuan Li;Mai Luo;Hai Ye;Fanyi Meng","doi":"10.1109/LMWT.2025.3603604","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3603604","url":null,"abstract":"This letter presents a mm-wave variable gain amplifier (VGA) supporting the fifth-generation (5G) new radio frequency range 2 (NR FR2), implemented in an 180-nm silicon-germanium (SiGe) bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. To reduce gain and phase errors within the wideband range, a resistor–capacitor (<italic>RC</i>) feedback-based phase compensation technique is proposed. The proposed circuit architecture comprises a cascode low-noise amplifier (LNA) stage cascaded with a current-steering VGA stage. Measurement results demonstrate that the circuit achieves a gain adjustment range of −4.1 to 15.9 dB across 12 to 47 GHz, with a 3-dB fractional bandwidth of up to 118.6%. The measured root-mean-square (rms) phase and gain errors are less than 4.5° and 0.67 dB, respectively, while occupying a core area of merely 0.1 mm<sup>2</sup>.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2069-2072"},"PeriodicalIF":3.4,"publicationDate":"2025-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This letter presents a D-band frequency doubler employing a novel single-waveguide single-substrate (SWSS) structure, integrating two vertically mirrored Schottky barrier diode (SBD) chips on a 50-$mu $ m quartz substrate for low-loss power combining. The optimal diode embedding impedance is extracted using broadband load-pull techniques and transformed through a hybrid waveguide-microstrip matching network. Independent bias control for the two SBD chips enables partial compensation for performance degradation caused by the SBD chip imbalance. For verification, the proposed SWSS doubler is fabricated and measured with an output power of 12–14 dBm and an efficiency of 10%–15.8% across 120–158 GHz. Compared with similar reports, this work exhibits superior overall performance in bandwidth, output power, and efficiency.
{"title":"A D-Band Single-Waveguide Single-Substrate Doubler Using Vertically Mirrored Schottky Diodes for Low-Loss Power Combining","authors":"Xiang Wu;Yang Liu;Xun Xiong;Fan Yang;Hao Jiang;Feiliang Chen;Mo Li;Jian Zhang","doi":"10.1109/LMWT.2025.3601002","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3601002","url":null,"abstract":"This letter presents a D-band frequency doubler employing a novel single-waveguide single-substrate (SWSS) structure, integrating two vertically mirrored Schottky barrier diode (SBD) chips on a 50-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m quartz substrate for low-loss power combining. The optimal diode embedding impedance is extracted using broadband load-pull techniques and transformed through a hybrid waveguide-microstrip matching network. Independent bias control for the two SBD chips enables partial compensation for performance degradation caused by the SBD chip imbalance. For verification, the proposed SWSS doubler is fabricated and measured with an output power of 12–14 dBm and an efficiency of 10%–15.8% across 120–158 GHz. Compared with similar reports, this work exhibits superior overall performance in bandwidth, output power, and efficiency.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2073-2076"},"PeriodicalIF":3.4,"publicationDate":"2025-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-22DOI: 10.1109/LMWT.2025.3597259
Quang-Huy Do;Dinh-Nhan Pham;Sang-Woong Yoon
We present a two-port phase conjugator with excellent isolation for retro-directive short-range wireless power transfer (WPT) applications within the 2.4–2.5-GHz frequency range, including the industrial, scientific, and medical (ISM) band. The phase conjugator employs a Gilbert-cell mixer with a leakage power cancellation technique to enhance isolation and improve beamforming accuracy. The leakage power canceller consists of a power divider/combiner, a phase shifter, and an attenuator. A voltage-controlled oscillator (VCO) was incorporated to generate the switching signal for the mixer’s local oscillator (LO) port. The phase conjugator was implemented using Samsung’s 28-nm CMOS IC technology. At 2.5 GHz, measurement results show a maximum isolation of 73.9 dB, a conversion gain of −2.5 dB, an input 1-dB compression point (IP1dB) of −2 dBm, and a noise figure of 20 dB. The chip occupies an area of $1.3times 1.65$ mm, excluding bonding pads.
{"title":"Isolation-Enhanced Phase Conjugator Design for Retro-Directive Wireless Power Transfer System","authors":"Quang-Huy Do;Dinh-Nhan Pham;Sang-Woong Yoon","doi":"10.1109/LMWT.2025.3597259","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3597259","url":null,"abstract":"We present a two-port phase conjugator with excellent isolation for retro-directive short-range wireless power transfer (WPT) applications within the 2.4–2.5-GHz frequency range, including the industrial, scientific, and medical (ISM) band. The phase conjugator employs a Gilbert-cell mixer with a leakage power cancellation technique to enhance isolation and improve beamforming accuracy. The leakage power canceller consists of a power divider/combiner, a phase shifter, and an attenuator. A voltage-controlled oscillator (VCO) was incorporated to generate the switching signal for the mixer’s local oscillator (LO) port. The phase conjugator was implemented using Samsung’s 28-nm CMOS IC technology. At 2.5 GHz, measurement results show a maximum isolation of 73.9 dB, a conversion gain of −2.5 dB, an input 1-dB compression point (IP1dB) of −2 dBm, and a noise figure of 20 dB. The chip occupies an area of <inline-formula> <tex-math>$1.3times 1.65$ </tex-math></inline-formula> mm, excluding bonding pads.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2081-2084"},"PeriodicalIF":3.4,"publicationDate":"2025-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145766208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-19DOI: 10.1109/LMWT.2025.3599392
Youngseok Bae;Hyug Su Kwon;Minji Hyun
In this letter, we present an ultrawideband (UWB) photonic radar transceiver designed to penetrate obstacles and obtain images of targets hidden behind them. The proposed system uses a 2-GHz mode-locked laser (MLL), and its repetition rate is doubled by a pulse repetition rate multiplier (PRRM). Photonics-based frequency downconversion is employed to create UWB L-band linear frequency modulation (LFM) waveforms by mixing the MLL’s rate-multiplied pulses with an X-band LFM signal. With this photonic downconversion, the fractional bandwidth was increased from 9.52% to 62.07%, approximately a 6.5-fold improvement. A Sagnac loop interferometer facilitates the sensitive detection of received signals and enhances the beat signal power. This characteristic is important for detecting weak signals from targets hidden by obstacles. The feasibility of the proposed system to detect hidden threats was confirmed through a field experiment, in which high-resolution inverse synthetic aperture radar (ISAR) images of a drone concealed by a dense, foliage-simulating obstacle were acquired.
{"title":"A Novel Ultrawideband Photonic Radar for High-Resolution ISAR Imaging of Concealed Targets in a Field Experiment","authors":"Youngseok Bae;Hyug Su Kwon;Minji Hyun","doi":"10.1109/LMWT.2025.3599392","DOIUrl":"https://doi.org/10.1109/LMWT.2025.3599392","url":null,"abstract":"In this letter, we present an ultrawideband (UWB) photonic radar transceiver designed to penetrate obstacles and obtain images of targets hidden behind them. The proposed system uses a 2-GHz mode-locked laser (MLL), and its repetition rate is doubled by a pulse repetition rate multiplier (PRRM). Photonics-based frequency downconversion is employed to create UWB L-band linear frequency modulation (LFM) waveforms by mixing the MLL’s rate-multiplied pulses with an X-band LFM signal. With this photonic downconversion, the fractional bandwidth was increased from 9.52% to 62.07%, approximately a 6.5-fold improvement. A Sagnac loop interferometer facilitates the sensitive detection of received signals and enhances the beat signal power. This characteristic is important for detecting weak signals from targets hidden by obstacles. The feasibility of the proposed system to detect hidden threats was confirmed through a field experiment, in which high-resolution inverse synthetic aperture radar (ISAR) images of a drone concealed by a dense, foliage-simulating obstacle were acquired.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 12","pages":"2089-2092"},"PeriodicalIF":3.4,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145765631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}