Pub Date : 2024-01-09DOI: 10.1109/OJPEL.2024.3351147
Yasuhiko Miguchi;Hidemine Obara;Atsuo Kawamura
A single-phase grid-connected inverter with an unfolding circuit typically consists of a first-stage dc/dc converter, which generates fully rectified sinusoidal waveforms, and a second-stage unfolding inverter, which switches every 180° of the line frequency waveform. This converter exhibits low switching loss and high efficiency, and the operating principle of the unfolding inverter typically includes synchronous voltage and current. However, limited studies have focused on the operation of inverters with power factor (PF) less than unity. Such operations often result in large overshoots and oscillations in the output voltages. To address this problem, we proposed a novel control scheme that enables leading PF operation without additional circuitry and overcomes the aforementioned limitations in the previous literature. Thus, this paper describes a novel control scheme that enables lagging PF operation. Notably, for a lagging PF, a phenomenon in which the dc voltage inevitably increases immediately after unfolding is known to occur, and herein, this phenomenon is used in reverse to rapidly decrease the dc current. Consequently, we develop a method to land the circuit variables at normal mode steady-state value by using reverse-polarity pulse width modulation (PWM)/forward-polarity PWM combination of the unfolding inverter and a virtual PWM inverter in the proposed controller. The control method is validated using simulations and experiments, and it is found to facilitate the four-quadrant operation of the unfolding inverter.
{"title":"Control Scheme for the Lagging Power Factor Operation of a Single-Phase Grid-Connected Inverter Using an Unfolding Circuit","authors":"Yasuhiko Miguchi;Hidemine Obara;Atsuo Kawamura","doi":"10.1109/OJPEL.2024.3351147","DOIUrl":"https://doi.org/10.1109/OJPEL.2024.3351147","url":null,"abstract":"A single-phase grid-connected inverter with an unfolding circuit typically consists of a first-stage dc/dc converter, which generates fully rectified sinusoidal waveforms, and a second-stage unfolding inverter, which switches every 180° of the line frequency waveform. This converter exhibits low switching loss and high efficiency, and the operating principle of the unfolding inverter typically includes synchronous voltage and current. However, limited studies have focused on the operation of inverters with power factor (PF) less than unity. Such operations often result in large overshoots and oscillations in the output voltages. To address this problem, we proposed a novel control scheme that enables leading PF operation without additional circuitry and overcomes the aforementioned limitations in the previous literature. Thus, this paper describes a novel control scheme that enables lagging PF operation. Notably, for a lagging PF, a phenomenon in which the dc voltage inevitably increases immediately after unfolding is known to occur, and herein, this phenomenon is used in reverse to rapidly decrease the dc current. Consequently, we develop a method to land the circuit variables at normal mode steady-state value by using reverse-polarity pulse width modulation (PWM)/forward-polarity PWM combination of the unfolding inverter and a virtual PWM inverter in the proposed controller. The control method is validated using simulations and experiments, and it is found to facilitate the four-quadrant operation of the unfolding inverter.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10384719","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139572594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-27DOI: 10.1109/OJPEL.2023.3337510
{"title":"IEEE Open Journal of Power Electronics Information for Authors","authors":"","doi":"10.1109/OJPEL.2023.3337510","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3337510","url":null,"abstract":"","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10375140","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139050559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-27DOI: 10.1109/OJPEL.2023.3337508
{"title":"IEEE Power Electronics Society Information","authors":"","doi":"10.1109/OJPEL.2023.3337508","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3337508","url":null,"abstract":"","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10374558","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139050619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-25DOI: 10.1109/OJPEL.2023.3347036
Johannes Häring;Maximilian Hepp;Wolfgang Wondrak;Mark-M. Bakran
Neutral point clamped inverters, such as NPC, ANPC, or T-Type inverters, have emerged as competitive solutions for specific automotive traction applications due to the increase in DC-link voltage levels up to $800 ,mathrm{V}$ . Besides improved harmonic performance, certain 3-level inverter structures can provide a reconfigured failure mode operation in case of a semiconductor failure by applying a permanent neutral point connection in the faulty phase leg. This feature is a vital factor in the design of traction inverters, particularly in the context of fault-tolerant autonomous vehicles. During failure mode operation, none of the neutral point balancing techniques found in current literature are practical. Addressing this issue is crucial since the neutral point stress is high in this mode of operation. Therefore, this paper investigates the impact of stationary and dynamic neutral point voltage deviations on the motor flux in electric machines and offers a compensatory strategy for these errors. Furthermore, a new neutral point control method is presented that balances stationary neutral point voltage deviations by using a phase angle dependent voltage shift in the $alpha / beta$ -plane. All proposed strategies are first discussed theoretically and then verified by simulation and measurements on an $800 ,mathrm{V}$ IPMSM machine test bench.
{"title":"A Neutral Point Balancing and Voltage Error Compensation Approach for Fault-Tolerant 3-Level Inverters","authors":"Johannes Häring;Maximilian Hepp;Wolfgang Wondrak;Mark-M. Bakran","doi":"10.1109/OJPEL.2023.3347036","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3347036","url":null,"abstract":"Neutral point clamped inverters, such as NPC, ANPC, or T-Type inverters, have emerged as competitive solutions for specific automotive traction applications due to the increase in DC-link voltage levels up to \u0000<inline-formula><tex-math>$800 ,mathrm{V}$</tex-math></inline-formula>\u0000. Besides improved harmonic performance, certain 3-level inverter structures can provide a reconfigured failure mode operation in case of a semiconductor failure by applying a permanent neutral point connection in the faulty phase leg. This feature is a vital factor in the design of traction inverters, particularly in the context of fault-tolerant autonomous vehicles. During failure mode operation, none of the neutral point balancing techniques found in current literature are practical. Addressing this issue is crucial since the neutral point stress is high in this mode of operation. Therefore, this paper investigates the impact of stationary and dynamic neutral point voltage deviations on the motor flux in electric machines and offers a compensatory strategy for these errors. Furthermore, a new neutral point control method is presented that balances stationary neutral point voltage deviations by using a phase angle dependent voltage shift in the \u0000<inline-formula><tex-math>$alpha / beta$</tex-math></inline-formula>\u0000-plane. All proposed strategies are first discussed theoretically and then verified by simulation and measurements on an \u0000<inline-formula><tex-math>$800 ,mathrm{V}$</tex-math></inline-formula>\u0000 IPMSM machine test bench.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10373888","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139406676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-14DOI: 10.1109/OJPEL.2023.3343330
Kaveh Pouresmaeil;Maurice G.L. Roes;Nico H. Baars;Cornelis G.E. Wijnands
Medium-voltage connected ultra-fast chargers are getting more popular for charging electric vehicles with large battery capacities. Here, the solution based on a modular multilevel converter is more promising, since the isolation stage can be realized as a single medium-frequency transformer interconnecting the modular multilevel converter to a single-phase ac/dc converter. A new operating scheme is proposed for this converter, enabling zero-voltage switching and nearly zero-current switching across the entire load range. In contrast to the conventional phase-shift control method, the proposed scheme effectively reduces the reactive power through the ac/dc converter, leading to decreased turn-off switching losses in the ac/dc converter and a lower RMS current stress in the power path. A control scheme, integrating the operating principle, is developed for the modular multilevel converter. The method is verified through simulation and measurements on a scaled-down prototype. The results validate the theoretical analysis and practical feasibility of the proposed operating principle and the developed control scheme.
{"title":"Switching Loss Reduction for an MMC-Fed AC/DC Converter","authors":"Kaveh Pouresmaeil;Maurice G.L. Roes;Nico H. Baars;Cornelis G.E. Wijnands","doi":"10.1109/OJPEL.2023.3343330","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3343330","url":null,"abstract":"Medium-voltage connected ultra-fast chargers are getting more popular for charging electric vehicles with large battery capacities. Here, the solution based on a modular multilevel converter is more promising, since the isolation stage can be realized as a single medium-frequency transformer interconnecting the modular multilevel converter to a single-phase ac/dc converter. A new operating scheme is proposed for this converter, enabling zero-voltage switching and nearly zero-current switching across the entire load range. In contrast to the conventional phase-shift control method, the proposed scheme effectively reduces the reactive power through the ac/dc converter, leading to decreased turn-off switching losses in the ac/dc converter and a lower RMS current stress in the power path. A control scheme, integrating the operating principle, is developed for the modular multilevel converter. The method is verified through simulation and measurements on a scaled-down prototype. The results validate the theoretical analysis and practical feasibility of the proposed operating principle and the developed control scheme.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10360411","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139081226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-14DOI: 10.1109/OJPEL.2023.3341724
Sergio Jimenez;Andrew Lemmon;Arthur Boutry
The super-cascode switch (SCS) has gained significant attention in the last decade due to its ability to achieve medium-voltage ratings using low-voltage semiconductors. However, there exists a notable absence of quantitative metrics to effectively evaluate the performance of the SCS. This gap exists because the behavior of the SCS is different from that of a traditional semiconductor switch, and traditional semiconductor performance metrics are not adequate for its evaluation. The present manuscript addresses this gap by introducing new figures of merit that are designed to evaluate the unique characteristics of the SCS. The practical value of these metrics is also demonstrated through a set of experimental studies. By applying these new figures of merit to one of the best-performing SCS configurations described previously in the literature, several opportunities for improvement are revealed. The SCS prototype described in this paper is evaluated experimentally at bus voltage levels up to 3.5 kV and current levels up to 200 A, demonstrating substantial performance improvements relative to the baseline configuration from the literature. These improvements are the result of iterative refinements to the balancing network, which are selected through a process that is informed by the application of the proposed figures of merit.
{"title":"Novel Figures of Merit for Evaluating the Performance of the Super-Cascode Switch","authors":"Sergio Jimenez;Andrew Lemmon;Arthur Boutry","doi":"10.1109/OJPEL.2023.3341724","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3341724","url":null,"abstract":"The super-cascode switch (SCS) has gained significant attention in the last decade due to its ability to achieve medium-voltage ratings using low-voltage semiconductors. However, there exists a notable absence of quantitative metrics to effectively evaluate the performance of the SCS. This gap exists because the behavior of the SCS is different from that of a traditional semiconductor switch, and traditional semiconductor performance metrics are not adequate for its evaluation. The present manuscript addresses this gap by introducing new figures of merit that are designed to evaluate the unique characteristics of the SCS. The practical value of these metrics is also demonstrated through a set of experimental studies. By applying these new figures of merit to one of the best-performing SCS configurations described previously in the literature, several opportunities for improvement are revealed. The SCS prototype described in this paper is evaluated experimentally at bus voltage levels up to 3.5 kV and current levels up to 200 A, demonstrating substantial performance improvements relative to the baseline configuration from the literature. These improvements are the result of iterative refinements to the balancing network, which are selected through a process that is informed by the application of the proposed figures of merit.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10360405","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139399830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-14DOI: 10.1109/OJPEL.2023.3343167
Jan Wachter;Lutz Gröll;Veit Hagenmeyer
To reach the climate goals set by national and international institutions, a vast transition of the legacy power system is unavoidable. The necessary integration of distributed, renewable generation devices, which are often interfaced with power electronic converters, has a non-negligible influence on the characteristics of the power grid. This is particularly visible during abnormal grid conditions such as faults. For rotating machines, the fast-timescale reaction to these events is mainly determined by physical properties. However, power electronic devices lack this strong coupling and their behavior is generated by the control and automation system, making them a major field of interest during this transition. The present paper provides a survey of real-world incidents, as for example blackouts or oscillatory incidents, that are discussed with respect to the implications for future converter dominated power grids. For typical cascading outages it is shown, where the increasing penetration of distributed, renewable generation and smart grid technologies can be leveraged to increase the system resilience, e.g. by providing grid services through adequate control design or by enabling microgrid concepts. Further, real-world examples of newly emerging challenges driven by power electronic devices are presented. The mechanisms of control system interactions with the neighboring grid and its inherent complex dependency on various factors is illustrated. Lastly, resulting structural developments such as the changed resonance properties of low voltage grids and the increase of harmonic emissions are exemplified.
{"title":"Survey of Real-World Grid Incidents–Opportunities, Arising Challenges and Lessons Learned for the Future Converter Dominated Power System","authors":"Jan Wachter;Lutz Gröll;Veit Hagenmeyer","doi":"10.1109/OJPEL.2023.3343167","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3343167","url":null,"abstract":"To reach the climate goals set by national and international institutions, a vast transition of the legacy power system is unavoidable. The necessary integration of distributed, renewable generation devices, which are often interfaced with power electronic converters, has a non-negligible influence on the characteristics of the power grid. This is particularly visible during abnormal grid conditions such as faults. For rotating machines, the fast-timescale reaction to these events is mainly determined by physical properties. However, power electronic devices lack this strong coupling and their behavior is generated by the control and automation system, making them a major field of interest during this transition. The present paper provides a survey of real-world incidents, as for example blackouts or oscillatory incidents, that are discussed with respect to the implications for future converter dominated power grids. For typical cascading outages it is shown, where the increasing penetration of distributed, renewable generation and smart grid technologies can be leveraged to increase the system resilience, e.g. by providing grid services through adequate control design or by enabling microgrid concepts. Further, real-world examples of newly emerging challenges driven by power electronic devices are presented. The mechanisms of control system interactions with the neighboring grid and its inherent complex dependency on various factors is illustrated. Lastly, resulting structural developments such as the changed resonance properties of low voltage grids and the increase of harmonic emissions are exemplified.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10360292","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139060075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-12DOI: 10.1109/OJPEL.2023.3341701
Lukas Fräger;Jens Friebe
This paper presents the analysis and optimization procedure of a two-stage bidirectional AC/DC power supply. The exemplary power supply consists of a silicon carbide based active front end and a dual active bridge DC/DC converter. It is designed to supply 600 V DC applications from universal low voltage AC grids with a power up to 6 kW. The paper includes the topology and design considerations, as well as an in-depth loss distribution analysis based on a validated loss model. The loss model is then utilized for an operation space optimization. A special focus is drawn to the loss model and the optimization: It is based on analytical equations optimized for a low calculation effort. This enables quick modeling of a large operation space. Those results can both be used to validate design considerations as well as to optimize operating parameters. The presented dynamic operating parameter optimization enables a loss reduction at full load by 14% and at half load by even 48%. By means of the optimization the operating area can be expanded, losses decreased, and thermal stress reduced.
{"title":"Analysis and Optimization of the Loss Distribution for a Two Stage AC/DC Power Supply","authors":"Lukas Fräger;Jens Friebe","doi":"10.1109/OJPEL.2023.3341701","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3341701","url":null,"abstract":"This paper presents the analysis and optimization procedure of a two-stage bidirectional AC/DC power supply. The exemplary power supply consists of a silicon carbide based active front end and a dual active bridge DC/DC converter. It is designed to supply 600 V DC applications from universal low voltage AC grids with a power up to 6 kW. The paper includes the topology and design considerations, as well as an in-depth loss distribution analysis based on a validated loss model. The loss model is then utilized for an operation space optimization. A special focus is drawn to the loss model and the optimization: It is based on analytical equations optimized for a low calculation effort. This enables quick modeling of a large operation space. Those results can both be used to validate design considerations as well as to optimize operating parameters. The presented dynamic operating parameter optimization enables a loss reduction at full load by 14% and at half load by even 48%. By means of the optimization the operating area can be expanded, losses decreased, and thermal stress reduced.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10354357","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139937094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-07DOI: 10.1109/OJPEL.2023.3340268
Md. Mizanur Rahman;Yasser Abdel-Rady I. Mohamed
The parallel operation of power converters is essential to meet increased power demands. However, due to dynamic coupling, the instability in one converter can affect the stability of another. Therefore, this paper analyses the interaction and stability differences among the weak grid-tied photovoltaic (PV)-interfaced parallel voltage- and current-source converters (VSCs and CSCs) considering the PV generator (PVG) dynamics. Moreover, the impacts of the changing PVG operating points from the constant-voltage to a constant-current region (CVR to a CCR) and changing control parameters on converters' dynamic interaction are studied and compared in both cases. It is found that parallel VSCs dc-links suffer from low-frequency (<60>200 Hz) in parallel CSCs at the CCR with a short-circuit ratio (SCR) of 2.5. Moreover, the oscillation magnitude of injected power is higher in parallel VSCs compared to the parallel CSCs at SCR = 1.2. Therefore, a stabilization method is proposed for both systems to ensure reduced interactions and stable operation in the CVR, CCR, and maximum power regions at weak and very weak grid conditions. Finally, the proposed compensators' efficacy is validated via detailed nonlinear time-domain and real-time simulation results.
{"title":"Dynamic Interactions and Stabilization of Weak Grid-Tied Parallel VSCs and Parallel CSCs Systems Considering PVG Dynamic Resistance","authors":"Md. Mizanur Rahman;Yasser Abdel-Rady I. Mohamed","doi":"10.1109/OJPEL.2023.3340268","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3340268","url":null,"abstract":"The parallel operation of power converters is essential to meet increased power demands. However, due to dynamic coupling, the instability in one converter can affect the stability of another. Therefore, this paper analyses the interaction and stability differences among the weak grid-tied photovoltaic (PV)-interfaced parallel voltage- and current-source converters (VSCs and CSCs) considering the PV generator (PVG) dynamics. Moreover, the impacts of the changing PVG operating points from the constant-voltage to a constant-current region (CVR to a CCR) and changing control parameters on converters' dynamic interaction are studied and compared in both cases. It is found that parallel VSCs dc-links suffer from low-frequency (<60>200 Hz) in parallel CSCs at the CCR with a short-circuit ratio (SCR) of 2.5. Moreover, the oscillation magnitude of injected power is higher in parallel VSCs compared to the parallel CSCs at SCR = 1.2. Therefore, a stabilization method is proposed for both systems to ensure reduced interactions and stable operation in the CVR, CCR, and maximum power regions at weak and very weak grid conditions. Finally, the proposed compensators' efficacy is validated via detailed nonlinear time-domain and real-time simulation results.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10347347","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139041227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-07DOI: 10.1109/OJPEL.2023.3340220
Yingjian Zhuge;Junrui Liang;Minfan Fu;Teng Long;Haoyu Wang
With the advancements in power semiconductors and converters, power electronics based high-voltage pulse generators (HVPG) have emerged due to their advantages of high repetition rate, flexible control, long lifetime, and compact size. However, there is a lack of comprehensive literature review on recent advances in power electronics intensive HVPG technologies. To fill this gap, we present a systematic review on HVPGs. First, HVPGs are classified into different types based on their mechanisms. Each type along with its basic circuits and modifications are introduced. Then, the characteristics, advantages, and disadvantages of these topologies are summarized. Furthermore, the potential applications of HVPGs are explored. The performance of pulse generators mentioned in the literature and commercial products is listed. Finally, future trends and technical challenges in HVPG design and development are discussed. This paper provides a clear understanding of HVPGs and the inspiration of topologies developments to meet the specific requirements. Current state and potential future directions are discussed and summarized to facilitate evolvements in HVPG technology.
{"title":"Comprehensive Overview of Power Electronics Intensive Solutions for High-Voltage Pulse Generators","authors":"Yingjian Zhuge;Junrui Liang;Minfan Fu;Teng Long;Haoyu Wang","doi":"10.1109/OJPEL.2023.3340220","DOIUrl":"https://doi.org/10.1109/OJPEL.2023.3340220","url":null,"abstract":"With the advancements in power semiconductors and converters, power electronics based high-voltage pulse generators (HVPG) have emerged due to their advantages of high repetition rate, flexible control, long lifetime, and compact size. However, there is a lack of comprehensive literature review on recent advances in power electronics intensive HVPG technologies. To fill this gap, we present a systematic review on HVPGs. First, HVPGs are classified into different types based on their mechanisms. Each type along with its basic circuits and modifications are introduced. Then, the characteristics, advantages, and disadvantages of these topologies are summarized. Furthermore, the potential applications of HVPGs are explored. The performance of pulse generators mentioned in the literature and commercial products is listed. Finally, future trends and technical challenges in HVPG design and development are discussed. This paper provides a clear understanding of HVPGs and the inspiration of topologies developments to meet the specific requirements. Current state and potential future directions are discussed and summarized to facilitate evolvements in HVPG technology.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10347356","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138822168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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