Pub Date : 2024-08-15DOI: 10.1109/OJPEL.2024.3443921
Seungjin Jo;Guangyao Li;Junchen Xie;Dong-Hee Kim
This paper proposes a process for measuring the rated power electrical characteristics of inductive power transfer (IPT) coupling pads in limited laboratory environments through topology reconfiguration. Among the components of IPT systems, the coupling pad is responsible for the main losses in the converter. Moreover, coupling pads have nonlinear characteristics that depend on various factors, such as the number of coil turns, the diameter, the permeability of the magnetic material, and the amount of aluminum. Therefore, verifying the operation is necessary when applying various position and control algorithms after configuring an IPT system. The input/output characteristics of the IPT system are mainly determined by the coupling pad and the employed compensation topology. Verifying the operation of the coupling pad becomes challenging when the IPT application's required input/output characteristics exceed the experimental voltage range in laboratory environments. The same electrical stress is applied to the coupling pad through topology reconfiguration and resonance component tuning, and the input/output characteristics can be flexibly changed to present a guideline that can be tested in a laboratory environment. A 3-resonance component circuit allows for modeling various compensation topologies. The same electrical and heating stress are verified through a 3.3-kW experimental prototype.
{"title":"Measurement of Inductive Power Transfer Coupling Pad Stress by Reconfiguring the Double-Sided-LCC Topology in a Limited Laboratory Environment","authors":"Seungjin Jo;Guangyao Li;Junchen Xie;Dong-Hee Kim","doi":"10.1109/OJPEL.2024.3443921","DOIUrl":"https://doi.org/10.1109/OJPEL.2024.3443921","url":null,"abstract":"This paper proposes a process for measuring the rated power electrical characteristics of inductive power transfer (IPT) coupling pads in limited laboratory environments through topology reconfiguration. Among the components of IPT systems, the coupling pad is responsible for the main losses in the converter. Moreover, coupling pads have nonlinear characteristics that depend on various factors, such as the number of coil turns, the diameter, the permeability of the magnetic material, and the amount of aluminum. Therefore, verifying the operation is necessary when applying various position and control algorithms after configuring an IPT system. The input/output characteristics of the IPT system are mainly determined by the coupling pad and the employed compensation topology. Verifying the operation of the coupling pad becomes challenging when the IPT application's required input/output characteristics exceed the experimental voltage range in laboratory environments. The same electrical stress is applied to the coupling pad through topology reconfiguration and resonance component tuning, and the input/output characteristics can be flexibly changed to present a guideline that can be tested in a laboratory environment. A 3-resonance component circuit allows for modeling various compensation topologies. The same electrical and heating stress are verified through a 3.3-kW experimental prototype.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1267-1279"},"PeriodicalIF":5.0,"publicationDate":"2024-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10637674","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142169596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Designing power electronics converters for harsh environments is challenging due to the absence of components' performance under harsh conditions, the frequent transition and data-passing among various software, and the time-consuming and computationally heavy work flow. This paper promotes using design automation to address the aforementioned design challenges. The implementations include public-accessible component databases, automated co-action among circuit simulators and finite element simulations to perform electrical, electromagnetic and thermal co-design, and finally an exclusion-based work flow with hierarchical computation to reduce computational load. The theorized framework is exemplified on designing a real world 175 °C 1.5 kW Three-level Neutral-point-clamped dc-dc converter. A database containing the high-temperature characteristics of SiC MOSFETs and ferrites is established and shared through a web application with graphical user interface. In 310 min, the program, which includes computationally heavy 3D finite element simulation, delivers design output after evaluating the converter's electrical, electromagnetic and thermal performance under 10 million parameter sets. Finally, a 1.5 kW dc-dc converter prototype is built and tested in 175 °C ambient temperature to verify the quality of the design output.
恶劣环境下的电力电子转换器设计具有挑战性，这是因为缺乏恶劣条件下的元件性能、各种软件之间的频繁转换和数据传递，以及耗时和计算量大的工作流程。本文提倡使用设计自动化来解决上述设计难题。实现方法包括可公开访问的元件数据库，电路模拟器和有限元模拟之间的自动协同作用，以执行电气、电磁和热协同设计，最后是基于排除法的分层计算工作流，以减少计算负荷。该理论框架在设计现实世界中的 175 °C 1.5 kW 三电平中性点钳位直流-直流转换器时得到了验证。建立了一个包含碳化硅 MOSFET 和铁氧体高温特性的数据库，并通过带图形用户界面的网络应用程序进行共享。该程序包括计算量巨大的三维有限元仿真，在 310 分钟内完成了对转换器在 1000 万组参数下的电气、电磁和热性能的评估，并提供了设计输出。最后，制作了一个 1.5 千瓦直流-直流转换器原型，并在 175 °C 环境温度下进行了测试，以验证设计输出的质量。
{"title":"Design Automation Using Exclusion-Based Hierarchical Computation for Power Electronics Converters in Harsh Environments","authors":"Yudi Xiao;Zhe Zhang;Gabriel Zsurzsan;Michael A.E. Andersen;Martin MacFadyen;Yuchuan Liao;Rafael Pena Alzola;Weijia Yuan;Min Zhang","doi":"10.1109/OJPEL.2024.3439593","DOIUrl":"10.1109/OJPEL.2024.3439593","url":null,"abstract":"Designing power electronics converters for harsh environments is challenging due to the absence of components' performance under harsh conditions, the frequent transition and data-passing among various software, and the time-consuming and computationally heavy work flow. This paper promotes using design automation to address the aforementioned design challenges. The implementations include public-accessible component databases, automated co-action among circuit simulators and finite element simulations to perform electrical, electromagnetic and thermal co-design, and finally an exclusion-based work flow with hierarchical computation to reduce computational load. The theorized framework is exemplified on designing a real world 175 °C 1.5 kW Three-level Neutral-point-clamped dc-dc converter. A database containing the high-temperature characteristics of SiC MOSFETs and ferrites is established and shared through a web application with graphical user interface. In 310 min, the program, which includes computationally heavy 3D finite element simulation, delivers design output after evaluating the converter's electrical, electromagnetic and thermal performance under 10 million parameter sets. Finally, a 1.5 kW dc-dc converter prototype is built and tested in 175 °C ambient temperature to verify the quality of the design output.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1172-1181"},"PeriodicalIF":5.0,"publicationDate":"2024-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10631688","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141947995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-02DOI: 10.1109/OJPEL.2024.3437637
Matteo Dalboni;Alessandro Soldati
This study addresses the design of a distributed controller, mostly intended for modular applications where parallel-connected voltage-source converters (VSCs) operate loads in conditions of current continuity. The only requirement is that the modules are based on half-bridge architectures, possibly synchronous, such as buck, boost, half-bridge, full-bridge and three-phase bridges. The proposed controller can work with small (few microhenries) series inductors, mostly comparable with the stray inductance already existing in the wiring. Each regulator adjusts the pulse-width modulation (PWM) of a given converter based only on its own output current. Each PWM pattern is shifted on the nanosecond time scale using a peculiarly inexpensive software modulator. The overall control action allows achieving the synchronous operation of all converters at modulation frequency, thus suppressing the circulating current. The control strategy is mathematically designed through novel models, and experimentally validated employing three DC-DC converters. The study demonstrates (i) the feasibility and robustness of the method to compensate for both phase and frequency errors among the units, (ii) the capability of the controller to cope with the inherent parameter mismatch among the modules, and (iii) its ability to operate in tandem with a load balancing regulator.
{"title":"Distributed Controller for the Parallel Operation of Power Converters With Small Output Filters","authors":"Matteo Dalboni;Alessandro Soldati","doi":"10.1109/OJPEL.2024.3437637","DOIUrl":"10.1109/OJPEL.2024.3437637","url":null,"abstract":"This study addresses the design of a distributed controller, mostly intended for modular applications where parallel-connected voltage-source converters (VSCs) operate loads in conditions of current continuity. The only requirement is that the modules are based on half-bridge architectures, possibly synchronous, such as buck, boost, half-bridge, full-bridge and three-phase bridges. The proposed controller can work with small (few microhenries) series inductors, mostly comparable with the stray inductance already existing in the wiring. Each regulator adjusts the pulse-width modulation (PWM) of a given converter based only on its own output current. Each PWM pattern is shifted on the nanosecond time scale using a peculiarly inexpensive software modulator. The overall control action allows achieving the synchronous operation of all converters at modulation frequency, thus suppressing the circulating current. The control strategy is mathematically designed through novel models, and experimentally validated employing three DC-DC converters. The study demonstrates (i) the feasibility and robustness of the method to compensate for both phase and frequency errors among the units, (ii) the capability of the controller to cope with the inherent parameter mismatch among the modules, and (iii) its ability to operate in tandem with a load balancing regulator.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1297-1308"},"PeriodicalIF":5.0,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10621445","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141881197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ground power unit (GPU) converters are often required to efficiently manage power distribution in various ground-based applications, necessitating designs that balance performance, and cost-effectiveness. In this paper, a novel nine-level output converter using a single voltage source, 8 unidirectional and one bidirectional MOSFET switches, and two capacitors has been presented to utilize in GPUs. A simple modulation algorithm (PWM) has been applied to achieve a THD of 3.1% on the output voltage at 115/200 V and 400 Hz without the need for additional filtering. With a relatively small output filter, the THD is further reduced to less than 1%. The proposed converter utilized a lower number of devices to output a nine-level staircase in comparison to existing converters. Additionally, the proposed converter employs inherent self-voltage balancing for capacitor voltages, thereby simplifying the control algorithm. In this paper, the topology analysis, modulation algorithm, capacitor calculation, loss, efficiency, and performance analysis of the proposed topology have been presented. The proposed circuit has been compared to recently published papers in terms of switch, capacitor, diode, and source numbers. The theoretical and experimental performance of the topology has been verified by simulation on PSIM software and experimental setup.
{"title":"A Novel Reduced Switches Nine-Level Inverter Applicable in Aircraft Ground Power Unit","authors":"Reza Ebrahimi;Hossein Madadi Kojabadi;Hamed Jafari Kaleybar","doi":"10.1109/OJPEL.2024.3436693","DOIUrl":"10.1109/OJPEL.2024.3436693","url":null,"abstract":"Ground power unit (GPU) converters are often required to efficiently manage power distribution in various ground-based applications, necessitating designs that balance performance, and cost-effectiveness. In this paper, a novel nine-level output converter using a single voltage source, 8 unidirectional and one bidirectional MOSFET switches, and two capacitors has been presented to utilize in GPUs. A simple modulation algorithm (PWM) has been applied to achieve a THD of 3.1% on the output voltage at 115/200 V and 400 Hz without the need for additional filtering. With a relatively small output filter, the THD is further reduced to less than 1%. The proposed converter utilized a lower number of devices to output a nine-level staircase in comparison to existing converters. Additionally, the proposed converter employs inherent self-voltage balancing for capacitor voltages, thereby simplifying the control algorithm. In this paper, the topology analysis, modulation algorithm, capacitor calculation, loss, efficiency, and performance analysis of the proposed topology have been presented. The proposed circuit has been compared to recently published papers in terms of switch, capacitor, diode, and source numbers. The theoretical and experimental performance of the topology has been verified by simulation on PSIM software and experimental setup.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1162-1171"},"PeriodicalIF":5.0,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10620626","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141881194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The recent transformation of the energy sector brings new challenges in areas such as supply security, efficiency, and reliability. Especially the increase of decentralized power plants leads to a more complex energy system and an increasing complexity. This requires expansion and digitization of the power grid as well as an initiative-taking operation of the grid operator. To investigate such complex systems and its phenomena, modern development methods such as real-time simulation or digital twins (DT) can be used. In this approach a digital replica of the real-world system, a grid section, is developed, which can represent or predict the behavior of the real distribution grid. For this, a model of the real-world system is derived and implemented in a co-simulation environment, in which it receives data via an analyzer or measurement system from the grid model. This paper focuses on the development of the digital twin of a testing grid and a grid analyzer for the measurement. With the digital twin of the testing grid, a first approach is achieved in a real-time capable environment showing the functionalities and interactions of a digital twin. Subsequently the development of the digital twin model is explained, and the results are discussed.
{"title":"Digital Twin Development of a Testing Grid Using a Grid Analyzer","authors":"Derk Gonschor;Jonas Steffen;Juan Alvaro Montoya Perez;Christian Bendfeld;Detlef Naundorf;Philipp Kost;Christian Aigner;Florian Füllgraf;Ron Brandl;Marco Jung","doi":"10.1109/OJPEL.2024.3436510","DOIUrl":"10.1109/OJPEL.2024.3436510","url":null,"abstract":"The recent transformation of the energy sector brings new challenges in areas such as supply security, efficiency, and reliability. Especially the increase of decentralized power plants leads to a more complex energy system and an increasing complexity. This requires expansion and digitization of the power grid as well as an initiative-taking operation of the grid operator. To investigate such complex systems and its phenomena, modern development methods such as real-time simulation or digital twins (DT) can be used. In this approach a digital replica of the real-world system, a grid section, is developed, which can represent or predict the behavior of the real distribution grid. For this, a model of the real-world system is derived and implemented in a co-simulation environment, in which it receives data via an analyzer or measurement system from the grid model. This paper focuses on the development of the digital twin of a testing grid and a grid analyzer for the measurement. With the digital twin of the testing grid, a first approach is achieved in a real-time capable environment showing the functionalities and interactions of a digital twin. Subsequently the development of the digital twin model is explained, and the results are discussed.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1197-1208"},"PeriodicalIF":5.0,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10621013","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141881195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-26DOI: 10.1109/OJPEL.2024.3432989
Aleksandar Ristic-Smith;Daniel J. Rogers
This paper explores two-phase immersion cooling using sealed enclosures of dielectric fluid as a technique to achieve compact, power dense converters on a single printed circuit board (PCB). The proposed approach employs passive circulation of the fluid and does not introduce system complexity beyond a heat exchanger required to condense the vapour. A test apparatus representing six 650 V, 150 A semiconductor switches in an inverter rejecting heat to a 65 $,^{circ }$ C water cooling loop is developed. Pool boiling experiments on a flat surface in Novec 7000 dielectric fluid demonstrate critical heat flux of 43 W cm $^{-2}$ at a saturation temperature of 94 $,^{circ }$ C and a corresponding pressure of 593 kPa. By augmenting the surface with pin fins (representative of a heat spreader attached to a switch) and grit blasting to improve the surface micro-geometry, the maximum heat transfer coefficient increased from 1.5 W cm $^{-2}$ K $^{-1}$ to 3.4 W cm $^{-2}$ K $^{-1}$ with a corresponding reduction in switch temperature from 125 $,^{circ }$ C to 107 $,^{circ }$ C at the total power dissipation of 186 W. A practical implementation with comparable thermal performance to the experimental apparatus but minimised volume of 0.12 L is presented. This yields a Cooling System Performance Index of 37 WL $^{-1}$ K $^{-1}$ , including the heat exchanger and printed circuit board with switches, decoupling capacitors and gate drivers.
本文探讨了使用介质流体密封外壳进行两相浸入式冷却的技术，以在单个印刷电路板（PCB）上实现结构紧凑、功率密度高的转换器。建议的方法采用流体被动循环，除了冷凝蒸汽所需的热交换器外，不会引入复杂的系统。我们开发了一种测试装置，它代表了逆变器中的六个 650 V、150 A 半导体开关，将热量排出到 65$,^{circ }$C 的水冷循环中。在 Novec 7000 介电流体中的平面上进行的池沸腾实验表明，在饱和温度为 94$^{circ }$C 和相应压力为 593 kPa 时，临界热通量为 43 W cm$^{-2}$。通过在表面增加针翅片（代表连接到开关上的散热器）和喷砂以改善表面微几何形状，最大传热系数从 1.5 W cm$^{-2}$ K$^{-1}$ 增加到 3.4 W cm$^{-2}$ K$^{-1}$，在总功率耗散为 186 W 的情况下，开关温度相应地从 125$^{circ }$C 降至 107$^{circ}$C。这使得冷却系统性能指数达到 37 WL$^{-1}$ K$^{-1}$，包括热交换器和带有开关、去耦电容器和栅极驱动器的印刷电路板。
{"title":"Compact Two-Phase Immersion Cooling With Dielectric Fluid for PCB-Based Power Electronics","authors":"Aleksandar Ristic-Smith;Daniel J. Rogers","doi":"10.1109/OJPEL.2024.3432989","DOIUrl":"10.1109/OJPEL.2024.3432989","url":null,"abstract":"This paper explores two-phase immersion cooling using sealed enclosures of dielectric fluid as a technique to achieve compact, power dense converters on a single printed circuit board (PCB). The proposed approach employs passive circulation of the fluid and does not introduce system complexity beyond a heat exchanger required to condense the vapour. A test apparatus representing six 650 V, 150 A semiconductor switches in an inverter rejecting heat to a 65\u0000<inline-formula><tex-math>$,^{circ }$</tex-math></inline-formula>\u0000C water cooling loop is developed. Pool boiling experiments on a flat surface in Novec 7000 dielectric fluid demonstrate critical heat flux of 43 W cm\u0000<inline-formula><tex-math>$^{-2}$</tex-math></inline-formula>\u0000 at a saturation temperature of 94\u0000<inline-formula><tex-math>$,^{circ }$</tex-math></inline-formula>\u0000C and a corresponding pressure of 593 kPa. By augmenting the surface with pin fins (representative of a heat spreader attached to a switch) and grit blasting to improve the surface micro-geometry, the maximum heat transfer coefficient increased from 1.5 W cm\u0000<inline-formula><tex-math>$^{-2}$</tex-math></inline-formula>\u0000 K\u0000<inline-formula><tex-math>$^{-1}$</tex-math></inline-formula>\u0000 to 3.4 W cm\u0000<inline-formula><tex-math>$^{-2}$</tex-math></inline-formula>\u0000 K\u0000<inline-formula><tex-math>$^{-1}$</tex-math></inline-formula>\u0000 with a corresponding reduction in switch temperature from 125\u0000<inline-formula><tex-math>$,^{circ }$</tex-math></inline-formula>\u0000C to 107\u0000<inline-formula><tex-math>$,^{circ }$</tex-math></inline-formula>\u0000C at the total power dissipation of 186 W. A practical implementation with comparable thermal performance to the experimental apparatus but minimised volume of 0.12 L is presented. This yields a Cooling System Performance Index of 37 WL\u0000<inline-formula><tex-math>$^{-1}$</tex-math></inline-formula>\u0000 K\u0000<inline-formula><tex-math>$^{-1}$</tex-math></inline-formula>\u0000, including the heat exchanger and printed circuit board with switches, decoupling capacitors and gate drivers.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1107-1118"},"PeriodicalIF":5.0,"publicationDate":"2024-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10612781","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-25DOI: 10.1109/OJPEL.2024.3433605
Christopher D. New;Andrew N. Lemmon;Aaron D. Brovont
Current conducted emissions standards provide considerable flexibility in the handling of interface converters, which are of increasing importance for the design and implementation of microgrids. Of particular interest herein is the approach selected for terminating the output ports of such converters during conducted emissions qualification testing. This article provides a theoretical treatment of an interface converter consisting of a SiC-based single-phase inverter in a custom-built testbed for evaluating conducted emissions. The accompanying analysis demonstrates that the selection of output terminations plays a significant role in determining the resulting emissions, with a difference of up to 40 dB observed in the relevant emissions metrics. These predictions are validated with a set of empirical studies. The dependence on output termination selection is emphasized further in deployed systems, which are not influenced by the presence of compliance measurement equipment. In this configuration, the common-mode resonance of the system is shown to elevate peak emissions due to reduced damping. Overall, this paper highlights an opportunity to improve emissions standards with respect to interface converters by standardizing output terminations, particularly in view of the increased high-frequency emissions produced by systems implemented with wide band-gap technology.
目前的传导排放标准在处理接口转换器方面提供了相当大的灵活性，而接口转换器对于微电网的设计和实施越来越重要。本文特别关注的是在传导发射合格性测试期间终止此类转换器输出端口的方法。本文从理论上论述了一种接口转换器，该转换器由一个基于碳化硅的单相逆变器组成，安装在一个定制的测试平台上，用于评估传导辐射。随附的分析表明，输出端接的选择在决定所产生的辐射方面起着重要作用，在相关的辐射指标中可观察到高达 40 dB 的差异。一组实证研究验证了这些预测。在不受合规性测量设备影响的部署系统中，输出终端选择的依赖性得到了进一步强调。在这种配置下，系统的共模共振会因阻尼减小而导致峰值发射升高。总之，本文强调了通过标准化输出终端来改进接口转换器排放标准的机会，特别是考虑到采用宽带隙技术的系统会产生更多的高频辐射。
{"title":"Influence of Output Terminations on Common-Mode Conducted Emissions Evaluation of Interface Converters","authors":"Christopher D. New;Andrew N. Lemmon;Aaron D. Brovont","doi":"10.1109/OJPEL.2024.3433605","DOIUrl":"10.1109/OJPEL.2024.3433605","url":null,"abstract":"Current conducted emissions standards provide considerable flexibility in the handling of interface converters, which are of increasing importance for the design and implementation of microgrids. Of particular interest herein is the approach selected for terminating the output ports of such converters during conducted emissions qualification testing. This article provides a theoretical treatment of an interface converter consisting of a SiC-based single-phase inverter in a custom-built testbed for evaluating conducted emissions. The accompanying analysis demonstrates that the selection of output terminations plays a significant role in determining the resulting emissions, with a difference of up to 40 dB observed in the relevant emissions metrics. These predictions are validated with a set of empirical studies. The dependence on output termination selection is emphasized further in deployed systems, which are not influenced by the presence of compliance measurement equipment. In this configuration, the common-mode resonance of the system is shown to elevate peak emissions due to reduced damping. Overall, this paper highlights an opportunity to improve emissions standards with respect to interface converters by standardizing output terminations, particularly in view of the increased high-frequency emissions produced by systems implemented with wide band-gap technology.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1182-1196"},"PeriodicalIF":5.0,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10609520","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper comprehensive evaluations of isolated high step-up dc-dc topologies have been investigated. These converters are especially well suited for distributed generation systems utilizing renewable or alternative energy sources that need a wide input voltage range with load regulation. With this in mind, this work primarily concentrates on comparative analysis of various isolated configurations employed in possible industry applications. Consequently, several isolated structures, including flyback, forward, push-pull, and full bridge and other similar solutions have been carried out in the literature. For the purpose of comparative and theoretical analysis, some of the circuit parameters are considered, which include voltage conversion ratio, semiconductor element voltage stress, component size, and conduction and switching losses. Furthermore, the selected configurations have been discussed in terms of cost estimation and financial feasibility. In addition, the design procedure and experimental prototypes of the available solutions with the main results are presented. Derived from this investigation, the authors provide a guide to help researchers to identify different isolated topologies with wide input voltage range and galvanic isolation for prospective research directions within this area.
{"title":"Comprehensive Comparison of Isolated High Step-up DC-DC Converters for Low Power Application","authors":"Saeed Pourjafar;Hossein Afshari;Parham Mohseni;Oleksandr Husev;Oleksandr Matiushkin;Noman Shabbir","doi":"10.1109/OJPEL.2024.3433554","DOIUrl":"10.1109/OJPEL.2024.3433554","url":null,"abstract":"In this paper comprehensive evaluations of isolated high step-up dc-dc topologies have been investigated. These converters are especially well suited for distributed generation systems utilizing renewable or alternative energy sources that need a wide input voltage range with load regulation. With this in mind, this work primarily concentrates on comparative analysis of various isolated configurations employed in possible industry applications. Consequently, several isolated structures, including flyback, forward, push-pull, and full bridge and other similar solutions have been carried out in the literature. For the purpose of comparative and theoretical analysis, some of the circuit parameters are considered, which include voltage conversion ratio, semiconductor element voltage stress, component size, and conduction and switching losses. Furthermore, the selected configurations have been discussed in terms of cost estimation and financial feasibility. In addition, the design procedure and experimental prototypes of the available solutions with the main results are presented. Derived from this investigation, the authors provide a guide to help researchers to identify different isolated topologies with wide input voltage range and galvanic isolation for prospective research directions within this area.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1149-1161"},"PeriodicalIF":5.0,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10609489","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-25DOI: 10.1109/OJPEL.2024.3433562
Qingxuan Ma;Qingyun Huang;Alex Q. Huang
Input-Series-Output-Parallel (ISOP) LLC converters have the capability to leverage lower voltage semiconductor devices, thereby enabling applications with higher voltage requirements. The primary advantages lie in enhanced efficiency and power density attributed to improved device performance. Given the utilization of multiple modular LLC converters, the potential impact of component parameter mismatch becomes a significant concern. Specifically, issues related to input voltage sharing (IVS) and device zero voltage switching (ZVS) are critical considerations. This paper develops a precise mathematical model during deadtime to determine ZVS boundaries, taking into account parameter mismatches. Within the developed boundaries, all LLC sub-modules are assured of ZVS operation. To assess IVS performance, a mathematical model is formulated using the first harmonic approximation (FHA) equivalent circuit. To validate the proposed modeling and analysis, a 3 kW 1 MHz GaN-based ISOP LLC is constructed, comprising four modular 750W-LLC units. Experimental results showcase successful ZVS operations and natural voltage balancing of the ISOP LLC converter across a broad range of parameter mismatches.
{"title":"Zero-Voltage Switching and Natural Voltage Balancing of a 3 kW 1 MHz Input-Series-Output-Parallel GaN LLC Converter","authors":"Qingxuan Ma;Qingyun Huang;Alex Q. Huang","doi":"10.1109/OJPEL.2024.3433562","DOIUrl":"10.1109/OJPEL.2024.3433562","url":null,"abstract":"Input-Series-Output-Parallel (ISOP) LLC converters have the capability to leverage lower voltage semiconductor devices, thereby enabling applications with higher voltage requirements. The primary advantages lie in enhanced efficiency and power density attributed to improved device performance. Given the utilization of multiple modular LLC converters, the potential impact of component parameter mismatch becomes a significant concern. Specifically, issues related to input voltage sharing (IVS) and device zero voltage switching (ZVS) are critical considerations. This paper develops a precise mathematical model during deadtime to determine ZVS boundaries, taking into account parameter mismatches. Within the developed boundaries, all LLC sub-modules are assured of ZVS operation. To assess IVS performance, a mathematical model is formulated using the first harmonic approximation (FHA) equivalent circuit. To validate the proposed modeling and analysis, a 3 kW 1 MHz GaN-based ISOP LLC is constructed, comprising four modular 750W-LLC units. Experimental results showcase successful ZVS operations and natural voltage balancing of the ISOP LLC converter across a broad range of parameter mismatches.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1119-1128"},"PeriodicalIF":5.0,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10609518","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-24DOI: 10.1109/OJPEL.2024.3432990
Giuseppe Schettino;Giuseppe Sorrentino;Gioacchino Scaglione;Claudio Nevoloso;Antonino Oscar Di Tommaso;Rosario Miceli
This paper proposes a general analytical formulation for LCL filter design for grid-connected PWM-driven cascaded H-bridge inverters. The novelty of this work deals with providing some easy-of-use analytical expressions that allow for properly sizing the filter inductances and capacitance values considering the number of voltage levels, the DC-link voltage, the adopted multicarrier pulse width modulation strategy, and the switching frequency. Although multilevel inverters performance strongly depends on the adopted modulation strategy and switching frequency, a general mathematical formulation that allows for properly sizing the LCL filter by considering such parameters simultaneously is currently missing. The proposed approach is generalized for the most adopted multicarrier pulse width modulation strategies. To validate the proposed approach, an extended investigation analysis is performed by hardware-in-the-loop real-time tests. According to international standards EN50160 and IEEE Std 1547–2018, the voltage total harmonic distortion and current total rated distortion are adopted to evaluate the LCL filter performance. Tests are carried out in several working conditions, defined in terms of provided apparent power and power factor values. Finally, the proposed analytical formulation is adopted to formulate an optimized LCL filter design algorithm that allows for matching the standard requirements without oversizing the filter parameters.
{"title":"A General Analytical Formulation for LCL Filter Design for Grid-Connected PWM-Driven Cascaded H-Bridge Inverters","authors":"Giuseppe Schettino;Giuseppe Sorrentino;Gioacchino Scaglione;Claudio Nevoloso;Antonino Oscar Di Tommaso;Rosario Miceli","doi":"10.1109/OJPEL.2024.3432990","DOIUrl":"10.1109/OJPEL.2024.3432990","url":null,"abstract":"This paper proposes a general analytical formulation for LCL filter design for grid-connected PWM-driven cascaded H-bridge inverters. The novelty of this work deals with providing some easy-of-use analytical expressions that allow for properly sizing the filter inductances and capacitance values considering the number of voltage levels, the DC-link voltage, the adopted multicarrier pulse width modulation strategy, and the switching frequency. Although multilevel inverters performance strongly depends on the adopted modulation strategy and switching frequency, a general mathematical formulation that allows for properly sizing the LCL filter by considering such parameters simultaneously is currently missing. The proposed approach is generalized for the most adopted multicarrier pulse width modulation strategies. To validate the proposed approach, an extended investigation analysis is performed by hardware-in-the-loop real-time tests. According to international standards EN50160 and IEEE Std 1547–2018, the voltage total harmonic distortion and current total rated distortion are adopted to evaluate the LCL filter performance. Tests are carried out in several working conditions, defined in terms of provided apparent power and power factor values. Finally, the proposed analytical formulation is adopted to formulate an optimized LCL filter design algorithm that allows for matching the standard requirements without oversizing the filter parameters.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"5 ","pages":"1129-1148"},"PeriodicalIF":5.0,"publicationDate":"2024-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10608387","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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