Pub Date : 2025-08-20DOI: 10.1109/OJPEL.2025.3595350
Zheran Zeng;Yin Sun;Dongsheng Yang
This addresses errors in [1]. All subscripts using $upalpha$ and $upbeta$ should have been non-italic, to match their formatting in the figures; they were originally published in italic font, due to a publisher error.
{"title":"Erratum to “Frequency-Domain Large-Signal Modeling and Stability Analysis for Dispatchable Virtual Oscillator Controlled Grid- Connected Converters”","authors":"Zheran Zeng;Yin Sun;Dongsheng Yang","doi":"10.1109/OJPEL.2025.3595350","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3595350","url":null,"abstract":"This addresses errors in [1]. All subscripts using $upalpha$ and $upbeta$ should have been non-italic, to match their formatting in the figures; they were originally published in italic font, due to a publisher error.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1390-1390"},"PeriodicalIF":3.9,"publicationDate":"2025-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11131406","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144880422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-19DOI: 10.1109/OJPEL.2025.3600176
Kazuki Watanabe;Daisuke Iioka
As inverter-based resources and renewable energy systems continue to increase their penetration in modern power grids, maintaining system stability has become a critical challenge. To address this challenge, advanced control strategies are required for grid-forming (GFM) inverters that can operate reliably. This paper proposes a control strategy for grid-forming (GFM) inverters based on Virtual Oscillator Control (VOC), a novel approach grounded in power electronics and nonlinear dynamics. A key contribution of this work is the revisiting and employment of classical power system analysis techniques, such as the Equal Area Criterion (EAC) and synchronization-based stability evaluation, to derive stability criteria for VOC-based grid-forming (GFM) inverters operating under current-limiting conditions. Through detailed time-domain simulations, the validity of the derived stability criteria is systematically verified, demonstrating their applicability to the transient behavior of current-constrained VOC inverters. Furthermore, the current-limiting control logic used in the simulations is validated through Controller Hardware-in-the-Loop (CHIL) testing with actual controller hardware, ensuring its practical feasibility in real-time environments. The findings establish that combining EAC-based classical analysis with VOC control strategies offers an effective and reliable framework for enhancing the resilience and stability of GFM inverters under fault conditions.
{"title":"Stability and Resynchronization of Current-Constrained VOC-Based GFM Inverters Through Revisiting Traditional Power System Criteria","authors":"Kazuki Watanabe;Daisuke Iioka","doi":"10.1109/OJPEL.2025.3600176","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3600176","url":null,"abstract":"As inverter-based resources and renewable energy systems continue to increase their penetration in modern power grids, maintaining system stability has become a critical challenge. To address this challenge, advanced control strategies are required for grid-forming (GFM) inverters that can operate reliably. This paper proposes a control strategy for grid-forming (GFM) inverters based on Virtual Oscillator Control (VOC), a novel approach grounded in power electronics and nonlinear dynamics. A key contribution of this work is the revisiting and employment of classical power system analysis techniques, such as the Equal Area Criterion (EAC) and synchronization-based stability evaluation, to derive stability criteria for VOC-based grid-forming (GFM) inverters operating under current-limiting conditions. Through detailed time-domain simulations, the validity of the derived stability criteria is systematically verified, demonstrating their applicability to the transient behavior of current-constrained VOC inverters. Furthermore, the current-limiting control logic used in the simulations is validated through Controller Hardware-in-the-Loop (CHIL) testing with actual controller hardware, ensuring its practical feasibility in real-time environments. The findings establish that combining EAC-based classical analysis with VOC control strategies offers an effective and reliable framework for enhancing the resilience and stability of GFM inverters under fault conditions.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1419-1427"},"PeriodicalIF":3.9,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11129237","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pulse-width modulated (PWM) Inverters have extensive applications in the fields of motor drives, utility interface in power systems and uninterruptible power supplies etc. Such inverters generally require a small time-interval between turning off one switch and turning on the other switch in the same leg of a two-level VSI. This is called as ‘blanking time’ or ‘dead time’. In the presence of this ‘dead-time’, such inverters, suffer from a distortion in the output voltage, called ‘dead-time distortion’ while feeding lagging loads. Over the past few decades, intensive research was carried out in this area, which resulted in developing new techniques for mitigating the dead-time effect. This includes dead-time elimination techniques, new compensation algorithms with or without involving current sensor etc. This paper briefly discusses the dead-time effect and presents a review on different strategies for eliminating the same. Though the main focus of this paper is on discussing dead-time effect and its correction in two-level PWM inverter, but, this paper also tries to give a brief overview on dead-time effect in multi-level inverters and some of the correction techniques for the same. Recent developments have also been discussed to get an idea of the latest status in this area of research and to understand the possible scope of development in future.
{"title":"An Overview on Dead-Time Distortion and Its Correction in PWM Inverters","authors":"Dipankar Chatterjee;Chandan Chakraborty;Suvarun Dalapati","doi":"10.1109/OJPEL.2025.3600262","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3600262","url":null,"abstract":"Pulse-width modulated (PWM) Inverters have extensive applications in the fields of motor drives, utility interface in power systems and uninterruptible power supplies etc. Such inverters generally require a small time-interval between turning off one switch and turning on the other switch in the same leg of a two-level VSI. This is called as ‘blanking time’ or ‘dead time’. In the presence of this ‘dead-time’, such inverters, suffer from a distortion in the output voltage, called ‘dead-time distortion’ while feeding lagging loads. Over the past few decades, intensive research was carried out in this area, which resulted in developing new techniques for mitigating the dead-time effect. This includes dead-time elimination techniques, new compensation algorithms with or without involving current sensor etc. This paper briefly discusses the dead-time effect and presents a review on different strategies for eliminating the same. Though the main focus of this paper is on discussing dead-time effect and its correction in two-level PWM inverter, but, this paper also tries to give a brief overview on dead-time effect in multi-level inverters and some of the correction techniques for the same. Recent developments have also been discussed to get an idea of the latest status in this area of research and to understand the possible scope of development in future.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1453-1490"},"PeriodicalIF":3.9,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11130362","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144990237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-19DOI: 10.1109/OJPEL.2025.3600329
Jonathan Emmanuel Ochoa Sosa;Rubén Orlando Núñez;G. Elías Oggier;Facundo Aguilera;Germán G. Oggier;Obaid Aldosari
This work presents a diagnosis strategy of transistor open-circuit faults for three-phase dual-active bridge DC-DC converters. The diagnostic approach evaluates the DC components of the phase currents established due to a fault condition. In addition, as these symptoms are reflected in the DC-side current waveform of the active bridges, this paper proposes a fault diagnosis scheme by measuring only the current from one source side, significantly reducing the number of sensors compared to previous proposals. It is demonstrated that the faulty transistor can be identified within a time interval of less than two switching periods, enabling the implementation of a protection scheme that modifies the modulation strategy to prevent saturation of the transformer’s core by the presence of the DC components. In order to verify the practical feasibility of the proposal, the whole transition is evaluated from the moment a fault condition occurs, the proposed diagnostic strategy identifies the failed device, and finally the converter is reconfigured to begin operating in a fault-tolerant mode, operating in its single-phase mode, continuing with the power transfer to the load. The new operating limits are established, corresponding to maximum transferable power and soft-switching operating conditions. Experimental results obtained with a 1.5 kW laboratory prototype under various operating conditions are presented.
{"title":"Transistor Open-Circuit Fault Diagnosis for Three-Phase DAB Converters Using a Reduced Number of Sensors","authors":"Jonathan Emmanuel Ochoa Sosa;Rubén Orlando Núñez;G. Elías Oggier;Facundo Aguilera;Germán G. Oggier;Obaid Aldosari","doi":"10.1109/OJPEL.2025.3600329","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3600329","url":null,"abstract":"This work presents a diagnosis strategy of transistor open-circuit faults for three-phase dual-active bridge DC-DC converters. The diagnostic approach evaluates the DC components of the phase currents established due to a fault condition. In addition, as these symptoms are reflected in the DC-side current waveform of the active bridges, this paper proposes a fault diagnosis scheme by measuring only the current from one source side, significantly reducing the number of sensors compared to previous proposals. It is demonstrated that the faulty transistor can be identified within a time interval of less than two switching periods, enabling the implementation of a protection scheme that modifies the modulation strategy to prevent saturation of the transformer’s core by the presence of the DC components. In order to verify the practical feasibility of the proposal, the whole transition is evaluated from the moment a fault condition occurs, the proposed diagnostic strategy identifies the failed device, and finally the converter is reconfigured to begin operating in a fault-tolerant mode, operating in its single-phase mode, continuing with the power transfer to the load. The new operating limits are established, corresponding to maximum transferable power and soft-switching operating conditions. Experimental results obtained with a 1.5 kW laboratory prototype under various operating conditions are presented.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1547-1558"},"PeriodicalIF":3.9,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11130376","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145090176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In multiphase LLC resonant converters, the component parameter tolerance of the resonant tanks will lead to discrepancies in voltage gain, resulting in imbalanced output current. In this paper, the principle and mechanism of current imbalance among multiphase LLC resonant converters are discussed through the state plane analysis. Based on the limitation analysis for the switch-controlled capacitor and phase shift modulation, an improved differentiated-gain-regulation (DGR)-based current balancing strategy is proposed by adding external circuits to compensate for parameter differences, assisted by the voltage regulating method. The essential principle is to initially increase the gains of light-load phases with the switch-controlled capacitor. And for phases with heavy loads, the phase shift modulation is used for suppressing gains to avoid control instability caused by the introduction of switch-controlled capacitor. It would not affect the soft switching characteristics of LLC resonant converters. Finally, the hardware-in-the-loop based experiment results verify the correctness and effectiveness of the proposed method and analysis.
{"title":"Differentiated-Gain-Regulation-Based Current Balancing Control for Multi-Phase Interleaved LLC Resonant Converters","authors":"Kangli Liu;Tianao Xiao;Jianfeng Zhao;Jingyang Zhou;Cheng Jin;Xiaogang Pan;Peng Chen","doi":"10.1109/OJPEL.2025.3600380","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3600380","url":null,"abstract":"In multiphase LLC resonant converters, the component parameter tolerance of the resonant tanks will lead to discrepancies in voltage gain, resulting in imbalanced output current. In this paper, the principle and mechanism of current imbalance among multiphase LLC resonant converters are discussed through the state plane analysis. Based on the limitation analysis for the switch-controlled capacitor and phase shift modulation, an improved differentiated-gain-regulation (DGR)-based current balancing strategy is proposed by adding external circuits to compensate for parameter differences, assisted by the voltage regulating method. The essential principle is to initially increase the gains of light-load phases with the switch-controlled capacitor. And for phases with heavy loads, the phase shift modulation is used for suppressing gains to avoid control instability caused by the introduction of switch-controlled capacitor. It would not affect the soft switching characteristics of LLC resonant converters. Finally, the hardware-in-the-loop based experiment results verify the correctness and effectiveness of the proposed method and analysis.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1428-1437"},"PeriodicalIF":3.9,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11130434","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144926907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-13DOI: 10.1109/OJPEL.2025.3598641
Quirc Perez-Farre;Luis F. Gomez-Rivera;Kai Dannehl;Carlos Lopez-Torres;Alejandro Paredes-Camacho;Antoni Garcia-Espinosa
Ensuring electromagnetic compatibility among the various components of an electric vehicle is a critical requirement. Additionally, minimizing voltage ripple on the DC bus, induced by the switching operations of the inverter’s transistors, is essential for maintaining system stability and performance. To meet these requirements, a passive network consisting of the DC-link capacitor and an electromagnetic filter is connected on the DC side of the inverter. The aging of these components leads to a deterioration in the filter’s performance, a reduction in service life, and potential non-compliance with electromagnetic compatibility standards. Moreover, it is important to emphasize that the combination of the EMI filter and the DC-link capacitor represents one of the most critical components of the inverter in terms of aging and reliability. This paper presents a novel method that enables the simultaneous aging assessment of these components based on the impedance measurement of the whole system. It allows for detecting aging in the different branches of the passive network and predicts this aging based on capacitance variation. Individual testing of the components is not required, as it suffices to have access to the DC terminals of the converter without the need to disassemble or separate the components. This method has been experimentally validated using two inverters. The first one has a generic structure and is currently at the prototype stage, while the second is a specific industrial traction inverter for electric vehicles.
{"title":"Impedance-Based Method for Offline Aging Assessment of Electromagnetic Filters and DC-Link Capacitors in Traction Inverters","authors":"Quirc Perez-Farre;Luis F. Gomez-Rivera;Kai Dannehl;Carlos Lopez-Torres;Alejandro Paredes-Camacho;Antoni Garcia-Espinosa","doi":"10.1109/OJPEL.2025.3598641","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3598641","url":null,"abstract":"Ensuring electromagnetic compatibility among the various components of an electric vehicle is a critical requirement. Additionally, minimizing voltage ripple on the DC bus, induced by the switching operations of the inverter’s transistors, is essential for maintaining system stability and performance. To meet these requirements, a passive network consisting of the DC-link capacitor and an electromagnetic filter is connected on the DC side of the inverter. The aging of these components leads to a deterioration in the filter’s performance, a reduction in service life, and potential non-compliance with electromagnetic compatibility standards. Moreover, it is important to emphasize that the combination of the EMI filter and the DC-link capacitor represents one of the most critical components of the inverter in terms of aging and reliability. This paper presents a novel method that enables the simultaneous aging assessment of these components based on the impedance measurement of the whole system. It allows for detecting aging in the different branches of the passive network and predicts this aging based on capacitance variation. Individual testing of the components is not required, as it suffices to have access to the DC terminals of the converter without the need to disassemble or separate the components. This method has been experimentally validated using two inverters. The first one has a generic structure and is currently at the prototype stage, while the second is a specific industrial traction inverter for electric vehicles.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1409-1418"},"PeriodicalIF":3.9,"publicationDate":"2025-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11123820","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-01DOI: 10.1109/OJPEL.2025.3594872
Seungjik Lee;Jinman Myung;Geonwoo Park;Yoseph Kim;Ockgoo Lee;Ilku Nam
A short-circuit protection circuit is proposed for power electronic systems employing silicon carbide metal–oxide–semiconductor field-effect transistors. The circuit incorporates two innovative techniques: a current slope-to-digital conversion for short-circuit detection and an adaptive soft turn-off based on transistor input capacitance sensing. A low-side gate driver incorporating the proposed circuit was implemented on an integrated chip for functional verification. The gate driver reliably protects a wide range of silicon carbide metal–oxide–semiconductor field-effect transistor devices with current capacities from 10 to 95 A during short-circuit conditions. It ensures that the drain–source voltage overshoot remains below 14.5% of the drain–source voltage while achieving a consistent response delay of approximately 750 ns for short-circuit detection and a turn-off time of approximately 500 ns for soft turn-off operation.
{"title":"Short-Circuit Protection Circuit With Current Slope-to-Digital Conversion Short-Circuit Detection and Adaptive Soft Turn-Off","authors":"Seungjik Lee;Jinman Myung;Geonwoo Park;Yoseph Kim;Ockgoo Lee;Ilku Nam","doi":"10.1109/OJPEL.2025.3594872","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3594872","url":null,"abstract":"A short-circuit protection circuit is proposed for power electronic systems employing silicon carbide metal–oxide–semiconductor field-effect transistors. The circuit incorporates two innovative techniques: a current slope-to-digital conversion for short-circuit detection and an adaptive soft turn-off based on transistor input capacitance sensing. A low-side gate driver incorporating the proposed circuit was implemented on an integrated chip for functional verification. The gate driver reliably protects a wide range of silicon carbide metal–oxide–semiconductor field-effect transistor devices with current capacities from 10 to 95 A during short-circuit conditions. It ensures that the drain–source voltage overshoot remains below 14.5% of the drain–source voltage while achieving a consistent response delay of approximately 750 ns for short-circuit detection and a turn-off time of approximately 500 ns for soft turn-off operation.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1382-1389"},"PeriodicalIF":3.9,"publicationDate":"2025-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11106732","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144831854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-07-23DOI: 10.1109/OJPEL.2025.3591908
Xiaoshuang Hui;Puqi Ning;Tao Fan;Yuhui Kang;Zhiqiang Wang
With the growing demands for compact and high-efficiency electric vehicle (EV) drive systems, effective thermal management of Silicon Carbide (SiC) power modules has become a critical design challenge. This paper proposes an optimization methodology for Pinfin heatsinks, aiming to effectively reduce the maximum junction temperature and improve thermal uniformity among parallel-connected chips in three-phase multichip SiC power modules. Through analysis of the thermal model, a parametric automated optimization framework for circularly regular Pinfin heatsinks was established, utilizing the Lattice Boltzmann Method (LBM) for efficient thermal performance evaluation. Based on the proposed automated optimization approach, optimizations for reducing thermal redundancy chips and minimizing temperature difference were respectively carried out for designed three-phase SiC power module. Furthermore, a novel irregular layout of elliptical Pinfin with randomized orientations and aspect ratios is proposed and optimized. Experimental validation and simulation results demonstrated the effectiveness of the proposed method.
{"title":"Automated Thermal Optimization of Pinfin Heatsinks for Three-Phase Multichip SiC Power Modules","authors":"Xiaoshuang Hui;Puqi Ning;Tao Fan;Yuhui Kang;Zhiqiang Wang","doi":"10.1109/OJPEL.2025.3591908","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3591908","url":null,"abstract":"With the growing demands for compact and high-efficiency electric vehicle (EV) drive systems, effective thermal management of Silicon Carbide (SiC) power modules has become a critical design challenge. This paper proposes an optimization methodology for Pinfin heatsinks, aiming to effectively reduce the maximum junction temperature and improve thermal uniformity among parallel-connected chips in three-phase multichip SiC power modules. Through analysis of the thermal model, a parametric automated optimization framework for circularly regular Pinfin heatsinks was established, utilizing the Lattice Boltzmann Method (LBM) for efficient thermal performance evaluation. Based on the proposed automated optimization approach, optimizations for reducing thermal redundancy chips and minimizing temperature difference were respectively carried out for designed three-phase SiC power module. Furthermore, a novel irregular layout of elliptical Pinfin with randomized orientations and aspect ratios is proposed and optimized. Experimental validation and simulation results demonstrated the effectiveness of the proposed method.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1323-1332"},"PeriodicalIF":3.9,"publicationDate":"2025-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11091420","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144758148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the interconnection and optimized operation of the classical hybrid AC/DC microgrids (HMG), the conventional line-frequency transformer cannot block grid faults and comprehensively regulate voltages. A distribution grid fault produces voltage sags, swells, or harmonics, threatening the safe operation of distributed renewable energy generation and user equipment in an HMG. This paper proposes a novel hybrid transformer-interconnected HMG (HT-HMG) and a multimode coordination strategy based on the multiplexing design of a multifunctional converter (MFC). The topology structure and operating principle of the proposed HT-HMG are introduced. A new type of HT, including a three-limb, three-winding line-frequency transformer and an MFC, is proposed for voltage transformation and partial power transmission. The MFC can be operated multimode coordination by flexibly implementing the switches, including shunt, series, island, and standby modes. A hierarchical coordination control strategy, consisting of an energy management layer and a converter control layer, is also designed for the HT-HMG based on its multimode operation. Finally, the accuracy and effectiveness of the proposed HT-HMG are verified through simulations and experiments.
{"title":"A Novel Multimode Coordination Strategy for Hybrid AC/DC Microgrids Integrated With Distributed Renewable Energy Systems","authors":"Jinmu Lai;Yue Yin;Xin Yin;Fan Xiao;Jinrui Tang;Jiaxuan Hu;Zia Ullah;Xianggen Yin","doi":"10.1109/OJPEL.2025.3591560","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3591560","url":null,"abstract":"In the interconnection and optimized operation of the classical hybrid AC/DC microgrids (HMG), the conventional line-frequency transformer cannot block grid faults and comprehensively regulate voltages. A distribution grid fault produces voltage sags, swells, or harmonics, threatening the safe operation of distributed renewable energy generation and user equipment in an HMG. This paper proposes a novel hybrid transformer-interconnected HMG (HT-HMG) and a multimode coordination strategy based on the multiplexing design of a multifunctional converter (MFC). The topology structure and operating principle of the proposed HT-HMG are introduced. A new type of HT, including a three-limb, three-winding line-frequency transformer and an MFC, is proposed for voltage transformation and partial power transmission. The MFC can be operated multimode coordination by flexibly implementing the switches, including shunt, series, island, and standby modes. A hierarchical coordination control strategy, consisting of an energy management layer and a converter control layer, is also designed for the HT-HMG based on its multimode operation. Finally, the accuracy and effectiveness of the proposed HT-HMG are verified through simulations and experiments.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1391-1408"},"PeriodicalIF":3.9,"publicationDate":"2025-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11088128","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144891191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-07-17DOI: 10.1109/OJPEL.2025.3590020
Kishalay Datta;Yue Wu;Charles R. Sullivan;Jason T. Stauth
This work explores the modeling and optimization of multi-winding transformers which may be used for high-frequency isolated power conversion and wireless power transfer. An analytical framework, based on a multi-port impedance matrix, is used to determine the optimal current for each winding that maximizes overall power transfer efficiency. The resulting expressions are used to provide insight into the combined effects of magnetic coupling and power loss among the windings, and is especially relevant for planar-spiral transformers where different windings have different loss and power transfer properties. We apply the model to representative high-frequency planar air-core transformers and show how the optimal current distribution depends on coil geometry and spacing. This is used to show the benefits of the multi-winding approach as compared to conventional single-winding multi-turn spiral transformers. The model is verified with experimental measurements on coreless and magnetic-core multi-winding transformers.
{"title":"Optimal Current Distribution in Multi-Winding Transformers for Isolated and Wireless Power Transfer","authors":"Kishalay Datta;Yue Wu;Charles R. Sullivan;Jason T. Stauth","doi":"10.1109/OJPEL.2025.3590020","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3590020","url":null,"abstract":"This work explores the modeling and optimization of multi-winding transformers which may be used for high-frequency isolated power conversion and wireless power transfer. An analytical framework, based on a multi-port impedance matrix, is used to determine the optimal current for each winding that maximizes overall power transfer efficiency. The resulting expressions are used to provide insight into the combined effects of magnetic coupling and power loss among the windings, and is especially relevant for planar-spiral transformers where different windings have different loss and power transfer properties. We apply the model to representative high-frequency planar air-core transformers and show how the optimal current distribution depends on coil geometry and spacing. This is used to show the benefits of the multi-winding approach as compared to conventional single-winding multi-turn spiral transformers. The model is verified with experimental measurements on coreless and magnetic-core multi-winding transformers.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1296-1309"},"PeriodicalIF":3.9,"publicationDate":"2025-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11082586","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144750968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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