Pub Date : 2025-10-06DOI: 10.1109/OJPEL.2025.3616798
Song Hu;Lei Han;Rui Wang;Chuan Sun;Yiwang Wang;Ming Lu;Xiaodong Li;Wu Chen
In this paper, an isolated bidirectional three-level neutral-point-clamped dual-bridge series resonant converter (3L-NPC-DBSRC) is proposed for the wide-voltage range dc-dc applications in energy storage systems, which consists of a neutral-point-clamped (NPC) three-level bridge on the primary side, a LC-type series-resonant tank, and a full bridge on the secondary side. The proposed 3L-NPC-DBSRC is able to realize increased voltage gain and reduced harmonic components in the primary-side high-frequency-link voltages and currents. By using fundamental harmonic analysis (FHA), the steady-state operation principles of 3L-NPC-DBSRC are thoroughly analyzed in both forward and backward power-flow directions. Furthermore, a control algorithm based on globally optimal condition (GOC) is proposed for achieving zero-voltage switching (ZVS) in all switches and minimum root-mean-square (RMS) ac-link current, thus simultaneously reducing the switching and conduction power losses, and eventually resulting in high overall efficiency. Finally, to verify the effectiveness of the proposed 3L-NPC-DBSRC and its control method, both simulations and experiments are carried out on a designed example.
{"title":"Analysis, Design, and Performance Optimization of a Bidirectional Three-Level Neutral-Point-Clamped Dual-Bridge Series Resonant DC–DC Converter for Energy Storage Systems","authors":"Song Hu;Lei Han;Rui Wang;Chuan Sun;Yiwang Wang;Ming Lu;Xiaodong Li;Wu Chen","doi":"10.1109/OJPEL.2025.3616798","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3616798","url":null,"abstract":"In this paper, an isolated bidirectional three-level neutral-point-clamped dual-bridge series resonant converter (3L-NPC-DBSRC) is proposed for the wide-voltage range dc-dc applications in energy storage systems, which consists of a neutral-point-clamped (NPC) three-level bridge on the primary side, a LC-type series-resonant tank, and a full bridge on the secondary side. The proposed 3L-NPC-DBSRC is able to realize increased voltage gain and reduced harmonic components in the primary-side high-frequency-link voltages and currents. By using fundamental harmonic analysis (FHA), the steady-state operation principles of 3L-NPC-DBSRC are thoroughly analyzed in both forward and backward power-flow directions. Furthermore, a control algorithm based on globally optimal condition (GOC) is proposed for achieving zero-voltage switching (ZVS) in all switches and minimum root-mean-square (RMS) ac-link current, thus simultaneously reducing the switching and conduction power losses, and eventually resulting in high overall efficiency. Finally, to verify the effectiveness of the proposed 3L-NPC-DBSRC and its control method, both simulations and experiments are carried out on a designed example.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1641-1655"},"PeriodicalIF":3.9,"publicationDate":"2025-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11186209","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145255846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-06DOI: 10.1109/OJPEL.2025.3617847
Muhammad Usman Tahir;Sajib Chakraborty;Erdem Akboy;Ariya Sangwongwanich;Daniel Ioan Stroe;Omar Hegazy;Frede Blaabjerg
Charging strategies play a key role in battery energy storage systems, specifically in applications like electric vehicles. Inefficient charging methods can increase safety risks, performance, and battery life degradation, highlighting the need to develop more advanced charging protocols. Different charging techniques have distinct effects on the LIB and DC–DC converter’s electrical and thermal performance. Therefore, this paper investigates different charging techniques in order to determine the LIB and DC–DC converter’s electrical and thermal performance parameters. The charging techniques that have been investigated are constant current (CC), multi-stage constant current (MSCC), boost current (BC) charging, and constant power (CP) charging. Results indicate notable variations in charging time, charge input capacity, converter efficiency, and thermal performance across the different strategies. For instance, CC charging exhibits higher efficiency than other charging methods despite differing temperature rise profiles in the DC–DC converter and LIB. Additionally, the CP charging strategy performs well in charged input capacity compared to other methods, with a moderate temperature rise. These results highlight the trade-offs between various performance parameters under different charging strategies. The findings highlight the importance of selecting an appropriate charging strategy based on specific performance targets.
{"title":"System-Level Performance Analysis of Li-Ion Batteries and DC–DC Converters Under Various Charging Strategies","authors":"Muhammad Usman Tahir;Sajib Chakraborty;Erdem Akboy;Ariya Sangwongwanich;Daniel Ioan Stroe;Omar Hegazy;Frede Blaabjerg","doi":"10.1109/OJPEL.2025.3617847","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3617847","url":null,"abstract":"Charging strategies play a key role in battery energy storage systems, specifically in applications like electric vehicles. Inefficient charging methods can increase safety risks, performance, and battery life degradation, highlighting the need to develop more advanced charging protocols. Different charging techniques have distinct effects on the LIB and DC–DC converter’s electrical and thermal performance. Therefore, this paper investigates different charging techniques in order to determine the LIB and DC–DC converter’s electrical and thermal performance parameters. The charging techniques that have been investigated are constant current (CC), multi-stage constant current (MSCC), boost current (BC) charging, and constant power (CP) charging. Results indicate notable variations in charging time, charge input capacity, converter efficiency, and thermal performance across the different strategies. For instance, CC charging exhibits higher efficiency than other charging methods despite differing temperature rise profiles in the DC–DC converter and LIB. Additionally, the CP charging strategy performs well in charged input capacity compared to other methods, with a moderate temperature rise. These results highlight the trade-offs between various performance parameters under different charging strategies. The findings highlight the importance of selecting an appropriate charging strategy based on specific performance targets.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1674-1684"},"PeriodicalIF":3.9,"publicationDate":"2025-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11192747","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-01DOI: 10.1109/OJPEL.2025.3616902
Yu-En Wu;Che-Ming Chang
This paper proposes an ultrahigh-step-down converter with a high voltage conversion ratio. The primary side of the proposed converter contains a half-bridge converter with a conventional buck converter. This design effectively reduces the voltage stress on the input-side diode and main switch while also recovering leakage inductance energy. The secondary side has a current-doubling rectification architecture, which enables zero-voltage switching and zero-current switching, thereby minimizing switching losses on the secondary-side switches and consequently improving overall efficiency. A 150-W prototype was implemented under an input voltage range of 140 to 170 V and an output voltage of 3.3 V. The efficiency and feasibility of the proposed converter were confirmed through steady-state analyses and a hardware implementation. In experiments, the peak efficiency of the prototype was 93.4% at an input of 140 V and 92.5% at an input of 170 V.
{"title":"Wide-Range Input-Isolated DC–DC Ultrahigh-Step-Down Converter Containing Buck and Half-Bridge Topologies for Low-Power Applications","authors":"Yu-En Wu;Che-Ming Chang","doi":"10.1109/OJPEL.2025.3616902","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3616902","url":null,"abstract":"This paper proposes an ultrahigh-step-down converter with a high voltage conversion ratio. The primary side of the proposed converter contains a half-bridge converter with a conventional buck converter. This design effectively reduces the voltage stress on the input-side diode and main switch while also recovering leakage inductance energy. The secondary side has a current-doubling rectification architecture, which enables zero-voltage switching and zero-current switching, thereby minimizing switching losses on the secondary-side switches and consequently improving overall efficiency. A 150-W prototype was implemented under an input voltage range of 140 to 170 V and an output voltage of 3.3 V. The efficiency and feasibility of the proposed converter were confirmed through steady-state analyses and a hardware implementation. In experiments, the peak efficiency of the prototype was 93.4% at an input of 140 V and 92.5% at an input of 170 V.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1724-1736"},"PeriodicalIF":3.9,"publicationDate":"2025-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11189051","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-30DOI: 10.1109/OJPEL.2025.3616196
Riadh Al-Haidari;Dylan Richmond;Mohammed Alhendi;El Mehdi Abbara;Abdullah Obeidat;Firas Alshatnawi;Mark Schadt;Mark Poliks;Arun V. Gowda;Jeff Erlbaum;Han Xiong;Collin Hitchcock
The demand for compact, customized power devices is growing, driven by advancements in electric transportation and renewable energy. Wide bandgap (WBG) semiconductors, such as silicon carbide (SiC), offer superior performance over traditional silicon (Si) due to their higher switching frequencies, improved efficiency, and greater voltage capabilities. However, conventional packaging methods often limit WBG adoption due to high costs and complexity. Additive manufacturing (AM) presents a promising alternative, enabling streamlined production, design flexibility, and reduced material waste. Leveraging AM processes and materials, significant improvements in size, weight, power density, and functionality can be realized. In this study, we demonstrated the first 1.7 kV low-profile, low-inductance multichip SiC module using direct ink writing. Finite element analysis of electrical stress defined the material requirements and design geometry, which facilitates the selection of candidate materials and processing techniques. Comprehensive testing of printed insulator and conductor materials validated their compatibility with SiC packaging requirements. Key SiC MOSFET parameters, such as on-resistance, leakage current, and threshold voltage, remained consistent with those of conventionally packaged modules and bare die performance, indicating minimal impact from AM processes. The printed modules passed a 4 kV AC isolation test, exhibited discharge-free operation up to 1.7 kV, withstood a double pulse test at 800 V / 105 A with inductance of 23.83 nH, and completed 50,000 power cycling cycles at 50 A without failure. Despite these achievements, high stress power cycling, thermal cycling and humidity bias tests revealed limitations in the current AM materials and processes, highlighting important areas for future improvement toward long-term reliability.
{"title":"Multichip SiC Power Module Packaging Using Direct Ink Writing","authors":"Riadh Al-Haidari;Dylan Richmond;Mohammed Alhendi;El Mehdi Abbara;Abdullah Obeidat;Firas Alshatnawi;Mark Schadt;Mark Poliks;Arun V. Gowda;Jeff Erlbaum;Han Xiong;Collin Hitchcock","doi":"10.1109/OJPEL.2025.3616196","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3616196","url":null,"abstract":"The demand for compact, customized power devices is growing, driven by advancements in electric transportation and renewable energy. Wide bandgap (WBG) semiconductors, such as silicon carbide (SiC), offer superior performance over traditional silicon (Si) due to their higher switching frequencies, improved efficiency, and greater voltage capabilities. However, conventional packaging methods often limit WBG adoption due to high costs and complexity. Additive manufacturing (AM) presents a promising alternative, enabling streamlined production, design flexibility, and reduced material waste. Leveraging AM processes and materials, significant improvements in size, weight, power density, and functionality can be realized. In this study, we demonstrated the first 1.7 kV low-profile, low-inductance multichip SiC module using direct ink writing. Finite element analysis of electrical stress defined the material requirements and design geometry, which facilitates the selection of candidate materials and processing techniques. Comprehensive testing of printed insulator and conductor materials validated their compatibility with SiC packaging requirements. Key SiC MOSFET parameters, such as on-resistance, leakage current, and threshold voltage, remained consistent with those of conventionally packaged modules and bare die performance, indicating minimal impact from AM processes. The printed modules passed a 4 kV AC isolation test, exhibited discharge-free operation up to 1.7 kV, withstood a double pulse test at 800 V / 105 A with inductance of 23.83 nH, and completed 50,000 power cycling cycles at 50 A without failure. Despite these achievements, high stress power cycling, thermal cycling and humidity bias tests revealed limitations in the current AM materials and processes, highlighting important areas for future improvement toward long-term reliability.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1656-1673"},"PeriodicalIF":3.9,"publicationDate":"2025-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11185071","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-30DOI: 10.1109/OJPEL.2025.3615672
F. M. Ibanez;Fernando Martin Porres;Mikhail Koksharov;Ainhoa Galarza
Multiple port DC/DC converters have applications in many fields: hybrid energy storage systems where batteries are combined with supercapacitors, multi-level and multi-modular inverters that need multiple DC sources, and DC microgrids. Among these converters, the multiple active bridge (MAB) is particularly attractive due to its high-power transfer and galvanic isolation capabilities. This paper introduces a predictive observer for the converter inner AC currents in order to reduce the number of required current sensors and to use only output DC current sensors. Using this observer, the control of the converter exploits the real-imaginary techniques (dq-frame) without those AC current sensors, thus reducing the cost and complexity of the sensing system and the associated required hardware. This method is verified through simulations using MATLAB/Simulink and Plexim PLECS platforms, and implemented in a 1000 W triple-port prototype. The results show that the observer does not significantly alter the response of the converter in terms of power control, reaching the steady state in around 8 ms for a step in the power reference, even considering a 50% mismatch between the observer and the real transformer windings time constants.
{"title":"DQ-Current Observer for Aiding the Control of Multiple Active Bridge Converters","authors":"F. M. Ibanez;Fernando Martin Porres;Mikhail Koksharov;Ainhoa Galarza","doi":"10.1109/OJPEL.2025.3615672","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3615672","url":null,"abstract":"Multiple port DC/DC converters have applications in many fields: hybrid energy storage systems where batteries are combined with supercapacitors, multi-level and multi-modular inverters that need multiple DC sources, and DC microgrids. Among these converters, the multiple active bridge (MAB) is particularly attractive due to its high-power transfer and galvanic isolation capabilities. This paper introduces a predictive observer for the converter inner AC currents in order to reduce the number of required current sensors and to use only output DC current sensors. Using this observer, the control of the converter exploits the real-imaginary techniques (dq-frame) without those AC current sensors, thus reducing the cost and complexity of the sensing system and the associated required hardware. This method is verified through simulations using MATLAB/Simulink and Plexim PLECS platforms, and implemented in a 1000 W triple-port prototype. The results show that the observer does not significantly alter the response of the converter in terms of power control, reaching the steady state in around 8 ms for a step in the power reference, even considering a 50% mismatch between the observer and the real transformer windings time constants.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1685-1702"},"PeriodicalIF":3.9,"publicationDate":"2025-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11184746","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Digital Twin (DT) is a rapidly emerging research area, offering solutions for seamless integration between digital and physical systems, driven by advancements in Internet of Things (IoT), Machine Learning (ML), data-rich environments, and 5G networks. Simultaneously, Power Electronics Converter (PEC)s have become indispensable in modern engineering, with industries such as renewable energy, electric vehicles, transportation, home appliances, industrial automation, energy transmission, and lighting systems relying heavily on them as central components. DT for power electronics represents an ongoing research topic, yet the literature inadequately provides a comprehensive overview of DT for PECs. This paper aims to provide an overview of critical subtopics in developing DT for PECs. It offers a detailed rationale for DT research, supported by an extensive literature analysis of over 180 publications identifying key research areas. The paper also outlines existing DT standards and introduces a five-dimensional architecture for DT based on state-of-the-art literature. Additionally, it provides an in-depth review of recent advancements in power electronics essential for practical DT implementation, particularly in sensor development, PEC modelling, and DT services. The authors also highlight their contributions to DT components in modelling and Condition Monitoring (CM) for PECs, presenting results, insights, and example datasets to foster further research. A key finding of the paper is the identification of research gaps through the literature review, particularly in data acquisition techniques, integrated condition monitoring, and PEC reliability. Overall, this work provides an overview of recent progress and outlines future research needed for the real-world implementation of DT for PECs.
{"title":"Overview of Digital Twin Development in Power Electronics","authors":"Sachin Kumar Bhoi;Sajib Chakraborty;Farzad Hosseinabadi;Mohamed Amine Frikha;Gamze Egin Martin;Aldo Sorniotti;Omar Hegazy","doi":"10.1109/OJPEL.2025.3615238","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3615238","url":null,"abstract":"Digital Twin (DT) is a rapidly emerging research area, offering solutions for seamless integration between digital and physical systems, driven by advancements in Internet of Things (IoT), Machine Learning (ML), data-rich environments, and 5G networks. Simultaneously, Power Electronics Converter (PEC)s have become indispensable in modern engineering, with industries such as renewable energy, electric vehicles, transportation, home appliances, industrial automation, energy transmission, and lighting systems relying heavily on them as central components. DT for power electronics represents an ongoing research topic, yet the literature inadequately provides a comprehensive overview of DT for PECs. This paper aims to provide an overview of critical subtopics in developing DT for PECs. It offers a detailed rationale for DT research, supported by an extensive literature analysis of over 180 publications identifying key research areas. The paper also outlines existing DT standards and introduces a five-dimensional architecture for DT based on state-of-the-art literature. Additionally, it provides an in-depth review of recent advancements in power electronics essential for practical DT implementation, particularly in sensor development, PEC modelling, and DT services. The authors also highlight their contributions to DT components in modelling and Condition Monitoring (CM) for PECs, presenting results, insights, and example datasets to foster further research. A key finding of the paper is the identification of research gaps through the literature review, particularly in data acquisition techniques, integrated condition monitoring, and PEC reliability. Overall, this work provides an overview of recent progress and outlines future research needed for the real-world implementation of DT for PECs.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1737-1758"},"PeriodicalIF":3.9,"publicationDate":"2025-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11184148","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-26DOI: 10.1109/OJPEL.2025.3614708
Liang Zhao;Xiongfei Wang;Zheming Jin
This paper presents an analytical framework to evaluate the damping contributed by inner control loops in grid-forming voltage-source converters. First, an impedance model is developed to characterize the dynamics of three types of inner loops, with the control-shaped resistive component indicating the damping for synchronous oscillations. Then, inner-outer loop interactions and interaction-induced oscillations are evaluated using the complex torque coefficient, with the damping torque used for stability assessment. The framework offers two benefits: (i) it yields intuitive physical insight into inner-outer loop interactions and oscillation mechanisms; and (ii) it enables inner-loop parameter tuning using electrical damping torque with minimal dependence on outer-loop operating points. The method is exemplified for virtual-admittance and current-control inner loops, where both synchronous and sub-synchronous oscillations are analyzed and mitigated. Time-domain simulations and hardware experiments validate the approach and its findings.
{"title":"Exploring Damping Effect of Inner Control Loops for Grid-Forming VSCs","authors":"Liang Zhao;Xiongfei Wang;Zheming Jin","doi":"10.1109/OJPEL.2025.3614708","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3614708","url":null,"abstract":"This paper presents an analytical framework to evaluate the damping contributed by inner control loops in grid-forming voltage-source converters. First, an impedance model is developed to characterize the dynamics of three types of inner loops, with the control-shaped resistive component indicating the damping for synchronous oscillations. Then, inner-outer loop interactions and interaction-induced oscillations are evaluated using the complex torque coefficient, with the damping torque used for stability assessment. The framework offers two benefits: (i) it yields intuitive physical insight into inner-outer loop interactions and oscillation mechanisms; and (ii) it enables inner-loop parameter tuning using electrical damping torque with minimal dependence on outer-loop operating points. The method is exemplified for virtual-admittance and current-control inner loops, where both synchronous and sub-synchronous oscillations are analyzed and mitigated. Time-domain simulations and hardware experiments validate the approach and its findings.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1595-1608"},"PeriodicalIF":3.9,"publicationDate":"2025-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11181165","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145255906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The growing penetration of renewable energy systems (RESs) into power grids has introduced challenges such as reduced inertia and increased generation instability. To address these issues, there is an urgent need for RESs to actively support grid operations. This essential capability is facilitated by high-performance power conversion systems and advanced control strategies. Among various RESs, wind turbines (WTs) and photovoltaic (PV) systems, equipped with partially or fully rated power electronics converters (PECs), are the most promising solutions. Since these systems often operate below their rated capacity, the available power headroom can be effectively utilised to provide ancillary services. By employing advanced grid-supporting controls and coordination techniques, WT and PV systems can further enhance grid stability by providing voltage regulation, frequency stabilisation, and low-voltage ride-through (LVRT) performance. This paper addresses this timely and critical topic by exploring the contemporary control and coordination strategies that enable WT and PV systems to deliver essential grid-supporting services. The scope of discussion encompasses not only the control strategies for individual RESs but also the system-level coordination using decentralised, distributed, and centralised methods.
{"title":"Grid-Supporting Renewable Energy Systems With Power Electronics Interfaces","authors":"Shuo Yan;Lasantha Meehagapola;Yongheng Yang;Frede Blaabjerg","doi":"10.1109/OJPEL.2025.3615123","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3615123","url":null,"abstract":"The growing penetration of renewable energy systems (RESs) into power grids has introduced challenges such as reduced inertia and increased generation instability. To address these issues, there is an urgent need for RESs to actively support grid operations. This essential capability is facilitated by high-performance power conversion systems and advanced control strategies. Among various RESs, wind turbines (WTs) and photovoltaic (PV) systems, equipped with partially or fully rated power electronics converters (PECs), are the most promising solutions. Since these systems often operate below their rated capacity, the available power headroom can be effectively utilised to provide ancillary services. By employing advanced grid-supporting controls and coordination techniques, WT and PV systems can further enhance grid stability by providing voltage regulation, frequency stabilisation, and low-voltage ride-through (LVRT) performance. This paper addresses this timely and critical topic by exploring the contemporary control and coordination strategies that enable WT and PV systems to deliver essential grid-supporting services. The scope of discussion encompasses not only the control strategies for individual RESs but also the system-level coordination using decentralised, distributed, and centralised methods.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1609-1640"},"PeriodicalIF":3.9,"publicationDate":"2025-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11182318","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145255914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-25DOI: 10.1109/OJPEL.2025.3614557
Ali Nadermohammadi;Hamed Abdi;Mohammad Mohsen Hayati;Arman Oshnoei;Frede Blaabjerg;Seyed Hossein Hosseini;S. M. Muyeen
This paper presents an ultra-high voltage gain, quadratic-based DC-DC structure optimized for cost-effectiveness and high power density, specifically for DC microgrid applications. The proffered design integrates a coupled inductor (CI) with a quadratic step-up structure to accomplish a substantial step-up in voltage. The converter’s voltage gain can be regulated through two key criteria: the duty cycle of the power switches and the turn ratio of a two-winding CI, providing enhanced flexibility in design. Key attributes of the proffered topology encompass its ultra-high voltage gain, reduced voltage stress on the switching components, continuous input current, a common ground among the input and output, high efficiency via soft switching on semiconductor devices, and synchronized switch operation. Comprehensive details are provided on the operational principles, steady-state behavior, design considerations, and efficiency evaluation, accompanied by dynamic modeling and control assessment. To highlight the advantages of this topology, it is compared with other related topologies. The potential of the suggested design is affirmed by testing a 600W experimental system utilizing a switching frequency of 50 kHz, with an input voltage of 20 V and an output voltage of 600 V.
{"title":"Cost-Effective Quadratic Ultra-High Gain DC–DC Converter With High Power Density for DC Microgrid Applications","authors":"Ali Nadermohammadi;Hamed Abdi;Mohammad Mohsen Hayati;Arman Oshnoei;Frede Blaabjerg;Seyed Hossein Hosseini;S. M. Muyeen","doi":"10.1109/OJPEL.2025.3614557","DOIUrl":"https://doi.org/10.1109/OJPEL.2025.3614557","url":null,"abstract":"This paper presents an ultra-high voltage gain, quadratic-based DC-DC structure optimized for cost-effectiveness and high power density, specifically for DC microgrid applications. The proffered design integrates a coupled inductor (CI) with a quadratic step-up structure to accomplish a substantial step-up in voltage. The converter’s voltage gain can be regulated through two key criteria: the duty cycle of the power switches and the turn ratio of a two-winding CI, providing enhanced flexibility in design. Key attributes of the proffered topology encompass its ultra-high voltage gain, reduced voltage stress on the switching components, continuous input current, a common ground among the input and output, high efficiency via soft switching on semiconductor devices, and synchronized switch operation. Comprehensive details are provided on the operational principles, steady-state behavior, design considerations, and efficiency evaluation, accompanied by dynamic modeling and control assessment. To highlight the advantages of this topology, it is compared with other related topologies. The potential of the suggested design is affirmed by testing a 600W experimental system utilizing a switching frequency of 50 kHz, with an input voltage of 20 V and an output voltage of 600 V.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"1703-1723"},"PeriodicalIF":3.9,"publicationDate":"2025-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11180007","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145351992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-17DOI: 10.1109/OJPEL.2025.3611105
Hafte H. Adhena;Alan J. Watson;Niek Moonen;Steve Greedy;Frank Leferink
Solid-state transformers are potential solutions for power conversion applications with multiple ports, enabling the linking of renewable energy sources and asynchronous systems. However, the high dV/dt and parasitics in the transformer and switching devices can cause ringing (oscillation) in the collectors of the switching devices and transformers. This paper analyses the main causes of conducted common-mode emissions of solid-state transformers, including experimental measurement techniques for leakage inductance and parasitic capacitances of a transformer. In addition, the impacts of snubber and decoupling capacitors on the conducted emission and switching losses, considering single-phase shift and triple-phase shift modulations, are presented in time and frequency domains. On top of that, the effect of DC-link capacitor type on conducted emissions is investigated. Based on the experimental results, the parasitic capacitances of the switching devices and the transformer are the main propagation paths of the conducted common-mode emission. Decoupling capacitors reduce the high-frequency oscillations, but the value should be selected carefully to avoid resonance in the low-frequency ranges. Triple phase-shift modulation reduces the AC link reactive current, but it increases both conducted CM emissions and switching losses, while single phase-shift modulation increases the reactive power and reduces the conducted CM emissions.
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