Pub Date : 2024-04-16DOI: 10.1109/OJPEL.2024.3389211
Z. Li;L. Wang;R. Liu;R. Mirzadarani;T. Luo;D. Lyu;M. Ghaffarian Niasar;Z. Qin
Traditional methods such as Steinmetz's equation (SE) and its improved variant (iGSE) have demonstrated limited precision in estimating power loss for magnetic materials. The introduction of Neural Network technology for assessing magnetic component power loss has significantly enhanced accuracy. Yet, an efficient method to incorporate detailed flux density information—which critically impacts accuracy—remains elusive. Our study introduces an innovative approach that merges Fast Fourier Transform (FFT) with a Feedforward Neural Network (FNN), aiming to overcome this challenge. To optimize the model further and strike a refined balance between complexity and accuracy, Multi-Objective Optimization (MOO) is employed to identify the ideal combination of hyperparameters, such as layer count, neuron number, activation functions, optimizers, and batch size. This optimized Neural Network outperforms traditionally intuitive models in both accuracy and size. Leveraging the optimized base model for known materials, transfer learning is applied to new materials with limited data, effectively addressing data scarcity. The proposed approach substantially enhances model training efficiency, achieves remarkable accuracy, and sets an example for Artificial Intelligence applications in loss and electrical characteristic predictions with challenges of model size, accuracy goals, and limited data.
{"title":"A Data-Driven Model for Power Loss Estimation of Magnetic Materials Based on Multi-Objective Optimization and Transfer Learning","authors":"Z. Li;L. Wang;R. Liu;R. Mirzadarani;T. Luo;D. Lyu;M. Ghaffarian Niasar;Z. Qin","doi":"10.1109/OJPEL.2024.3389211","DOIUrl":"10.1109/OJPEL.2024.3389211","url":null,"abstract":"Traditional methods such as Steinmetz's equation (SE) and its improved variant (iGSE) have demonstrated limited precision in estimating power loss for magnetic materials. The introduction of Neural Network technology for assessing magnetic component power loss has significantly enhanced accuracy. Yet, an efficient method to incorporate detailed flux density information—which critically impacts accuracy—remains elusive. Our study introduces an innovative approach that merges Fast Fourier Transform (FFT) with a Feedforward Neural Network (FNN), aiming to overcome this challenge. To optimize the model further and strike a refined balance between complexity and accuracy, Multi-Objective Optimization (MOO) is employed to identify the ideal combination of hyperparameters, such as layer count, neuron number, activation functions, optimizers, and batch size. This optimized Neural Network outperforms traditionally intuitive models in both accuracy and size. Leveraging the optimized base model for known materials, transfer learning is applied to new materials with limited data, effectively addressing data scarcity. The proposed approach substantially enhances model training efficiency, achieves remarkable accuracy, and sets an example for Artificial Intelligence applications in loss and electrical characteristic predictions with challenges of model size, accuracy goals, and limited data.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10502151","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140609979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-16DOI: 10.1109/OJPEL.2024.3389105
Valeriya Titova;Martin Lapke
This study presents a novel, integrated approach to investigating and characterizing the impact of humidity on Insulated-Gate Bipolar Transistors (IGBTs) within large-scale inverter systems. Combining meticulously designed experimental setups and advanced finite element simulations, we delve deep into the complex dynamics of moisture transfer within IGBT modules. Our research demonstrates a meticulously designed experimental setup within a controlled climate chamber, enabling a comprehensive characterization process of the humidity transfer into the IGBT module. The proposed method allows for a detailed study of the moisture distribution as well as the effect of the temperature on the moisture within an IGBT module. We leverage the advanced capabilities of commercial finite element software to complement our experimental findings. These simulations enable a deeper understanding of the moisture distribution's symmetries and provide invaluable insights into simplifying the complex simulations. By integrating these diverse methodologies, we develop a comprehensive approach that deciphers the spatial distribution of humidity within the module and its real-time responses to environmental conditions. This integrated approach holds an immense potential for analyzing optimal system performance and facilitating self-optimization of the inverter by predicting stress induced by humidity.
{"title":"Investigating Humidity Transfer in IGBT Modules: An Integrated Experimental and Simulation Approach","authors":"Valeriya Titova;Martin Lapke","doi":"10.1109/OJPEL.2024.3389105","DOIUrl":"10.1109/OJPEL.2024.3389105","url":null,"abstract":"This study presents a novel, integrated approach to investigating and characterizing the impact of humidity on Insulated-Gate Bipolar Transistors (IGBTs) within large-scale inverter systems. Combining meticulously designed experimental setups and advanced finite element simulations, we delve deep into the complex dynamics of moisture transfer within IGBT modules. Our research demonstrates a meticulously designed experimental setup within a controlled climate chamber, enabling a comprehensive characterization process of the humidity transfer into the IGBT module. The proposed method allows for a detailed study of the moisture distribution as well as the effect of the temperature on the moisture within an IGBT module. We leverage the advanced capabilities of commercial finite element software to complement our experimental findings. These simulations enable a deeper understanding of the moisture distribution's symmetries and provide invaluable insights into simplifying the complex simulations. By integrating these diverse methodologies, we develop a comprehensive approach that deciphers the spatial distribution of humidity within the module and its real-time responses to environmental conditions. This integrated approach holds an immense potential for analyzing optimal system performance and facilitating self-optimization of the inverter by predicting stress induced by humidity.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10502161","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140609980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article presents a novel scheme for condition monitoring of dc-link capacitors in modular multilevel converters (MMCs). The proposed solution uses estimated capacitance values of the dc-link capacitors for indicating their state-of-health (SoH). Moreover, a comparative approach is proposed, where the estimated capacitances of all submodule capacitors are used to separate parameter drifts caused by aging from parameter drifts caused by other factors such as temperature change. It is shown in simulation and experimental results that an equal drift in all capacitance estimates can be a result of factors other than aging. However, a drift in the capacitance of one capacitor compared to the average capacitance of all submodules may be attributed to aging of that specific unit. Using the proposed comparative technique, there is no need for additional temperature sensors to account for the effect of temperature variations on the online estimations. Simulation and experimental results demonstrate an overall estimation error of less than 1% when applying the proposed comparative technique.
{"title":"Practical Online Condition Monitoring of DC-Link Capacitors in Modular Multilevel Converters: A Comparative Approach","authors":"Mohsen Asoodar;Mehrdad Nahalparvari;Christer Danielsson;Hans-Peter Nee","doi":"10.1109/OJPEL.2024.3387829","DOIUrl":"10.1109/OJPEL.2024.3387829","url":null,"abstract":"This article presents a novel scheme for condition monitoring of dc-link capacitors in modular multilevel converters (MMCs). The proposed solution uses estimated capacitance values of the dc-link capacitors for indicating their state-of-health (SoH). Moreover, a comparative approach is proposed, where the estimated capacitances of all submodule capacitors are used to separate parameter drifts caused by aging from parameter drifts caused by other factors such as temperature change. It is shown in simulation and experimental results that an equal drift in all capacitance estimates can be a result of factors other than aging. However, a drift in the capacitance of one capacitor compared to the average capacitance of all submodules may be attributed to aging of that specific unit. Using the proposed comparative technique, there is no need for additional temperature sensors to account for the effect of temperature variations on the online estimations. Simulation and experimental results demonstrate an overall estimation error of less than 1% when applying the proposed comparative technique.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10496921","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567143","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-10DOI: 10.1109/OJPEL.2024.3387076
Saeed Jahdi;Akhil S. Kumar;Matthew Deakin;Phil C. Taylor;Martin Kuball
In this work, the possibility of using different generations of $beta$ -Ga 2 0 3 as an ultra-wide-bandgap power semiconductor device for high power converter applications is explored. The competitiveness of $beta$ -Ga 2 0 3 for power converters in still not well quantified, for which the major determining factors are the on-state resistance, $R_{text{ON}}$ , reverse blocking voltage, $V_{text{BR}}$ , and the thermal resistance, $R_{text{th}}$ . We have used the best reported device specifications from literature, both in terms of reports of experimental measurements and potential demonstrated by computer-aided designs, to study power converter performance for different device generations. Modular multilevel converter-based voltage source converters are identified as a topology with significant potential to exploit these device characteristics. The performance of MVDC & HVDC converters based on this topology have been analysed, focusing on system level power losses and case temperature rise at the device level. Comparisons of these $beta$ -Ga 2 0 3 devices are made against contemporary SiC-FET and Si-IGBTs. The results have indicated that although the early $beta$ -Ga 2 0 3 devices are not competitive to incumbent Si-IGBT and SiC-FET modules, the latest experimental measurements on NiO $_mathrm{X}$ / $beta$ -Ga 2 0 3 and $beta$ -Ga 2 0 3 /diamond significantly surpass the performance of incumbent modules. Furthermore, parameters derived from semiconductor-level simulations indicate that the $beta$ -Ga 2 0 3 /diamond in superjunction structures delivers even superior performance in these power converters.
{"title":"$beta$-Ga203 in Power Electronics Converters: Opportunities & Challenges","authors":"Saeed Jahdi;Akhil S. Kumar;Matthew Deakin;Phil C. Taylor;Martin Kuball","doi":"10.1109/OJPEL.2024.3387076","DOIUrl":"10.1109/OJPEL.2024.3387076","url":null,"abstract":"In this work, the possibility of using different generations of \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000 as an ultra-wide-bandgap power semiconductor device for high power converter applications is explored. The competitiveness of \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000 for power converters in still not well quantified, for which the major determining factors are the on-state resistance, \u0000<inline-formula><tex-math>$R_{text{ON}}$</tex-math></inline-formula>\u0000, reverse blocking voltage, \u0000<inline-formula><tex-math>$V_{text{BR}}$</tex-math></inline-formula>\u0000, and the thermal resistance, \u0000<inline-formula><tex-math>$R_{text{th}}$</tex-math></inline-formula>\u0000. We have used the best reported device specifications from literature, both in terms of reports of experimental measurements and potential demonstrated by computer-aided designs, to study power converter performance for different device generations. Modular multilevel converter-based voltage source converters are identified as a topology with significant potential to exploit these device characteristics. The performance of MVDC & HVDC converters based on this topology have been analysed, focusing on system level power losses and case temperature rise at the device level. Comparisons of these \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000 devices are made against contemporary SiC-FET and Si-IGBTs. The results have indicated that although the early \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000 devices are not competitive to incumbent Si-IGBT and SiC-FET modules, the latest experimental measurements on NiO\u0000<inline-formula><tex-math>$_mathrm{X}$</tex-math></inline-formula>\u0000/\u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000 and \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000/diamond significantly surpass the performance of incumbent modules. Furthermore, parameters derived from semiconductor-level simulations indicate that the \u0000<inline-formula><tex-math>$beta$</tex-math></inline-formula>\u0000-Ga\u0000<sub>2</sub>\u00000\u0000<sub>3</sub>\u0000/diamond in superjunction structures delivers even superior performance in these power converters.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10496151","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Using the Z-network idea and conventional isolated power converters as its foundation, this article introduces a multi-port converter. This article proposes a topology that is called Multi-Port Z-Network Converter (MPZNC). A grid-connected inverter can include N input sources into a single DC bus using the suggested topology. Bypassing the input and output circuits was another capability it possessed with the boost function. Compared to traditional converters, these one-use fewer parts to integrate various energy sources. Consequently, it has better circuit properties and achieves higher conversion efficiencies. In comparison to the standard Z-Source Converter (ZSC), it improves the input-output voltage transformation ratio and provides a wider voltage control range. The circuit design, operating principle, control mechanism, and simulation data have been presented to prove technically possible. To investigate the suggested MPZNC-fed Single Phase Five Level (SPFL) inverter in the given scenario, a 1.5 kW, 230 V, 50 Hz miniature laboratory study model was created. According to the findings, the suggested converter has an efficiency of around 93% and provides double the amount of boosting time as the standard ZSC converter.
本文以 Z 网络思想和传统隔离式电源转换器为基础，介绍了一种多端口转换器。本文提出的拓扑结构被称为多端口 Z 网络转换器（MPZNC）。使用所建议的拓扑结构，并网逆变器可将 N 个输入源并入一个直流母线。通过升压功能绕过输入和输出电路是它具备的另一项能力。与传统的转换器相比，这些转换器使用更少的部件来集成各种能源。因此，它的电路性能更好，转换效率更高。与标准 Z 源转换器（ZSC）相比，它提高了输入输出电压转换率，提供了更宽的电压控制范围。电路设计、工作原理、控制机制和仿真数据都已提交，证明在技术上是可行的。为了研究建议的 MPZNC 供电单相五电平（SPFL）逆变器在给定方案中的应用，创建了一个 1.5 kW、230 V、50 Hz 的微型实验室研究模型。根据研究结果，建议的转换器效率约为 93%，提供的升压时间是标准 ZSC 转换器的两倍。
{"title":"Design of an Extendable High Boost Multi-Port Z-Network Converter for Small Power Grid-Connected PV Applications","authors":"Kanagaraj N;Ramasamy M;Vijayakumar M;Obaid Aldosari","doi":"10.1109/OJPEL.2024.3386023","DOIUrl":"10.1109/OJPEL.2024.3386023","url":null,"abstract":"Using the Z-network idea and conventional isolated power converters as its foundation, this article introduces a multi-port converter. This article proposes a topology that is called Multi-Port Z-Network Converter (MPZNC). A grid-connected inverter can include \u0000<italic>N</i>\u0000 input sources into a single DC bus using the suggested topology. Bypassing the input and output circuits was another capability it possessed with the boost function. Compared to traditional converters, these one-use fewer parts to integrate various energy sources. Consequently, it has better circuit properties and achieves higher conversion efficiencies. In comparison to the standard Z-Source Converter (ZSC), it improves the input-output voltage transformation ratio and provides a wider voltage control range. The circuit design, operating principle, control mechanism, and simulation data have been presented to prove technically possible. To investigate the suggested MPZNC-fed Single Phase Five Level (SPFL) inverter in the given scenario, a 1.5 kW, 230 V, 50 Hz miniature laboratory study model was created. According to the findings, the suggested converter has an efficiency of around 93% and provides double the amount of boosting time as the standard ZSC converter.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10494527","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-08DOI: 10.1109/OJPEL.2024.3386198
Felipe Arraño-Vargas;Vassilios G. Agelidis;Georgios Konstantinou
Real-time simulations (RTS) and hardware-in-the-loop (HiL) testing are becoming increasingly vital to the power industry in order to support the pace of the ongoing energy transition. Such methods enable the optimization of power systems and validation of solutions, applications and components under realistic operational conditions while minimizing associated risks. The Real-Time Simulations Laboratory at The University of New South Wales, in Sydney Australia (RTS@UNSW) is a dedicated research facility built with a focus on enabling and advancing the use of RTS and HiL in Australia. The lab is equipped with state-of-the-art simulators and testing equipment supporting integration of power electronics at scale and the development and deployment of power electronics defined power systems. This paper will provide a brief introduction to the Australian context related to the energy transition, an overview of the available facilities, and some of the key research and industry-related projects that it supports.
实时模拟（RTS）和硬件在环（HiL）测试对电力行业越来越重要，以支持正在进行的能源转型的步伐。通过这些方法可以优化电力系统，并在现实运行条件下验证解决方案、应用和组件，同时最大限度地降低相关风险。位于澳大利亚悉尼新南威尔士大学的实时模拟实验室（RTS@UNSW）是一个专门的研究机构，其建设重点是在澳大利亚推广和促进实时模拟和 HiL 的使用。该实验室配备了最先进的模拟器和测试设备，可支持大规模的电力电子集成以及电力电子定义电力系统的开发和部署。本文将简要介绍澳大利亚能源转型的相关背景、现有设施的概况以及实验室支持的一些关键研究和行业相关项目。
{"title":"UNSW Sydney's Real-Time Simulations Laboratory (RTS@UNSW): Supporting Power Electronics Defined Power Systems, Down Under","authors":"Felipe Arraño-Vargas;Vassilios G. Agelidis;Georgios Konstantinou","doi":"10.1109/OJPEL.2024.3386198","DOIUrl":"10.1109/OJPEL.2024.3386198","url":null,"abstract":"Real-time simulations (RTS) and hardware-in-the-loop (HiL) testing are becoming increasingly vital to the power industry in order to support the pace of the ongoing energy transition. Such methods enable the optimization of power systems and validation of solutions, applications and components under realistic operational conditions while minimizing associated risks. The Real-Time Simulations Laboratory at The University of New South Wales, in Sydney Australia (RTS@UNSW) is a dedicated research facility built with a focus on enabling and advancing the use of RTS and HiL in Australia. The lab is equipped with state-of-the-art simulators and testing equipment supporting integration of power electronics at scale and the development and deployment of power electronics defined power systems. This paper will provide a brief introduction to the Australian context related to the energy transition, an overview of the available facilities, and some of the key research and industry-related projects that it supports.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10494882","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-30DOI: 10.1109/OJPEL.2024.3407163
Shubhangi Bhadoria;Soundhariya G S;Hans-Peter Nee
The fault clearance time in the power system can vary from a few milliseconds to a few hundred milliseconds. Power electronics converters should be able to provide the increased current during faults without failing due to thermal limits. Hence, the heat generated in the semiconductor chip due to the over-current (OC) should be removed as soon as it is generated. In this paper, cooling by heat-absorbing material has been investigated on the top, bottom, and top $+$ bottom of the SiC MOSFET chip using COMSOL simulations for OCs. The heat-absorbing materials considered in the paper are copper, graphite, and aluminum. The maximum allowed chip temperature is assumed to be 250 °C since SiC devices do not fail in this range of temperature. It is concluded that the cooling on the top of the chip has the best performance among the three arrangements discussed in the paper in terms of OC duration and steady-state temperature. Another conclusion is that copper has the best performance due to higher thermal capacity for the same volume of the heat-absorbing material.
电力系统的故障清除时间从几毫秒到几百毫秒不等。电力电子转换器应能在故障期间提供增大的电流，而不会因热限制而失效。因此，由于过电流（OC）而在半导体芯片中产生的热量应在其产生后立即清除。本文使用 COMSOL 模拟 OC，研究了吸热材料对 SiC MOSFET 芯片顶部、底部和顶部 $+$ 底部的冷却作用。文中考虑的吸热材料有铜、石墨和铝。由于 SiC 器件在此温度范围内不会失效，因此假定允许的最高芯片温度为 250 °C。从 OC 持续时间和稳态温度来看，本文讨论的三种布置方式中，芯片顶部冷却的性能最好。另一个结论是，铜的性能最好，因为相同体积的吸热材料具有更高的热容量。
{"title":"Comparison of Top and Bottom Cooling for Short Duration of Over-Currents for SiC Devices: An Analysis of the Quantity and Location of Heat-Absorbing Materials","authors":"Shubhangi Bhadoria;Soundhariya G S;Hans-Peter Nee","doi":"10.1109/OJPEL.2024.3407163","DOIUrl":"10.1109/OJPEL.2024.3407163","url":null,"abstract":"The fault clearance time in the power system can vary from a few milliseconds to a few hundred milliseconds. Power electronics converters should be able to provide the increased current during faults without failing due to thermal limits. Hence, the heat generated in the semiconductor chip due to the over-current (OC) should be removed as soon as it is generated. In this paper, cooling by heat-absorbing material has been investigated on the top, bottom, and top \u0000<inline-formula><tex-math>$+$</tex-math></inline-formula>\u0000 bottom of the SiC MOSFET chip using COMSOL simulations for OCs. The heat-absorbing materials considered in the paper are copper, graphite, and aluminum. The maximum allowed chip temperature is assumed to be 250 °C since SiC devices do not fail in this range of temperature. It is concluded that the cooling on the top of the chip has the best performance among the three arrangements discussed in the paper in terms of OC duration and steady-state temperature. Another conclusion is that copper has the best performance due to higher thermal capacity for the same volume of the heat-absorbing material.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10542412","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141189970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-30DOI: 10.1109/OJPEL.2024.3407348
Jan Martiš;Pavel Vorel;Radek Tománek;Pavol Bauer
Converters that produce an isolated dc output from a three-phase mains supply are often required. Moreover, input power factor correction (PFC) functionality is essential. A standard two-stage conception with ac/dc and dc/dc converters may be used. However, a single-stage or quasi-single-stage solution can simplify the circuitry and increase efficiency; therefore, many variants of single-stage converters have been researched and published. This paper introduces a novel quasi-single-stage resonant topology with an integrated transformer. Additionally, an original control structure is proposed. This converter enables full control over the output dc voltage and current. Another benefit of the proposed converter is a relatively low complexity of its power circuit and control compared to other single-stage converters. The operation principle of the power circuit is explained and the control strategy is also analyzed in detail. A description of the integrated transformer together with aspects of the resonant circuit design are presented. A simulation of the entire converter was performed and evaluated. Furthermore, a test-bench prototype was designed and constructed and is outlined in this paper. The test-bench measurement results are provided and compared to the simulation results. Power factor and efficiency measurements in terms of their dependence on the output voltage and current are included.
{"title":"Three-Phase AC/DC Quasi-Single-Stage Isolated Resonant PFC Converter With Integrated Transformer","authors":"Jan Martiš;Pavel Vorel;Radek Tománek;Pavol Bauer","doi":"10.1109/OJPEL.2024.3407348","DOIUrl":"10.1109/OJPEL.2024.3407348","url":null,"abstract":"Converters that produce an isolated dc output from a three-phase mains supply are often required. Moreover, input power factor correction (PFC) functionality is essential. A standard two-stage conception with ac/dc and dc/dc converters may be used. However, a single-stage or quasi-single-stage solution can simplify the circuitry and increase efficiency; therefore, many variants of single-stage converters have been researched and published. This paper introduces a novel quasi-single-stage resonant topology with an integrated transformer. Additionally, an original control structure is proposed. This converter enables full control over the output dc voltage and current. Another benefit of the proposed converter is a relatively low complexity of its power circuit and control compared to other single-stage converters. The operation principle of the power circuit is explained and the control strategy is also analyzed in detail. A description of the integrated transformer together with aspects of the resonant circuit design are presented. A simulation of the entire converter was performed and evaluated. Furthermore, a test-bench prototype was designed and constructed and is outlined in this paper. The test-bench measurement results are provided and compared to the simulation results. Power factor and efficiency measurements in terms of their dependence on the output voltage and current are included.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10542376","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141189973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-28DOI: 10.1109/OJPEL.2024.3406198
Navid Rasekh;Jun Wang;Xibo Yuan
Nowadays, in a power electronics system, most components such as power electronics devices (MOSFETs, IGBTs, etc.) and capacitors are standardized, i.e., sold as a whole standard item with various values and ratings. However, magnetic components, in particular, high-frequency transformers (HFTs) and inductors, are still primarily designed and built by the end users using discrete components such as magnetic cores and wires. This customized design and built approach by the end users may not achieve the overall best performance, as efficiency, power density, reliability, and accurate loss estimation, without the manufacturers' years of experience and advanced design tools. In addition, if the magnetic components are standardized and sold in large quantities, they can reduce manufacturing costs and improve design and reliability over the years. In the same way as resistors, capacitors, and power devices are sold, it is the authors' hope that the users can buy standardized magnetic components from manufacturers' product catalogues with power loss accurately estimated as well. Therefore, this article aims to pave the way for standardizing magnetic components and provides a practical and accurate power loss estimation method embedded in the datasheets of the standardized magnetic components under power electronics excitation. The presented work explores the purpose and necessity of using a complete loss dataset (i.e., core and winding losses) for one magnetic component design and how to implement them. Replacing magnetic variables with time-domain electrical variables makes it possible to perform a straightforward loss mapping/estimation and prepare for more parameters to be included in the loss map, such as HFTs' load conditions. User-friendly loss maps can conveniently release information about power magnetics losses and can be applied practically to power electronics applications as a brand-new version of the datasheets. This article also provides an example of a future datasheet for rectangular (PWM) voltage excitation of standardized magnetic components.
{"title":"Towards Standardized Magnetic Components Under Power Electronics Excitation With User-Friendly Loss Maps","authors":"Navid Rasekh;Jun Wang;Xibo Yuan","doi":"10.1109/OJPEL.2024.3406198","DOIUrl":"10.1109/OJPEL.2024.3406198","url":null,"abstract":"Nowadays, in a power electronics system, most components such as power electronics devices (MOSFETs, IGBTs, etc.) and capacitors are standardized, i.e., sold as a whole standard item with various values and ratings. However, magnetic components, in particular, high-frequency transformers (HFTs) and inductors, are still primarily designed and built by the end users using discrete components such as magnetic cores and wires. This customized design and built approach by the end users may not achieve the overall best performance, as efficiency, power density, reliability, and accurate loss estimation, without the manufacturers' years of experience and advanced design tools. In addition, if the magnetic components are standardized and sold in large quantities, they can reduce manufacturing costs and improve design and reliability over the years. In the same way as resistors, capacitors, and power devices are sold, it is the authors' hope that the users can buy standardized magnetic components from manufacturers' product catalogues with power loss accurately estimated as well. Therefore, this article aims to pave the way for standardizing magnetic components and provides a practical and accurate power loss estimation method embedded in the datasheets of the standardized magnetic components under power electronics excitation. The presented work explores the purpose and necessity of using a complete loss dataset (i.e., core and winding losses) for one magnetic component design and how to implement them. Replacing magnetic variables with time-domain electrical variables makes it possible to perform a straightforward loss mapping/estimation and prepare for more parameters to be included in the loss map, such as HFTs' load conditions. User-friendly loss maps can conveniently release information about power magnetics losses and can be applied practically to power electronics applications as a brand-new version of the datasheets. This article also provides an example of a future datasheet for rectangular (PWM) voltage excitation of standardized magnetic components.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10540324","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141190017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-28DOI: 10.1109/OJPEL.2024.3382808
Rohan Shailesh Deshmukh;Pavol Bauer;Hani Vahedi
This article presents a detailed procedure for deriving the generalized average model (GAM) of a dual active bridge converter. The proposed model incorporates higher orders of harmonic components to increase accuracy. Moreover, the turn ratio of the high-frequency transformer ( $N_{mathrm{t}}$ ) is considered for realistic modeling, which removes the conventional assumption of unity turn ratio. A detailed model of the DAB will ensure an accurate control design. Required mathematical expressions are derived and explained thoroughly, with an example showcasing a GAM model of the DAB converter up to the ninth harmonics. Several GAM models using different harmonic orders (first, third, fifth, seventh, and ninth harmonics) are derived and compared to the PLECS simulation model and a real-time simulation of the DAB converter on the PLECS RT-Box-2. Results show that including up to the ninth harmonics in the proposed model of the DAB converter leads to achieving accurate voltage and current amplitudes that are almost identical to the simulation outputs and even better than the experimental results.
本文介绍了推导双主动桥式转换器广义平均模型（GAM）的详细步骤。所提出的模型包含了更高阶的谐波成分，以提高精度。此外，还考虑了高频变压器的匝数比 ($N_{mathrm{t}}$)，以建立切合实际的模型，从而消除了匝数比为一的传统假设。DAB 的详细模型将确保精确的控制设计。我们推导并详细解释了所需的数学表达式，并以一个实例展示了 DAB 转换器高达 9 次谐波的 GAM 模型。使用不同的谐波阶数（第一次、第三次、第五次、第七次和第九次谐波）推导出多个 GAM 模型，并与 PLECS 仿真模型和在 PLECS RT-Box-2 上对 DAB 转换器进行的实时仿真进行比较。结果表明，在所提出的 DAB 转换器模型中最多包含九次谐波，从而实现了精确的电压和电流幅值，这些幅值与模拟输出几乎相同，甚至优于实验结果。
{"title":"High-Accuracy Generalized Average Model of Dual Active Bridge Converters","authors":"Rohan Shailesh Deshmukh;Pavol Bauer;Hani Vahedi","doi":"10.1109/OJPEL.2024.3382808","DOIUrl":"10.1109/OJPEL.2024.3382808","url":null,"abstract":"This article presents a detailed procedure for deriving the generalized average model (GAM) of a dual active bridge converter. The proposed model incorporates higher orders of harmonic components to increase accuracy. Moreover, the turn ratio of the high-frequency transformer (\u0000<inline-formula><tex-math>$N_{mathrm{t}}$</tex-math></inline-formula>\u0000) is considered for realistic modeling, which removes the conventional assumption of unity turn ratio. A detailed model of the DAB will ensure an accurate control design. Required mathematical expressions are derived and explained thoroughly, with an example showcasing a GAM model of the DAB converter up to the ninth harmonics. Several GAM models using different harmonic orders (first, third, fifth, seventh, and ninth harmonics) are derived and compared to the PLECS simulation model and a real-time simulation of the DAB converter on the PLECS RT-Box-2. Results show that including up to the ninth harmonics in the proposed model of the DAB converter leads to achieving accurate voltage and current amplitudes that are almost identical to the simulation outputs and even better than the experimental results.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10483254","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140324809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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