Pub Date : 2024-07-25DOI: 10.1109/OJPEL.2024.3433605
Christopher D. New;Andrew N. Lemmon;Aaron D. Brovont
Current conducted emissions standards provide considerable flexibility in the handling of interface converters, which are of increasing importance for the design and implementation of microgrids. Of particular interest herein is the approach selected for terminating the output ports of such converters during conducted emissions qualification testing. This article provides a theoretical treatment of an interface converter consisting of a SiC-based single-phase inverter in a custom-built testbed for evaluating conducted emissions. The accompanying analysis demonstrates that the selection of output terminations plays a significant role in determining the resulting emissions, with a difference of up to 40 dB observed in the relevant emissions metrics. These predictions are validated with a set of empirical studies. The dependence on output termination selection is emphasized further in deployed systems, which are not influenced by the presence of compliance measurement equipment. In this configuration, the common-mode resonance of the system is shown to elevate peak emissions due to reduced damping. Overall, this paper highlights an opportunity to improve emissions standards with respect to interface converters by standardizing output terminations, particularly in view of the increased high-frequency emissions produced by systems implemented with wide band-gap technology.
目前的传导排放标准在处理接口转换器方面提供了相当大的灵活性，而接口转换器对于微电网的设计和实施越来越重要。本文特别关注的是在传导发射合格性测试期间终止此类转换器输出端口的方法。本文从理论上论述了一种接口转换器，该转换器由一个基于碳化硅的单相逆变器组成，安装在一个定制的测试平台上，用于评估传导辐射。随附的分析表明，输出端接的选择在决定所产生的辐射方面起着重要作用，在相关的辐射指标中可观察到高达 40 dB 的差异。一组实证研究验证了这些预测。在不受合规性测量设备影响的部署系统中，输出终端选择的依赖性得到了进一步强调。在这种配置下，系统的共模共振会因阻尼减小而导致峰值发射升高。总之，本文强调了通过标准化输出终端来改进接口转换器排放标准的机会，特别是考虑到采用宽带隙技术的系统会产生更多的高频辐射。
{"title":"Influence of Output Terminations on Common-Mode Conducted Emissions Evaluation of Interface Converters","authors":"Christopher D. New;Andrew N. Lemmon;Aaron D. Brovont","doi":"10.1109/OJPEL.2024.3433605","DOIUrl":"10.1109/OJPEL.2024.3433605","url":null,"abstract":"Current conducted emissions standards provide considerable flexibility in the handling of interface converters, which are of increasing importance for the design and implementation of microgrids. Of particular interest herein is the approach selected for terminating the output ports of such converters during conducted emissions qualification testing. This article provides a theoretical treatment of an interface converter consisting of a SiC-based single-phase inverter in a custom-built testbed for evaluating conducted emissions. The accompanying analysis demonstrates that the selection of output terminations plays a significant role in determining the resulting emissions, with a difference of up to 40 dB observed in the relevant emissions metrics. These predictions are validated with a set of empirical studies. The dependence on output termination selection is emphasized further in deployed systems, which are not influenced by the presence of compliance measurement equipment. In this configuration, the common-mode resonance of the system is shown to elevate peak emissions due to reduced damping. Overall, this paper highlights an opportunity to improve emissions standards with respect to interface converters by standardizing output terminations, particularly in view of the increased high-frequency emissions produced by systems implemented with wide band-gap technology.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10609520","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-25DOI: 10.1109/OJPEL.2024.3433562
Qingxuan Ma;Qingyun Huang;Alex Q. Huang
Input-Series-Output-Parallel (ISOP) LLC converters have the capability to leverage lower voltage semiconductor devices, thereby enabling applications with higher voltage requirements. The primary advantages lie in enhanced efficiency and power density attributed to improved device performance. Given the utilization of multiple modular LLC converters, the potential impact of component parameter mismatch becomes a significant concern. Specifically, issues related to input voltage sharing (IVS) and device zero voltage switching (ZVS) are critical considerations. This paper develops a precise mathematical model during deadtime to determine ZVS boundaries, taking into account parameter mismatches. Within the developed boundaries, all LLC sub-modules are assured of ZVS operation. To assess IVS performance, a mathematical model is formulated using the first harmonic approximation (FHA) equivalent circuit. To validate the proposed modeling and analysis, a 3 kW 1 MHz GaN-based ISOP LLC is constructed, comprising four modular 750W-LLC units. Experimental results showcase successful ZVS operations and natural voltage balancing of the ISOP LLC converter across a broad range of parameter mismatches.
{"title":"Zero-Voltage Switching and Natural Voltage Balancing of a 3 kW 1 MHz Input-Series-Output-Parallel GaN LLC Converter","authors":"Qingxuan Ma;Qingyun Huang;Alex Q. Huang","doi":"10.1109/OJPEL.2024.3433562","DOIUrl":"10.1109/OJPEL.2024.3433562","url":null,"abstract":"Input-Series-Output-Parallel (ISOP) LLC converters have the capability to leverage lower voltage semiconductor devices, thereby enabling applications with higher voltage requirements. The primary advantages lie in enhanced efficiency and power density attributed to improved device performance. Given the utilization of multiple modular LLC converters, the potential impact of component parameter mismatch becomes a significant concern. Specifically, issues related to input voltage sharing (IVS) and device zero voltage switching (ZVS) are critical considerations. This paper develops a precise mathematical model during deadtime to determine ZVS boundaries, taking into account parameter mismatches. Within the developed boundaries, all LLC sub-modules are assured of ZVS operation. To assess IVS performance, a mathematical model is formulated using the first harmonic approximation (FHA) equivalent circuit. To validate the proposed modeling and analysis, a 3 kW 1 MHz GaN-based ISOP LLC is constructed, comprising four modular 750W-LLC units. Experimental results showcase successful ZVS operations and natural voltage balancing of the ISOP LLC converter across a broad range of parameter mismatches.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10609518","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-24DOI: 10.1109/OJPEL.2024.3432990
Giuseppe Schettino;Giuseppe Sorrentino;Gioacchino Scaglione;Claudio Nevoloso;Antonino Oscar Di Tommaso;Rosario Miceli
This paper proposes a general analytical formulation for LCL filter design for grid-connected PWM-driven cascaded H-bridge inverters. The novelty of this work deals with providing some easy-of-use analytical expressions that allow for properly sizing the filter inductances and capacitance values considering the number of voltage levels, the DC-link voltage, the adopted multicarrier pulse width modulation strategy, and the switching frequency. Although multilevel inverters performance strongly depends on the adopted modulation strategy and switching frequency, a general mathematical formulation that allows for properly sizing the LCL filter by considering such parameters simultaneously is currently missing. The proposed approach is generalized for the most adopted multicarrier pulse width modulation strategies. To validate the proposed approach, an extended investigation analysis is performed by hardware-in-the-loop real-time tests. According to international standards EN50160 and IEEE Std 1547–2018, the voltage total harmonic distortion and current total rated distortion are adopted to evaluate the LCL filter performance. Tests are carried out in several working conditions, defined in terms of provided apparent power and power factor values. Finally, the proposed analytical formulation is adopted to formulate an optimized LCL filter design algorithm that allows for matching the standard requirements without oversizing the filter parameters.
{"title":"A General Analytical Formulation for LCL Filter Design for Grid-Connected PWM-Driven Cascaded H-Bridge Inverters","authors":"Giuseppe Schettino;Giuseppe Sorrentino;Gioacchino Scaglione;Claudio Nevoloso;Antonino Oscar Di Tommaso;Rosario Miceli","doi":"10.1109/OJPEL.2024.3432990","DOIUrl":"10.1109/OJPEL.2024.3432990","url":null,"abstract":"This paper proposes a general analytical formulation for LCL filter design for grid-connected PWM-driven cascaded H-bridge inverters. The novelty of this work deals with providing some easy-of-use analytical expressions that allow for properly sizing the filter inductances and capacitance values considering the number of voltage levels, the DC-link voltage, the adopted multicarrier pulse width modulation strategy, and the switching frequency. Although multilevel inverters performance strongly depends on the adopted modulation strategy and switching frequency, a general mathematical formulation that allows for properly sizing the LCL filter by considering such parameters simultaneously is currently missing. The proposed approach is generalized for the most adopted multicarrier pulse width modulation strategies. To validate the proposed approach, an extended investigation analysis is performed by hardware-in-the-loop real-time tests. According to international standards EN50160 and IEEE Std 1547–2018, the voltage total harmonic distortion and current total rated distortion are adopted to evaluate the LCL filter performance. Tests are carried out in several working conditions, defined in terms of provided apparent power and power factor values. Finally, the proposed analytical formulation is adopted to formulate an optimized LCL filter design algorithm that allows for matching the standard requirements without oversizing the filter parameters.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10608387","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-23DOI: 10.1109/OJPEL.2024.3432628
Vahid Abbasi;Mohammad Mehdi Kashani;Milad Rezaie;Dylan Dah-Chuan Lu
Existing high step-up DC-DC converters suffer from various issues, including limited voltage gain, high voltage stress on semiconductors, and high current ripple. To solve these issues, a step-up converter with ultrahigh gain (40x at 50% duty cycle for a turn ratio of 2) composed of two boosting stages, a three-winding coupled inductor, a charge pump and a switched capacitor is presented. The other positive structural properties of the proposed converter are the low current ripple of its input source, the low voltage stress on its switches and most of the diodes, and the existence of a common ground between the input and output sides. The circuit configuration of the proposed converter requires a smaller series inductor due to its ability to achieve the same voltage gain as similar converters with a smaller duty cycle. Additionally, the proposed converter exhibits a low input current ripple, further distinguishing it from similar converters. The coupled inductor is placed in a way to effectively decreases voltage stress on the switches. The converter is compared with the other high step-up converters from different viewpoints demonstrating its superiorities including power density and cost-effectiveness. An experimental prototype, rated at 240 W with 20 V input voltage and 400 V output voltage, is reported to validate the theoretical analysis, performance quality, and dynamic response of the converter.
{"title":"Two-Switch Ultrahigh Step-Up DC–DC Converterer With Low Input Current Ripple and Low Switch Voltage Stress","authors":"Vahid Abbasi;Mohammad Mehdi Kashani;Milad Rezaie;Dylan Dah-Chuan Lu","doi":"10.1109/OJPEL.2024.3432628","DOIUrl":"10.1109/OJPEL.2024.3432628","url":null,"abstract":"Existing high step-up DC-DC converters suffer from various issues, including limited voltage gain, high voltage stress on semiconductors, and high current ripple. To solve these issues, a step-up converter with ultrahigh gain (40x at 50% duty cycle for a turn ratio of 2) composed of two boosting stages, a three-winding coupled inductor, a charge pump and a switched capacitor is presented. The other positive structural properties of the proposed converter are the low current ripple of its input source, the low voltage stress on its switches and most of the diodes, and the existence of a common ground between the input and output sides. The circuit configuration of the proposed converter requires a smaller series inductor due to its ability to achieve the same voltage gain as similar converters with a smaller duty cycle. Additionally, the proposed converter exhibits a low input current ripple, further distinguishing it from similar converters. The coupled inductor is placed in a way to effectively decreases voltage stress on the switches. The converter is compared with the other high step-up converters from different viewpoints demonstrating its superiorities including power density and cost-effectiveness. An experimental prototype, rated at 240 W with 20 V input voltage and 400 V output voltage, is reported to validate the theoretical analysis, performance quality, and dynamic response of the converter.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10607863","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141781772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-16DOI: 10.1109/OJPEL.2024.3429412
Mahdi Homaeinezhad;Omid Beik
This paper proposes a generalized space vector modulation (SVM) strategy for 3-level neutral-point-clamped (NPC) converters. The proposed strategy, here referred to as multiphase 3-level SVM (MP3L-SVM), is developed as a generic modulation technique applicable for 3-level NPC converters with any number of phases, while for showcasing in this paper the proposed MP3L-SVM is applied to a wind turbine with a direct drive multiphase permanent magnet generator (PMG) whose output is rectified using a 3-level NPC converter before connection to a high-voltage DC (HVDC) grid. A key challenge in 3-level NPC converters is maintaining a balanced voltage across the HVDC-link capacitors, particularly at low speeds. To address this issue, the paper integrates the proposed MP3L-SVM strategy with a voltage balancing algorithm (VBA), which mitigates capacitor voltage imbalances by choosing the three nearest switching states that result in minimal energy deviations across the capacitors. The paper discusses the mathematical modeling of a multiphase PMG interfaced to a 3-level NPC and derives generalized models that govern the proposed strategy based on a visual space vector diagram (SVD). Analytical models are validated through simulations across various 3-level NPC configurations, including 3-phase, 6-phase, and 9-phase NPC converters. Further, the analytical models and simulation results are validated by test results from a scaled-down laboratory prototype 3-level NPC converter that has been prototyped in-house.
{"title":"Development of a Generalized Multilevel SVM and Capacitor Voltage Balancing Strategy for Multiphase Three-Level NPC Converters","authors":"Mahdi Homaeinezhad;Omid Beik","doi":"10.1109/OJPEL.2024.3429412","DOIUrl":"10.1109/OJPEL.2024.3429412","url":null,"abstract":"This paper proposes a generalized space vector modulation (SVM) strategy for 3-level neutral-point-clamped (NPC) converters. The proposed strategy, here referred to as multiphase 3-level SVM (MP3L-SVM), is developed as a generic modulation technique applicable for 3-level NPC converters with any number of phases, while for showcasing in this paper the proposed MP3L-SVM is applied to a wind turbine with a direct drive multiphase permanent magnet generator (PMG) whose output is rectified using a 3-level NPC converter before connection to a high-voltage DC (HVDC) grid. A key challenge in 3-level NPC converters is maintaining a balanced voltage across the HVDC-link capacitors, particularly at low speeds. To address this issue, the paper integrates the proposed MP3L-SVM strategy with a voltage balancing algorithm (VBA), which mitigates capacitor voltage imbalances by choosing the three nearest switching states that result in minimal energy deviations across the capacitors. The paper discusses the mathematical modeling of a multiphase PMG interfaced to a 3-level NPC and derives generalized models that govern the proposed strategy based on a visual space vector diagram (SVD). Analytical models are validated through simulations across various 3-level NPC configurations, including 3-phase, 6-phase, and 9-phase NPC converters. Further, the analytical models and simulation results are validated by test results from a scaled-down laboratory prototype 3-level NPC converter that has been prototyped in-house.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10599858","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141719425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-09DOI: 10.1109/OJPEL.2024.3425605
Andres Revilla Aguilar;Stig Munk-Nielsen;Flemming Buus Bendixen;Ziwei Ouyang;Maeve Duffy;Hongbo Zhao
This article provides a comprehensive overview of the state of the art in the field of permanent magnet biased inductors, (PMBIs). The theoretical benefits of PMBIs, operating in DC applications, were identified decades ago, in the late 1950’s. Compared with a non-biased inductor, a 100% linear biased PMBI, can achieve the same inductance and saturation current, while requiring only half of the core's cross-sectional area or half the number of turns. In practicality, achieving 100% biasing without introducing additional losses, or detrimental conditions for the permanent magnet's lifetime, becomes an important challenge and the development and achievements of PMBIs have been evolving until present days. Therefore, this overview paper, first introduces the basic background knowledge required for the development of PMBIs, including an overview of the design benefits of biasing, the possible design strategies, additional benefits and possibilities of over-biasing, and a brief introduction to permanent magnets, PMs. The historical evolution of the different biasing techniques, and the employed core and PM topologies, are analyzed and evaluated. The different physical prototype implementations found in the literature, and their operating characteristics, achievements, and limitations, are compiled and evaluated. Finally, the present challenges of PMBI implementation, and the future perspectives towards optimized development are summarized.
{"title":"Permanent Magnet Biased Inductors–An Overview","authors":"Andres Revilla Aguilar;Stig Munk-Nielsen;Flemming Buus Bendixen;Ziwei Ouyang;Maeve Duffy;Hongbo Zhao","doi":"10.1109/OJPEL.2024.3425605","DOIUrl":"10.1109/OJPEL.2024.3425605","url":null,"abstract":"This article provides a comprehensive overview of the state of the art in the field of permanent magnet biased inductors, (PMBIs). The theoretical benefits of PMBIs, operating in DC applications, were identified decades ago, in the late 1950’s. Compared with a non-biased inductor, a 100% linear biased PMBI, can achieve the same inductance and saturation current, while requiring only half of the core's cross-sectional area or half the number of turns. In practicality, achieving 100% biasing without introducing additional losses, or detrimental conditions for the permanent magnet's lifetime, becomes an important challenge and the development and achievements of PMBIs have been evolving until present days. Therefore, this overview paper, first introduces the basic background knowledge required for the development of PMBIs, including an overview of the design benefits of biasing, the possible design strategies, additional benefits and possibilities of over-biasing, and a brief introduction to permanent magnets, PMs. The historical evolution of the different biasing techniques, and the employed core and PM topologies, are analyzed and evaluated. The different physical prototype implementations found in the literature, and their operating characteristics, achievements, and limitations, are compiled and evaluated. Finally, the present challenges of PMBI implementation, and the future perspectives towards optimized development are summarized.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10591423","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141573996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-02DOI: 10.1109/OJPEL.2024.3422021
Jiang Yuan;Jieming Ma;Zhongbei Tian;Ka Lok Man
The integration of Digital Twin (DT) technology into the photovoltaic (PV) sector represents a significant advancement in energy management, optimization, servicing, and maintenance. This comprehensive literature review aims to enhance understanding, categorization, and adoption of DT and data fusion technologies within the PV industry to guide future research endeavors. The review categorizes PV models into three types: digital models, digital shadows, and digital twins, based on their data connection and integration attributes. It recognizes data fusion as the critical enabling technology for the development of complex DT models and proposes a framework for integrating data fusion with DT systems. A detailed examination of prevalent PV modeling methodologies is conducted to delineate their advantages and limitations, serving as a valuable resource for industry practitioners. The paper concludes that digital models and digital shadows are effective for initial PV system forecast and monitoring, while fully integrated DT models offer significant advantages, including real-time analysis, predictive capabilities, and active system optimization. However, implementing and maintaining DT models require advanced data analytics, high computational costs, and robust system security, presenting important challenges to be addressed in future research endeavors.
{"title":"Digital Twin Integration With Data Fusion for Enhanced Photovoltaic System Management: A Systematic Literature Review","authors":"Jiang Yuan;Jieming Ma;Zhongbei Tian;Ka Lok Man","doi":"10.1109/OJPEL.2024.3422021","DOIUrl":"10.1109/OJPEL.2024.3422021","url":null,"abstract":"The integration of Digital Twin (DT) technology into the photovoltaic (PV) sector represents a significant advancement in energy management, optimization, servicing, and maintenance. This comprehensive literature review aims to enhance understanding, categorization, and adoption of DT and data fusion technologies within the PV industry to guide future research endeavors. The review categorizes PV models into three types: digital models, digital shadows, and digital twins, based on their data connection and integration attributes. It recognizes data fusion as the critical enabling technology for the development of complex DT models and proposes a framework for integrating data fusion with DT systems. A detailed examination of prevalent PV modeling methodologies is conducted to delineate their advantages and limitations, serving as a valuable resource for industry practitioners. The paper concludes that digital models and digital shadows are effective for initial PV system forecast and monitoring, while fully integrated DT models offer significant advantages, including real-time analysis, predictive capabilities, and active system optimization. However, implementing and maintaining DT models require advanced data analytics, high computational costs, and robust system security, presenting important challenges to be addressed in future research endeavors.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10582537","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141510969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-01DOI: 10.1109/OJPEL.2024.3420868
Behzad Soleymani;Omidreza Bagheri;Ehsan Adib;Suzan Eren
In this paper, a new synchronous rectified converter with ultra-low output current ripple and high voltage attenuation is proposed. The presented converter can achieve soft switching without requiring any additional active components, leading to high efficiency while maintaining the simplicity of conventional converters. Other main features of the proposed circuit are inherent shoot-through protection, reduced current stress of the semiconductors due to the coupled inductor, and low voltage stress across the low-side MOSFET. In addition, a pulse frequency modulation control scheme is used, which allows for an extended soft-switching range without imposing an excessive circulating current at light loads. The steady-state analysis and experimental results from a 120 W prototype are presented in this paper.
本文提出了一种具有超低输出电流纹波和高电压衰减的新型同步整流转换器。该转换器无需任何额外的有源元件即可实现软开关，从而在保持传统转换器简洁性的同时实现了高效率。所提电路的其他主要特点包括固有的击穿保护、耦合电感器导致的半导体电流应力减小以及低端 MOSFET 上的电压应力较低。此外，电路还采用了脉冲频率调制控制方案，从而扩大了软开关范围，在轻负载时不会产生过大的循环电流。本文介绍了 120 W 原型的稳态分析和实验结果。
{"title":"A ZVS High Step-Down Converter With Reduced Component Count and Low Ripple Output Current","authors":"Behzad Soleymani;Omidreza Bagheri;Ehsan Adib;Suzan Eren","doi":"10.1109/OJPEL.2024.3420868","DOIUrl":"10.1109/OJPEL.2024.3420868","url":null,"abstract":"In this paper, a new synchronous rectified converter with ultra-low output current ripple and high voltage attenuation is proposed. The presented converter can achieve soft switching without requiring any additional active components, leading to high efficiency while maintaining the simplicity of conventional converters. Other main features of the proposed circuit are inherent shoot-through protection, reduced current stress of the semiconductors due to the coupled inductor, and low voltage stress across the low-side MOSFET. In addition, a pulse frequency modulation control scheme is used, which allows for an extended soft-switching range without imposing an excessive circulating current at light loads. The steady-state analysis and experimental results from a 120 W prototype are presented in this paper.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10578338","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141510970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-21DOI: 10.1109/OJPEL.2024.3417825
Rami F. Yehia;Zhehui Guo;Hui Li;Fang Z. Peng
Staircase modulation is a switching technique ubiquitous in multilevel inverters utilizing large number of output voltage levels. With tens of levels, the output of a multilevel inverter employing staircase modulation approaches a sinusoid without requiring switching harmonics filters. Out of various multilevel inverter topologies, the modular multilevel converter (MMC) became prominent due to its modularity, scalability, and efficiency. However, balancing the submodule (SM) capacitor voltages poses a significant challenge in MMC operation. In this work, a staircase matrix modulation (SMM) strategy, which achieves sensor-less capacitor voltage balancing, is proposed for the switched – capacitor MMC (SCMMC), an MMC topology with a very small arm inductor. The proposed SMM utilizes a full rank, symmetric switching matrix, where specific switching patterns are assigned for each voltage level. The structure of the proposed matrix, its unique features, and the process of populating its entries for any converter voltage level are described. Theoretical analysis on the operation of the proposed SMM, simulations for an 11-level SCMMC, and experimental results on a single-phase, 2 kW, 425 V, 4-level SCMMC prototype are presented to illustrate the voltage balancing capability of the proposed SMM. The resulting switching frequency of the SCMMC under SMM is also analyzed.
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Quasi-Z source (qZS) multilevel inverters have become popular in sustainable energy systems, particularly in photovoltaic (PV) systems. This study proposes a qZS five-level nested neutral point clamped (5L-NNPC) inverter, benefiting from continuous input current, high voltage gain, and insignificant voltage stress across semiconductors. The proposed topology provides a common ground between the input sources and the inverter's DC link, thus entirely eliminating leakage current, making it a suitable candidate for PV applications. Moreover, model predictive control (MPC) is employed to regulate the voltages of flying capacitors and the output current of the 5L-NNPC inverter. The study also includes analyses of steady-state performance, circuit design, efficiency, and control considerations. Finally, experimental results are presented to validate the converter's performance.
准 Z 源（qZS）多电平逆变器已在可持续能源系统，尤其是光伏（PV）系统中流行起来。本研究提出了一种 qZS 五电平嵌套中性点箝位（5L-NNPC）逆变器，该逆变器具有连续输入电流、高电压增益和跨半导体电压应力小等优点。所提出的拓扑结构在输入源和逆变器的直流链路之间提供了公共接地，从而完全消除了漏电流，使其成为光伏应用的理想选择。此外，还采用了模型预测控制 (MPC) 来调节飞行电容器的电压和 5L-NNPC 逆变器的输出电流。研究还包括对稳态性能、电路设计、效率和控制考虑因素的分析。最后，实验结果验证了变流器的性能。
{"title":"A New Single-Phase High Step-Up Active-Switched Quasi Z-Source NNPC Inverter With Common Ground Feature","authors":"MILAD SHAMOUEI-MILAN;REZA ASGARNIA;MILAD GHAVIPANJEH MARANGALU;KOUROSH KHALAJ MONFARED;YOUSEF NEYSHABOURI;HANI VAHEDI","doi":"10.1109/OJPEL.2024.3417277","DOIUrl":"10.1109/OJPEL.2024.3417277","url":null,"abstract":"Quasi-Z source (qZS) multilevel inverters have become popular in sustainable energy systems, particularly in photovoltaic (PV) systems. This study proposes a qZS five-level nested neutral point clamped (5L-NNPC) inverter, benefiting from continuous input current, high voltage gain, and insignificant voltage stress across semiconductors. The proposed topology provides a common ground between the input sources and the inverter's DC link, thus entirely eliminating leakage current, making it a suitable candidate for PV applications. Moreover, model predictive control (MPC) is employed to regulate the voltages of flying capacitors and the output current of the 5L-NNPC inverter. The study also includes analyses of steady-state performance, circuit design, efficiency, and control considerations. Finally, experimental results are presented to validate the converter's performance.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0,"publicationDate":"2024-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10568300","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141510972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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