Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479483
S. Geetha, U. N. Dulhare, S.S. Sivatha Sindhu
The objective of this paper is to build a practical intrusion detection system for wireless sensor networks which analyze the characteristics of traffic patterns and identify the intrusive activities in the network. It is to show that the choice of efficient and fast decision tree paradigm for intrusion detection with optimal features enhance the detection capability as well as saves energy, computation and memory of sensor networks. In addition, various rule based decision tree classifiers like Alternating Decision Tree, Decision Stump, J48, Logical Model Tree, Naive Bayes Tree and Fast Decision Tree learner have been compared with a family of Hoeffding rule based decision tree which shows better and fast detection capability. The evaluation of the enhanced feature space and the decision tree paradigm, on three different public dataset containing normal and anomalous data have been performed for various Hoeffding as well as other decision tree algorithms. With this approach it is proved that Hoeffding tree are best suited for online detection and handling of streaming sensor data with the efficient usage of memory in a resource constraint environment like sensor networks
{"title":"Intrusion Detection using NBHoeffding Rule based Decision Tree for Wireless Sensor Networks","authors":"S. Geetha, U. N. Dulhare, S.S. Sivatha Sindhu","doi":"10.1109/ICAECC.2018.8479483","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479483","url":null,"abstract":"The objective of this paper is to build a practical intrusion detection system for wireless sensor networks which analyze the characteristics of traffic patterns and identify the intrusive activities in the network. It is to show that the choice of efficient and fast decision tree paradigm for intrusion detection with optimal features enhance the detection capability as well as saves energy, computation and memory of sensor networks. In addition, various rule based decision tree classifiers like Alternating Decision Tree, Decision Stump, J48, Logical Model Tree, Naive Bayes Tree and Fast Decision Tree learner have been compared with a family of Hoeffding rule based decision tree which shows better and fast detection capability. The evaluation of the enhanced feature space and the decision tree paradigm, on three different public dataset containing normal and anomalous data have been performed for various Hoeffding as well as other decision tree algorithms. With this approach it is proved that Hoeffding tree are best suited for online detection and handling of streaming sensor data with the efficient usage of memory in a resource constraint environment like sensor networks","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131085108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479431
S. Kesavan, Ganesh Kumar Kalambettu
With convergence of digital technology and smart devices, monitoring and tracking data in real time become true. Given the invention of many health vital sensors and activity tracking devices, dynamically measure and monitoring of vital health parameters become easy. The sensors and devices uses numerous protocols and communication methods for transmitting the data. In a conventional setup, it is difficult to connect multiple devices with different proprietary applications and monitor. Moreover, it is cumbersome to control multiple devices and store, analyses all the vitals parameter data. There is no common platform or frameworks available to connect the multiple health sensors and to monitor the vitals simultaneously. This paper proposes the comprehensive, scalable, plug and play smart health gateway for connecting variety of health sensors and allows the devices seamless communication for transmit and control. With IoT enabled, the framework seamlessly connects with cloud services and stream the data for storage, analysis and prediction. The proposed unified framework is not only an efficient building block for connecting many health sensors but also enable seamless connectivity between gateway and cloud platform and services.
{"title":"IOT enabled comprehensive, plug and play gateway framework for smart health","authors":"S. Kesavan, Ganesh Kumar Kalambettu","doi":"10.1109/ICAECC.2018.8479431","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479431","url":null,"abstract":"With convergence of digital technology and smart devices, monitoring and tracking data in real time become true. Given the invention of many health vital sensors and activity tracking devices, dynamically measure and monitoring of vital health parameters become easy. The sensors and devices uses numerous protocols and communication methods for transmitting the data. In a conventional setup, it is difficult to connect multiple devices with different proprietary applications and monitor. Moreover, it is cumbersome to control multiple devices and store, analyses all the vitals parameter data. There is no common platform or frameworks available to connect the multiple health sensors and to monitor the vitals simultaneously. This paper proposes the comprehensive, scalable, plug and play smart health gateway for connecting variety of health sensors and allows the devices seamless communication for transmit and control. With IoT enabled, the framework seamlessly connects with cloud services and stream the data for storage, analysis and prediction. The proposed unified framework is not only an efficient building block for connecting many health sensors but also enable seamless connectivity between gateway and cloud platform and services.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133233215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479505
Saba Fatima, V. M. Vishwanath
CPU-GPU accelerator based heterogeneous cloud computing systems can give enhanced energy efficiency and performance. Both energy efficiency and performance parameters are the vital factors in achieving High Performance Computing (HPC). To completely understand the strength of heterogeneous cloud computing architectures, software must efficiently use CPU-GPU processing and their power conserves capability. Dynamic Voltage and Frequency Scaling (DVFS) technique can be used to enable power conserving capabilities of CPU-GPU core architectures. Therefore, to distribute task load between host CPUs and GPU accelerators and reduce energy consumption, here, we have introduced a Heterogeneous Dynamic Scheduling Minimized Makespan (HDSMM) using CPU-GPU cores for heterogeneous cloud computing devices. Here, DVFS technique is distributed into CPU-DVFS and GPU-DVFS, for efficient resource utilization and to exploit power conserving features. Our proposed HDSMM model presents precise modeling for performance and energy efficiency distribution and finest frequency to achieve either best performance or lowest power consumption. Experimental results verify the superiority of our proposed HDSMM model in terms of energy consumption, average execution time and average power for scientific benchmark Montage.
{"title":"A Heterogeneous Dynamic Scheduling Minimized Make-span For Energy and Performance Balancing","authors":"Saba Fatima, V. M. Vishwanath","doi":"10.1109/ICAECC.2018.8479505","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479505","url":null,"abstract":"CPU-GPU accelerator based heterogeneous cloud computing systems can give enhanced energy efficiency and performance. Both energy efficiency and performance parameters are the vital factors in achieving High Performance Computing (HPC). To completely understand the strength of heterogeneous cloud computing architectures, software must efficiently use CPU-GPU processing and their power conserves capability. Dynamic Voltage and Frequency Scaling (DVFS) technique can be used to enable power conserving capabilities of CPU-GPU core architectures. Therefore, to distribute task load between host CPUs and GPU accelerators and reduce energy consumption, here, we have introduced a Heterogeneous Dynamic Scheduling Minimized Makespan (HDSMM) using CPU-GPU cores for heterogeneous cloud computing devices. Here, DVFS technique is distributed into CPU-DVFS and GPU-DVFS, for efficient resource utilization and to exploit power conserving features. Our proposed HDSMM model presents precise modeling for performance and energy efficiency distribution and finest frequency to achieve either best performance or lowest power consumption. Experimental results verify the superiority of our proposed HDSMM model in terms of energy consumption, average execution time and average power for scientific benchmark Montage.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123918355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479456
Top Bahadur Pun, T. B. Shahi
Stock Exchange price prediction is the task of estimating future price of certain stock listed in stock exchange by extracting the trend with the help of confidence learned from historical training data. In this research work, the data set has been created by extracting raw data from Nepal Stock Exchange (NEPSE) website. Data preprocessing is performed in order compute an accurate result. The data belonging to promoter share and unwanted feature are eliminated from considered data. The resulting data are normalized for better performance, before applying the machine learning methods. Min-Max and Z-score normalization are used for this purpose. Overall stock data are further divided into ten different sector of investment for sectorwise analysis. Support Vector Regression (SVR) and Artificial Neural Network (ANN) are applied in order to predict stock price for a next day. In order to measure the performance of two learning models, mean square error (MSE), mean absolute error (MAE), root mean square error (RMSE) and Coefficient of Determination (R2) are used. The result shows that SVR with min max normalization is performing better than ANN in all sectors except on Development bank, Finance, and Mutual Fund.
{"title":"Nepal Stock Exchange Prediction Using Support Vector Regression and Neural Networks","authors":"Top Bahadur Pun, T. B. Shahi","doi":"10.1109/ICAECC.2018.8479456","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479456","url":null,"abstract":"Stock Exchange price prediction is the task of estimating future price of certain stock listed in stock exchange by extracting the trend with the help of confidence learned from historical training data. In this research work, the data set has been created by extracting raw data from Nepal Stock Exchange (NEPSE) website. Data preprocessing is performed in order compute an accurate result. The data belonging to promoter share and unwanted feature are eliminated from considered data. The resulting data are normalized for better performance, before applying the machine learning methods. Min-Max and Z-score normalization are used for this purpose. Overall stock data are further divided into ten different sector of investment for sectorwise analysis. Support Vector Regression (SVR) and Artificial Neural Network (ANN) are applied in order to predict stock price for a next day. In order to measure the performance of two learning models, mean square error (MSE), mean absolute error (MAE), root mean square error (RMSE) and Coefficient of Determination (R2) are used. The result shows that SVR with min max normalization is performing better than ANN in all sectors except on Development bank, Finance, and Mutual Fund.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124563422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479495
Payal Nautiyal, Alok Naugarhiya, Shrish Verma
In this paper, a novel device utilizing hafnium and platinum as contact metals is proposed. Electron plasma is induced under source and drain region and hole plasma is created for body. The doping concentration of the proposed device is in decreasing order for N pillar and it is observed that the device show better properties. Simulation results of the reported and the proposed device has been analyzed and compared. It has been shown that the device offer increased drain current density without any degradation in breakdown voltage. The behavior of both the devices under breakdown regime is analyzed and it is shown that proposed device behave similar to the reported device.
{"title":"Charge Plasma Based VVD-SJ VDMOS Employing Reversed Doping Concentration","authors":"Payal Nautiyal, Alok Naugarhiya, Shrish Verma","doi":"10.1109/ICAECC.2018.8479495","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479495","url":null,"abstract":"In this paper, a novel device utilizing hafnium and platinum as contact metals is proposed. Electron plasma is induced under source and drain region and hole plasma is created for body. The doping concentration of the proposed device is in decreasing order for N pillar and it is observed that the device show better properties. Simulation results of the reported and the proposed device has been analyzed and compared. It has been shown that the device offer increased drain current density without any degradation in breakdown voltage. The behavior of both the devices under breakdown regime is analyzed and it is shown that proposed device behave similar to the reported device.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124586919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479526
KV Kiran Kumar, G. Srinivasa
Corneal endothelial cell segmentation and count is used to diagnose the cornea and validate the health of the eye. Loss of cells, due to damage of endothelial cells leads to dis-functioning of cornea and loss of vision. Unsupervised k-means algorithm, along with the watershed algorithm are used for segmentation of the individual cell areas and hence determine the cell count. Further, cornea related Polymegathism and Pleomorphism are calculated based on the individual cell areas and cell centroids. Algorithms provides a cell count accuracy of 96.87%, with Polymegathism and Pleomorphism.
{"title":"Comeal Endothelium cell segmentation and count using K-means and watershed algorithms","authors":"KV Kiran Kumar, G. Srinivasa","doi":"10.1109/ICAECC.2018.8479526","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479526","url":null,"abstract":"Corneal endothelial cell segmentation and count is used to diagnose the cornea and validate the health of the eye. Loss of cells, due to damage of endothelial cells leads to dis-functioning of cornea and loss of vision. Unsupervised k-means algorithm, along with the watershed algorithm are used for segmentation of the individual cell areas and hence determine the cell count. Further, cornea related Polymegathism and Pleomorphism are calculated based on the individual cell areas and cell centroids. Algorithms provides a cell count accuracy of 96.87%, with Polymegathism and Pleomorphism.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114355637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479487
Sadia Chowdhury, Farhan Rahman Wasee, M. S. Islam, Hasan U. Zaman
Handwriting recognition has been a very active field of research in the past few years in different sectors. Analyzing and deducing information from various handwritings can help to tackle many ongoing issues. Though extensive work has been done for English handwritings, any progress can hardly be seen in other languages like Bengali. Hence in this paper, a system has been proposed that takes a scanned image of Bengali handwritten text as its input and after processing it gives an editable version of that text. The system consists of many phases which mainly conducts image processing, machine learning by training the neural network and lastly identification of the Bengali characters. Several data and algorithms have been used to produce a thorough and accurate result.
{"title":"Bengali Handwriting Recognition and Conversion to Editable Text","authors":"Sadia Chowdhury, Farhan Rahman Wasee, M. S. Islam, Hasan U. Zaman","doi":"10.1109/ICAECC.2018.8479487","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479487","url":null,"abstract":"Handwriting recognition has been a very active field of research in the past few years in different sectors. Analyzing and deducing information from various handwritings can help to tackle many ongoing issues. Though extensive work has been done for English handwritings, any progress can hardly be seen in other languages like Bengali. Hence in this paper, a system has been proposed that takes a scanned image of Bengali handwritten text as its input and after processing it gives an editable version of that text. The system consists of many phases which mainly conducts image processing, machine learning by training the neural network and lastly identification of the Bengali characters. Several data and algorithms have been used to produce a thorough and accurate result.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"6 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116805778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479488
A. D. Devangavi, R. Gupta
In VANET environment multipath routing protocols enhance reliability and fault tolerance. However major drawback of the existing multipath protocols is that all the computed paths are not utilized for communication at any given time. Hence this work proposes Bezier Curve based Multipath Routing (BCMR) in VANET. The proposed work computes multiple paths from source to given destination using cubic Bezier curves and more notably engage all or more than one path during the actual communication. Proposed work performs better w.r.t. parameters like packet delivery ratio, transmission time and path discovery time.
{"title":"Bezier Curve based Multipath Routing in VANET","authors":"A. D. Devangavi, R. Gupta","doi":"10.1109/ICAECC.2018.8479488","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479488","url":null,"abstract":"In VANET environment multipath routing protocols enhance reliability and fault tolerance. However major drawback of the existing multipath protocols is that all the computed paths are not utilized for communication at any given time. Hence this work proposes Bezier Curve based Multipath Routing (BCMR) in VANET. The proposed work computes multiple paths from source to given destination using cubic Bezier curves and more notably engage all or more than one path during the actual communication. Proposed work performs better w.r.t. parameters like packet delivery ratio, transmission time and path discovery time.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116873324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479480
N. Rai, Pannaga Shree B S, Meghana Y P, A. Chavan, RAVISH ARADHYA H V
In this paper, two novel methods to design a high speed, low power 16-Tap 32-bit digital FIR filter for DSP application are proposed. The basic building blocks of the FIR filters are adders, multipliers and delay elements. In the proposed work, proposed filter-1 is designed using carry increment adder and 32-bit Vedic multiplier and proposed filter2 is designed using altered carry skip adder and 32-bit Vedic multiplier. FIR filter architectures with 16-TAP is developed using Verilog HDL and implemented using $45 eta mathrm {m}$ technology. The ASIC result shows the proposed-1 and proposed-2 16-TAP 32-bit filter has power dissipation of 7.36mW and 7.282mW with the delay of $6.79 eta mathrm {S}$ and $7.23 eta mathrm {S}$ respectively.
本文提出了两种设计高速、低功耗16分路32位数字FIR滤波器的新方法。FIR滤波器的基本组成部分是加法器、乘法器和延迟元件。在所提出的工作中，所提出的滤波器-1采用进位增量加法器和32位吠陀乘法器设计，所提出的滤波器- 2采用改进位跳加法器和32位吠陀乘法器设计。带有16-TAP的FIR滤波器架构使用Verilog HDL开发，并使用$45 eta mathm {m}$技术实现。ASIC结果表明，所提-1和所提-2 16-TAP 32位滤波器的功耗分别为7.36mW和7.282mW，延迟分别为$6.79 eta mathm {S}$和$7.23 eta mathm {S}$。
{"title":"Design and implementation of 16 tap FIR filter for DSP Applications","authors":"N. Rai, Pannaga Shree B S, Meghana Y P, A. Chavan, RAVISH ARADHYA H V","doi":"10.1109/ICAECC.2018.8479480","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479480","url":null,"abstract":"In this paper, two novel methods to design a high speed, low power 16-Tap 32-bit digital FIR filter for DSP application are proposed. The basic building blocks of the FIR filters are adders, multipliers and delay elements. In the proposed work, proposed filter-1 is designed using carry increment adder and 32-bit Vedic multiplier and proposed filter2 is designed using altered carry skip adder and 32-bit Vedic multiplier. FIR filter architectures with 16-TAP is developed using Verilog HDL and implemented using $45 eta mathrm {m}$ technology. The ASIC result shows the proposed-1 and proposed-2 16-TAP 32-bit filter has power dissipation of 7.36mW and 7.282mW with the delay of $6.79 eta mathrm {S}$ and $7.23 eta mathrm {S}$ respectively.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122373854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ICAECC.2018.8479461
Mahesh Vaidya, Alok Naugarhiya, Shrish Verma
Usage of two separate Positive and Negative voltage level shifter on the System-on-chip, increase the area and the complexity of the circuit. In the conventional circuit of both type of level shifter contention of crowbar current is present. That will affect the performance parameter like propagation delay due to slow switching and increase in power dissipation due to leakage current. To avoid the separate use of the circuit and effective performance of the circuit we have proposed the generic voltage level shifter design. This design will be able to produce both the output simultaneously. The propagation delay is observed 12.18ns and 12.82ns for positive and negative voltage shifter respectively. The Dynamic Power Dissipation has been observed 8.25 µW for 1.2V at 0.5MHz frequency. The simulation has been done in Cadence using 45nm gpdk.
{"title":"High Speed Bootstrapping Generic Voltage Level Shifter","authors":"Mahesh Vaidya, Alok Naugarhiya, Shrish Verma","doi":"10.1109/ICAECC.2018.8479461","DOIUrl":"https://doi.org/10.1109/ICAECC.2018.8479461","url":null,"abstract":"Usage of two separate Positive and Negative voltage level shifter on the System-on-chip, increase the area and the complexity of the circuit. In the conventional circuit of both type of level shifter contention of crowbar current is present. That will affect the performance parameter like propagation delay due to slow switching and increase in power dissipation due to leakage current. To avoid the separate use of the circuit and effective performance of the circuit we have proposed the generic voltage level shifter design. This design will be able to produce both the output simultaneously. The propagation delay is observed 12.18ns and 12.82ns for positive and negative voltage shifter respectively. The Dynamic Power Dissipation has been observed 8.25 µW for 1.2V at 0.5MHz frequency. The simulation has been done in Cadence using 45nm gpdk.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130574392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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