Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409055
G. Antonini, M. Lai, A. Orlandi, V. Ricchiuti
When high speed digital signals propagate on printed circuit boards (PCBs), all the on board discontinuities are a concern for the electronic designers. Among them, the via holes, allowing the signals to jump from an external PCB layer to an internal one, are of paramount importance. The paper compares the transmission performances of three different kind of single ended and differential vias (through, blind and buried), providing the better solution for propagating high speed digital signals on a multi-layer PCB.
{"title":"Characterization of via holes on printed circuit boards","authors":"G. Antonini, M. Lai, A. Orlandi, V. Ricchiuti","doi":"10.1109/SPI.2004.1409055","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409055","url":null,"abstract":"When high speed digital signals propagate on printed circuit boards (PCBs), all the on board discontinuities are a concern for the electronic designers. Among them, the via holes, allowing the signals to jump from an external PCB layer to an internal one, are of paramount importance. The paper compares the transmission performances of three different kind of single ended and differential vias (through, blind and buried), providing the better solution for propagating high speed digital signals on a multi-layer PCB.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131005481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1408999
B. Garben, A. Paech
Accurate predictions of power/ground-noise are essential for adequate chip and package design. This paper studies especially the influence of damping and leakage on the mid-frequency power noise caused by switching activity variations of logic circuits. The noise is determined by simulations and calculated by a closed form expression which is derived for a simplified 2D circuit representation of the chip and package power delivery network. Both approaches agree within 16%. The voltage dependency of the leakage resistance is found to be essential for the power noise when the noise is determined by the resonance between on-die capacitors and the next stage of decoupling capacitors. It is shown that damping and leakage reduce significantly the influence of the on-die decoupling capacitance and package capacitor inductance on the mid-frequency power noise.
{"title":"Influence of damping and voltage dependent leakage resistance on mid-frequency power noise","authors":"B. Garben, A. Paech","doi":"10.1109/SPI.2004.1408999","DOIUrl":"https://doi.org/10.1109/SPI.2004.1408999","url":null,"abstract":"Accurate predictions of power/ground-noise are essential for adequate chip and package design. This paper studies especially the influence of damping and leakage on the mid-frequency power noise caused by switching activity variations of logic circuits. The noise is determined by simulations and calculated by a closed form expression which is derived for a simplified 2D circuit representation of the chip and package power delivery network. Both approaches agree within 16%. The voltage dependency of the leakage resistance is found to be essential for the power noise when the noise is determined by the resonance between on-die capacitors and the next stage of decoupling capacitors. It is shown that damping and leakage reduce significantly the influence of the on-die decoupling capacitance and package capacitor inductance on the mid-frequency power noise.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134631424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409021
A. Boag, B. Livshitz
A novel approach for computing the capacitance matrices of arbitrary shaped three-dimensional geometries is presented. The proposed approach combines an iterative solution of the pertinent integral equations with the non-uniform grid (NG) algorithm for fast evaluation of potentials due to given source distributions. The NG approach is based on the observation that locally the potential produced by a finite size source can be interpolated from its samples at a small number of points of a non uniform spherical grid. This observation leads to a multilevel algorithm comprising interpolation and aggregation of potentials. The resulting hierarchical algorithm attains an O(N) asymptotic complexity.
{"title":"Non-uniform grid (NG) algorithm for fast capacitance extraction","authors":"A. Boag, B. Livshitz","doi":"10.1109/SPI.2004.1409021","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409021","url":null,"abstract":"A novel approach for computing the capacitance matrices of arbitrary shaped three-dimensional geometries is presented. The proposed approach combines an iterative solution of the pertinent integral equations with the non-uniform grid (NG) algorithm for fast evaluation of potentials due to given source distributions. The NG approach is based on the observation that locally the potential produced by a finite size source can be interpolated from its samples at a small number of points of a non uniform spherical grid. This observation leads to a multilevel algorithm comprising interpolation and aggregation of potentials. The resulting hierarchical algorithm attains an O(N) asymptotic complexity.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114517015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1408991
Zhaohui Zhu, Xing Wang, S. Dvorak, J. Prince
Full-wave simulators are required for accurate modeling of high-performance, 3D interconnects. However, current full-wave solvers are too inefficient to handle large interconnect problems. In this paper, a new efficient, integral-equation-based, full-wave layered interconnect simulator (UA-FWLIS) is developed by using analytical methods and incorporating physics-based expansion function. The accuracy of the simulator developed using this strategy is validated by comparing with commercial simulator tools.
{"title":"A new integral-equation-based, full-wave layered interconnect simulator","authors":"Zhaohui Zhu, Xing Wang, S. Dvorak, J. Prince","doi":"10.1109/SPI.2004.1408991","DOIUrl":"https://doi.org/10.1109/SPI.2004.1408991","url":null,"abstract":"Full-wave simulators are required for accurate modeling of high-performance, 3D interconnects. However, current full-wave solvers are too inefficient to handle large interconnect problems. In this paper, a new efficient, integral-equation-based, full-wave layered interconnect simulator (UA-FWLIS) is developed by using analytical methods and incorporating physics-based expansion function. The accuracy of the simulator developed using this strategy is validated by comparing with commercial simulator tools.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116495328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409048
K. Elbouazzati, F. Ponchei, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht
This paper deals with propagation delay, rise time and crosstalk for Cu wire of 100 nm width and 2.2 to 1.7 aspect ratio AR ( AR /spl sime/ h/w) in single and coupled configuration. Electrical and electromagnetical characteristics are predicted, with a full wave analysis, for various wire resistivity and low k dielectric material when a clock pulse of 143 ps period (7 GHz) propagate. Critical value of 300 /spl mu/m is calculated for wire length when propagation delay equals MOSFET switching delay. Such critical values also induced more than 20% crosstalk in two coupled lines with 100 nm spacing and low k=2.0.
本文研究了100 nm宽、2.2 ~ 1.7宽高比AR (AR /spl sime/ h/w)的铜线在单路和耦合配置下的传输延迟、上升时间和串扰。通过全波分析，预测了143ps周期(7ghz)时钟脉冲传播时各种导线电阻率和低k介电材料的电气和电磁特性。当传输延迟等于MOSFET开关延迟时，计算出导线长度的临界值为300 /spl mu/m。在低k=2.0的100nm间距耦合线中，该临界值也诱导了20%以上的串扰。
{"title":"Electrical performance of single and coupled Cu interconnects for the 70 nm technology","authors":"K. Elbouazzati, F. Ponchei, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht","doi":"10.1109/SPI.2004.1409048","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409048","url":null,"abstract":"This paper deals with propagation delay, rise time and crosstalk for Cu wire of 100 nm width and 2.2 to 1.7 aspect ratio AR ( AR /spl sime/ h/w) in single and coupled configuration. Electrical and electromagnetical characteristics are predicted, with a full wave analysis, for various wire resistivity and low k dielectric material when a clock pulse of 143 ps period (7 GHz) propagate. Critical value of 300 /spl mu/m is calculated for wire length when propagation delay equals MOSFET switching delay. Such critical values also induced more than 20% crosstalk in two coupled lines with 100 nm spacing and low k=2.0.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134574451","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1408990
A. Maffucci, G. Miano, F. Villone
An enhanced transmission line model has been recently proposed by the authors to perform the full-wave analysis of high-frequency interconnects. Such a model, while retaining the same simplicity of a transmission line model, describes accurately the case where the signal characteristic wavelength is comparable to the interconnect transverse dimension. The model has been obtained from an integral formulation of the propagation problem by using electromagnetic potentials with Lorenz gauge, with reference to a pair of cylindrical wires in homogeneous dielectric. Here the model is extended to interconnects with arbitrary cross-sections, embedded in a non-homogeneous dielectric. The main difference is in the reformulation of the problem by adding new unknowns (the polarization charges and displacement currents of the dielectrics), so that the potential may still be expressed through the Green function of the free space.
{"title":"An enhanced transmission line model for full-wave analysis of interconnects in non-homogeneous dielectrics","authors":"A. Maffucci, G. Miano, F. Villone","doi":"10.1109/SPI.2004.1408990","DOIUrl":"https://doi.org/10.1109/SPI.2004.1408990","url":null,"abstract":"An enhanced transmission line model has been recently proposed by the authors to perform the full-wave analysis of high-frequency interconnects. Such a model, while retaining the same simplicity of a transmission line model, describes accurately the case where the signal characteristic wavelength is comparable to the interconnect transverse dimension. The model has been obtained from an integral formulation of the propagation problem by using electromagnetic potentials with Lorenz gauge, with reference to a pair of cylindrical wires in homogeneous dielectric. Here the model is extended to interconnects with arbitrary cross-sections, embedded in a non-homogeneous dielectric. The main difference is in the reformulation of the problem by adding new unknowns (the polarization charges and displacement currents of the dielectrics), so that the potential may still be expressed through the Green function of the free space.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132223414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1408995
A. Huber, B. Kemmler, E. Klink
Power integrity, i.e. providing a stable voltage supply under the condition of rapidly changing current transients, gets increasing attention in the design of electronic packaging. Part of this discussion is the on-chip /spl Delta/I-noise. Various simulation methodologies, e.g. RAPiD, are known for simulation. Characteristic for these simulations is the very time consuming task of collecting and processing the complex input data, in order to optimise the required effort a sensitivity analysis for high-frequency on-chip /spl Delta/I-noise simulation has been carried out. This paper describes the results of this sensitivity analysis. A generic description of the on-chip /spl Delta/I-noise simulation methodology is shown. In particular the required input data is described. The sensitivity analysis quantifies the impact of each simulation parameter on the simulation results. The nominal value of each input parameter has been varied in a range from 0.5x to 2.0x compared to a nominal case. The maximum HF /spl Delta/I-noise is measured and plotted versus the respective input parameter deviation. The input parameters are categorized in high, medium and low impact parameters. This analysis results in guidelines which design parameters most efficiently reduce HF-noise and/or which input parameter need to be accurate in order to obtain accurate simulation results.
{"title":"Sensitivity analysis of generic on-chip /spl Delta/I-noise simulation methodology","authors":"A. Huber, B. Kemmler, E. Klink","doi":"10.1109/SPI.2004.1408995","DOIUrl":"https://doi.org/10.1109/SPI.2004.1408995","url":null,"abstract":"Power integrity, i.e. providing a stable voltage supply under the condition of rapidly changing current transients, gets increasing attention in the design of electronic packaging. Part of this discussion is the on-chip /spl Delta/I-noise. Various simulation methodologies, e.g. RAPiD, are known for simulation. Characteristic for these simulations is the very time consuming task of collecting and processing the complex input data, in order to optimise the required effort a sensitivity analysis for high-frequency on-chip /spl Delta/I-noise simulation has been carried out. This paper describes the results of this sensitivity analysis. A generic description of the on-chip /spl Delta/I-noise simulation methodology is shown. In particular the required input data is described. The sensitivity analysis quantifies the impact of each simulation parameter on the simulation results. The nominal value of each input parameter has been varied in a range from 0.5x to 2.0x compared to a nominal case. The maximum HF /spl Delta/I-noise is measured and plotted versus the respective input parameter deviation. The input parameters are categorized in high, medium and low impact parameters. This analysis results in guidelines which design parameters most efficiently reduce HF-noise and/or which input parameter need to be accurate in order to obtain accurate simulation results.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114194043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409018
B. Gustavsen
Frequency dependent transmission line models of the traveling wave type requires to approximate the propagation function by a rational function plus a time delay. It is shown that to simply use the time delay of lossless propagation can lead to significant loss of accuracy of the rational approximation. A procedure is shown which optimizes the time delay together with the poles and residues of the rational approximation. This is achieved by combining Brent's method with vector fitting.
{"title":"Time delay identification for transmission line modeling","authors":"B. Gustavsen","doi":"10.1109/SPI.2004.1409018","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409018","url":null,"abstract":"Frequency dependent transmission line models of the traveling wave type requires to approximate the propagation function by a rational function plus a time delay. It is shown that to simply use the time delay of lossless propagation can lead to significant loss of accuracy of the rational approximation. A procedure is shown which optimizes the time delay together with the poles and residues of the rational approximation. This is achieved by combining Brent's method with vector fitting.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122439505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409016
D. Deschrijver, T. Dhaene
A numerically robust sampling and rational fitting method is introduced, that models the entire state-space matrix of multiple-input-multiple-output (MIMO) linear time-invariant (LTI) systems. The algorithm adaptively builds an accurate rational pole-residue model, based on a minimal set of support samples. During the modeling process, no prior knowledge of the system's dynamics is required. The "survival-of-the-fittest" principle of a genetic algorithm (GA) provides a reliable way to detect convergence of the modeling process.
{"title":"Efficient GA-inspired macro-modeling of general LTI multi-port systems","authors":"D. Deschrijver, T. Dhaene","doi":"10.1109/SPI.2004.1409016","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409016","url":null,"abstract":"A numerically robust sampling and rational fitting method is introduced, that models the entire state-space matrix of multiple-input-multiple-output (MIMO) linear time-invariant (LTI) systems. The algorithm adaptively builds an accurate rational pole-residue model, based on a minimal set of support samples. During the modeling process, no prior knowledge of the system's dynamics is required. The \"survival-of-the-fittest\" principle of a genetic algorithm (GA) provides a reliable way to detect convergence of the modeling process.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124082924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-05-09DOI: 10.1109/SPI.2004.1409056
E. Miersch, M. Gospodinova, G. Nan, J. Thomas, J. Held
The electrical characteristics of interconnects (signal and power nets) of a given multi-chip package (MCP) had to be determined. MCP-nets are mostly multi drop (multi point) nets (MDNs) with in this case up to 18 terminals. The given clock frequency range is 200MHz to 500MHz. The outer dimensions of the MCP under test (MCP u.t.) are about 11 /spl times/ 12mm. The goal of the analysis was to find out an appropriate way of modelling for such a complex package including signal as well as power nets. It was also necessary to understand if the MCP multi-port nets can be described as lumped circuits in the given performance range of 200MHz to 500MHz as predicted by the /spl lambda//20 - and the t/sub s/ > 5t/sub f/ - rules for the about 1cm long partial branches of the MDNs.
{"title":"Electrical high speed chip-package characterization comparison of simulation results with component measurement","authors":"E. Miersch, M. Gospodinova, G. Nan, J. Thomas, J. Held","doi":"10.1109/SPI.2004.1409056","DOIUrl":"https://doi.org/10.1109/SPI.2004.1409056","url":null,"abstract":"The electrical characteristics of interconnects (signal and power nets) of a given multi-chip package (MCP) had to be determined. MCP-nets are mostly multi drop (multi point) nets (MDNs) with in this case up to 18 terminals. The given clock frequency range is 200MHz to 500MHz. The outer dimensions of the MCP under test (MCP u.t.) are about 11 /spl times/ 12mm. The goal of the analysis was to find out an appropriate way of modelling for such a complex package including signal as well as power nets. It was also necessary to understand if the MCP multi-port nets can be described as lumped circuits in the given performance range of 200MHz to 500MHz as predicted by the /spl lambda//20 - and the t/sub s/ > 5t/sub f/ - rules for the about 1cm long partial branches of the MDNs.","PeriodicalId":119776,"journal":{"name":"Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124217809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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