Pub Date : 2024-07-02DOI: 10.1109/TCSII.2024.3417673
{"title":"IEEE Transactions on Circuits and Systems--II: Express Briefs Publication Information","authors":"","doi":"10.1109/TCSII.2024.3417673","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3417673","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 7","pages":"C2-C2"},"PeriodicalIF":4.0,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10581879","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141494841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A novel tunable reflectionless phase shifter (TRPS) utilizing the wideband reflectionless structure and two phase compensation techniques is firstly proposed, which offers a wide operational bandwidth, low phase deviation, and absorbed reflections. The operational bandwidth of the reflectionless structure is extended by incorporating independently-controlled resonant poles and low/high cut-off frequencies in the capacitor-loaded coupled structure and inductive absorptive networks, respectively. Furthermore, two phase compensation techniques are employed, including an AC grounded coupled line adopted in the tunable loads for impedance compensation and the inductive absorptive network reused to introduce additional phase, both contributing to low phase deviation. Measurement results indicate that the proposed TRPS features a fractional bandwidth of 116%, a continuously-tunable phase with deviation less than ±6.5°, and a continuous reflection absorptivity from DC to 12 GHz.
{"title":"Compact Tunable Reflectionless Phase Shifter With Wide Bandwidth and Low Phase Deviation","authors":"Zilan Cao;Xiaojun Bi;Andy Shen;Chang Wu;Zhen Huang;Tao Guo;Qinfen Xu","doi":"10.1109/TCSII.2024.3422279","DOIUrl":"10.1109/TCSII.2024.3422279","url":null,"abstract":"A novel tunable reflectionless phase shifter (TRPS) utilizing the wideband reflectionless structure and two phase compensation techniques is firstly proposed, which offers a wide operational bandwidth, low phase deviation, and absorbed reflections. The operational bandwidth of the reflectionless structure is extended by incorporating independently-controlled resonant poles and low/high cut-off frequencies in the capacitor-loaded coupled structure and inductive absorptive networks, respectively. Furthermore, two phase compensation techniques are employed, including an AC grounded coupled line adopted in the tunable loads for impedance compensation and the inductive absorptive network reused to introduce additional phase, both contributing to low phase deviation. Measurement results indicate that the proposed TRPS features a fractional bandwidth of 116%, a continuously-tunable phase with deviation less than ±6.5°, and a continuous reflection absorptivity from DC to 12 GHz.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4864-4868"},"PeriodicalIF":4.0,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-02DOI: 10.1109/TCSII.2024.3417669
{"title":"IEEE Circuits and Systems Society Information","authors":"","doi":"10.1109/TCSII.2024.3417669","DOIUrl":"https://doi.org/10.1109/TCSII.2024.3417669","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 7","pages":"C3-C3"},"PeriodicalIF":4.0,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10581877","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141500284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A potentiostat-based wide dynamic range (DR) multi-sensor integrated interface is presented for heterogeneous chemical sensor applications. For versatility across various sensor kinds, a reconfigurable frontend structure based on the potentiostat is proposed to provide wide DR performance for multiple sensor types of electrochemical, chemo-resistive, and FET-based. Each operation mode for different sensor types is designed to support adaptive calibration capabilities on baseline, offset, and sensitivity. It is also designed to support selectable digital conversion methods for optimal conversion speed and resolution, depending on application requirements. In the electrochemical mode, bi-directional operation is implemented to support various detection methods including cyclic voltammetry and chronoamperometry. In the chemo-resistive mode, the DR performance is much extended especially in low-resistance range. Its read-out integrated circuit was fabricated in a 0.18- $mu $ m CMOS process. For system-level feasibility, a wireless sensor prototype with inhouse sensor devices was manufactured and experimentally verified, achieving measured DRs of 164.5 dB for current-type and 188 dB for resistive-type sensors.
本文介绍了一种基于恒电位仪的宽动态范围（DR）多传感器集成接口，适用于异质化学传感器应用。为了实现各种传感器的通用性，提出了一种基于恒电位仪的可重构前端结构，为电化学、化学电阻和基于场效应晶体管的多种传感器类型提供宽动态范围性能。针对不同传感器类型设计的每种操作模式都支持基线、偏移和灵敏度的自适应校准功能。根据应用要求，它还支持可选择的数字转换方法，以获得最佳转换速度和分辨率。在电化学模式下，可实现双向操作，以支持各种检测方法，包括循环伏安法和计时器法。在化学电阻模式下，DR 性能大大提高，尤其是在低电阻范围内。其读出集成电路采用 0.18 英寸 CMOS 工艺制造。为了实现系统级的可行性，利用内部传感器设备制造了一个无线传感器原型，并进行了实验验证，测得电流型传感器的 DR 值为 164.5 dB，电阻型传感器的 DR 值为 188 dB。
{"title":"A Potentiostat-Based Wide-DR Multi-Sensor Integrated Interface for Heterogeneous Chemical Sensor Applications","authors":"Junyeong Yeom;Hyunjoong Kim;Woojae Jeong;Wootaek Cho;Taejung Kim;Souvik Bag;Yonggi Kim;Yunsik Lee;Heungjoo Shin;Jae Joon Kim","doi":"10.1109/TCSII.2024.3421366","DOIUrl":"10.1109/TCSII.2024.3421366","url":null,"abstract":"A potentiostat-based wide dynamic range (DR) multi-sensor integrated interface is presented for heterogeneous chemical sensor applications. For versatility across various sensor kinds, a reconfigurable frontend structure based on the potentiostat is proposed to provide wide DR performance for multiple sensor types of electrochemical, chemo-resistive, and FET-based. Each operation mode for different sensor types is designed to support adaptive calibration capabilities on baseline, offset, and sensitivity. It is also designed to support selectable digital conversion methods for optimal conversion speed and resolution, depending on application requirements. In the electrochemical mode, bi-directional operation is implemented to support various detection methods including cyclic voltammetry and chronoamperometry. In the chemo-resistive mode, the DR performance is much extended especially in low-resistance range. Its read-out integrated circuit was fabricated in a 0.18-\u0000<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>\u0000m CMOS process. For system-level feasibility, a wireless sensor prototype with inhouse sensor devices was manufactured and experimentally verified, achieving measured DRs of 164.5 dB for current-type and 188 dB for resistive-type sensors.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4804-4808"},"PeriodicalIF":4.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This brief presents an effective way to design high-throughput and low-power True Random Number Generators (TRNGs) for Field Programmable Gate Array (FPGA)-based digital systems. The proposed design makes an unconventional usage of the Digital Signal Processing (DSP) slice embedded within the AMD-Xilinx FPGA devices to implement high jitter ring oscillators as entropy sources for efficient TRNG designs. Thanks to its wide bit-width output, several configurations can be enabled to group multiple oscillators within a single DSP slice. As a result, a TRNG designed through the proposed scheme outputs up to 4 random bits per clock cycle, thus leading to a considerably high-throughput, while exploiting an ultra-compact architecture. When implemented on the AMD-Xilinx Zynq XC7Z020 System on Chip (SoC), the new architecture achieves a throughput of $800times 10{^{{6}}}$ bit/sec and an energy consumption of only 22 pJ/bit. When compared to state-of-the-art competitors it achieves a throughput rate up to $2.6times $ higher and an energy consumption up to $8times $ lower. The new TRNG has been validated by means of the NIST SP 800-22, the NIST 800 90B and the AIS statistical tests.
{"title":"A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations","authors":"Fabio Frustaci;Fanny Spagnolo;Pasquale Corsonello;Stefania Perri","doi":"10.1109/TCSII.2024.3421323","DOIUrl":"10.1109/TCSII.2024.3421323","url":null,"abstract":"This brief presents an effective way to design high-throughput and low-power True Random Number Generators (TRNGs) for Field Programmable Gate Array (FPGA)-based digital systems. The proposed design makes an unconventional usage of the Digital Signal Processing (DSP) slice embedded within the AMD-Xilinx FPGA devices to implement high jitter ring oscillators as entropy sources for efficient TRNG designs. Thanks to its wide bit-width output, several configurations can be enabled to group multiple oscillators within a single DSP slice. As a result, a TRNG designed through the proposed scheme outputs up to 4 random bits per clock cycle, thus leading to a considerably high-throughput, while exploiting an ultra-compact architecture. When implemented on the AMD-Xilinx Zynq XC7Z020 System on Chip (SoC), the new architecture achieves a throughput of \u0000<inline-formula> <tex-math>$800times 10{^{{6}}}$ </tex-math></inline-formula>\u0000 bit/sec and an energy consumption of only 22 pJ/bit. When compared to state-of-the-art competitors it achieves a throughput rate up to \u0000<inline-formula> <tex-math>$2.6times $ </tex-math></inline-formula>\u0000 higher and an energy consumption up to \u0000<inline-formula> <tex-math>$8times $ </tex-math></inline-formula>\u0000 lower. The new TRNG has been validated by means of the NIST SP 800-22, the NIST 800 90B and the AIS statistical tests.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4964-4968"},"PeriodicalIF":4.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10578016","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141509317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-28DOI: 10.1109/TCSII.2024.3420783
Hanquan Zhang;Dong Xiao
Conventional control strategy for permanent magnet synchronous machine (PMSM) has the defect of low steady-state efficiency as a result of ignoring iron loss resistance and unreasonable current distribution. In this brief, a steady-state efficiency improvement method considering the current distribution coefficient and iron loss resistance is proposed. Firstly, iron loss resistance is incorporated into equivalent circuit and mathematical model of the PMSM in d-q rotating coordinate frame. Secondly, steady-state reference current components of the d-axis and q-axis are analytically calculated by current distribution coefficients, two computational models that can accurately predict iron loss resistance under the condition of known and unknown hysteresis and eddy current loss parameters are derived and proposed for the first time. Finally, experimental comparison with conventional methods such as $i_{mathrm { d}}{=}0$ and MTPA proves validity and superiority for our proposed method.
{"title":"Steady-State Efficiency Optimization Method for PMSM Considering Current Distribution and Iron Loss Resistance","authors":"Hanquan Zhang;Dong Xiao","doi":"10.1109/TCSII.2024.3420783","DOIUrl":"10.1109/TCSII.2024.3420783","url":null,"abstract":"Conventional control strategy for permanent magnet synchronous machine (PMSM) has the defect of low steady-state efficiency as a result of ignoring iron loss resistance and unreasonable current distribution. In this brief, a steady-state efficiency improvement method considering the current distribution coefficient and iron loss resistance is proposed. Firstly, iron loss resistance is incorporated into equivalent circuit and mathematical model of the PMSM in d-q rotating coordinate frame. Secondly, steady-state reference current components of the d-axis and q-axis are analytically calculated by current distribution coefficients, two computational models that can accurately predict iron loss resistance under the condition of known and unknown hysteresis and eddy current loss parameters are derived and proposed for the first time. Finally, experimental comparison with conventional methods such as \u0000<inline-formula> <tex-math>$i_{mathrm { d}}{=}0$ </tex-math></inline-formula>\u0000 and MTPA proves validity and superiority for our proposed method.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4924-4928"},"PeriodicalIF":4.0,"publicationDate":"2024-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141529910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-27DOI: 10.1109/tcsii.2024.3420095
Jianghua Lu, Shixiong Sun, Haojie Ke, Guorong Zhu
{"title":"Triple Phase Shift Modulation Scheme for Bidirectional Wireless Power Transfer Systems With Efficiency Maximization","authors":"Jianghua Lu, Shixiong Sun, Haojie Ke, Guorong Zhu","doi":"10.1109/tcsii.2024.3420095","DOIUrl":"https://doi.org/10.1109/tcsii.2024.3420095","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"8 1","pages":""},"PeriodicalIF":4.4,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-27DOI: 10.1109/tcsii.2024.3419907
Oliviero Massi, Riccardo Giampiccolo, Alberto Bernardini
{"title":"Nullor-Based Inversion of MIMO Circuital Systems","authors":"Oliviero Massi, Riccardo Giampiccolo, Alberto Bernardini","doi":"10.1109/tcsii.2024.3419907","DOIUrl":"https://doi.org/10.1109/tcsii.2024.3419907","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"66 1","pages":""},"PeriodicalIF":4.4,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-27DOI: 10.1109/TCSII.2024.3419792
Siyuan Yu;Matthew L. Johnston
This brief presents a $3{^{text {rd}}}$ -order continuous-time (CT) incremental ADC that uses a pseudo-differential current-controlled-oscillator quantizer (CCOQ). The approach combines the complementary aspects of CCO-based quantization and incremental ADC operation. The CCOQ, used as a frequency quantizer, improves the efficiency of high-order incremental operation as it provides multi-bit quantization, intrinsic dynamic element matching, and an additional order of residual accumulation. At the same time, the CCOQ conveniently does not require reset in the analog domain, thus simplifying oscillator design. A prototype IC was fabricated in 180nm CMOS process. Clocked at 3.2 MHz with a Nyquist sampling rate of 50 kHz, based on measurements it achieves 87.1 dB SNDR, 99.1 dB SFDR, and 89.7 dB DR and consumes 204 $mu $ W at 1.4V supply. This results in a competitive 168 dB SNDR-based Schreier FoM, and it demonstrates the potential for leveraging CCOQ benefits within an IADC topology.
{"title":"A 99.1-dB SFDR, 87.1-dB SNDR, 50-kS/s 3rd-Order Continuous-Time Incremental ADC With Current-Controlled-Oscillator Quantizer","authors":"Siyuan Yu;Matthew L. Johnston","doi":"10.1109/TCSII.2024.3419792","DOIUrl":"10.1109/TCSII.2024.3419792","url":null,"abstract":"This brief presents a \u0000<inline-formula> <tex-math>$3{^{text {rd}}}$ </tex-math></inline-formula>\u0000-order continuous-time (CT) incremental ADC that uses a pseudo-differential current-controlled-oscillator quantizer (CCOQ). The approach combines the complementary aspects of CCO-based quantization and incremental ADC operation. The CCOQ, used as a frequency quantizer, improves the efficiency of high-order incremental operation as it provides multi-bit quantization, intrinsic dynamic element matching, and an additional order of residual accumulation. At the same time, the CCOQ conveniently does not require reset in the analog domain, thus simplifying oscillator design. A prototype IC was fabricated in 180nm CMOS process. Clocked at 3.2 MHz with a Nyquist sampling rate of 50 kHz, based on measurements it achieves 87.1 dB SNDR, 99.1 dB SFDR, and 89.7 dB DR and consumes 204\u0000<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>\u0000 W at 1.4V supply. This results in a competitive 168 dB SNDR-based Schreier FoM, and it demonstrates the potential for leveraging CCOQ benefits within an IADC topology.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4799-4803"},"PeriodicalIF":4.0,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141531957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-26DOI: 10.1109/TCSII.2024.3419113
Zhiyong Wang;Huaguang Zhang
To ensure the stability and security of power systems under various potential threats, this brief deals with the load frequency control (LFC) problem while taking uncertainty, input delays, false data injection attacks (FDIAs) and sensor faults into consideration. For multiarea power systems involving electric vehicles (EVs), an uncertain multi-delay framework is first established, and a transformation technique is employed to generate an equivalent model capable of effectively handling multiple input delays. Then, an adaptive-memory event-triggered scheme (AMETS) is presented to reduce the transmission frequency of control signals and save network resources. Furthermore, the asymptotical stability in the mean-square sense is obtained, and simulation results illustrate the validity of our approach.
{"title":"Adaptive-Memory Event-Triggered Load Frequency Control for Multi-Input-Delay Power Systems Against FDI Attacks and Sensor Faults","authors":"Zhiyong Wang;Huaguang Zhang","doi":"10.1109/TCSII.2024.3419113","DOIUrl":"10.1109/TCSII.2024.3419113","url":null,"abstract":"To ensure the stability and security of power systems under various potential threats, this brief deals with the load frequency control (LFC) problem while taking uncertainty, input delays, false data injection attacks (FDIAs) and sensor faults into consideration. For multiarea power systems involving electric vehicles (EVs), an uncertain multi-delay framework is first established, and a transformation technique is employed to generate an equivalent model capable of effectively handling multiple input delays. Then, an adaptive-memory event-triggered scheme (AMETS) is presented to reduce the transmission frequency of control signals and save network resources. Furthermore, the asymptotical stability in the mean-square sense is obtained, and simulation results illustrate the validity of our approach.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4919-4923"},"PeriodicalIF":4.0,"publicationDate":"2024-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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