Pub Date : 2025-11-20DOI: 10.1109/LED.2025.3635232
D. G. Zeng;Y. Gao;R. F. Chen;Y. H. Sun;J. L. Gong;L. Zhao;W. L. Yang;E. L. Liu;S. S. Wang;H. A. Zhou;X. Y. Zhu;J. J. Sun;M. Wang;Z. H. Ji;W. M. He;F. T. Meng;Y. H. Wang;S. K. He
Tunneling magnetoresistance (TMR) is crucial for reliable reading of magnetic random access memory (MRAM). However, achieving high TMR remains a significant challenge for the emerging spin-orbit torque (SOT) MRAM architecture, particularly in the integration friendly and scalable top-pinned (TP) perpendicular magnetic tunnel junction (pMTJ) configuration. In this letter, we report significantly enhanced TMR of TP SOT-pMTJ devices through novel channel materials. Devices fabricated on 300 mm wafers achieve TMR ratios up to 168% (average 156%), results in a TMR/$sigma ~({mathbf {R}} _{text {P}}$ ) of 29 at room temperature (RT) and 24 at $85^{o}$ C. The superior read window not only ensures reliable read operations but also enables faster sensing speeds. In addition, write energies of 0.9 pJ, endurance of over $10^{{12}}$ cycles, and 10 years retention are achieved, making it promising for the ultra-fast last level cache (LLC) applications.
{"title":"High TMR Over 156% in Perpendicular SOT-MRAM Realized With Channel Engineering","authors":"D. G. Zeng;Y. Gao;R. F. Chen;Y. H. Sun;J. L. Gong;L. Zhao;W. L. Yang;E. L. Liu;S. S. Wang;H. A. Zhou;X. Y. Zhu;J. J. Sun;M. Wang;Z. H. Ji;W. M. He;F. T. Meng;Y. H. Wang;S. K. He","doi":"10.1109/LED.2025.3635232","DOIUrl":"https://doi.org/10.1109/LED.2025.3635232","url":null,"abstract":"Tunneling magnetoresistance (TMR) is crucial for reliable reading of magnetic random access memory (MRAM). However, achieving high TMR remains a significant challenge for the emerging spin-orbit torque (SOT) MRAM architecture, particularly in the integration friendly and scalable top-pinned (TP) perpendicular magnetic tunnel junction (pMTJ) configuration. In this letter, we report significantly enhanced TMR of TP SOT-pMTJ devices through novel channel materials. Devices fabricated on 300 mm wafers achieve TMR ratios up to 168% (average 156%), results in a TMR/<inline-formula> <tex-math>$sigma ~({mathbf {R}} _{text {P}}$ </tex-math></inline-formula>) of 29 at room temperature (RT) and 24 at <inline-formula> <tex-math>$85^{o}$ </tex-math></inline-formula> C. The superior read window not only ensures reliable read operations but also enables faster sensing speeds. In addition, write energies of 0.9 pJ, endurance of over <inline-formula> <tex-math>$10^{{12}}$ </tex-math></inline-formula> cycles, and 10 years retention are achieved, making it promising for the ultra-fast last level cache (LLC) applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 2","pages":"411-414"},"PeriodicalIF":4.5,"publicationDate":"2025-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Most $text {Hf}text {O}_{{2}}-text {Zr}text {O}_{{2}}$ (HZH) superlattice stacks exhibit a mixed-phase character stabilizing tetragonal (t, nonpolar, antiferroelectric) and orthorhombic (o, polar, ferroelectric) phases. The nonpolar phases are typically viewed as detrimental for memory and logic applications since it does not support switchable ferroelectric (FE) polarization. In this study, we show that although the t-phase leads to a reduction in the on-current $text {(}text {I}_{text {ON}}text {)}$ , it can result in a higher transconductance $text {(}text {g}_{text {m}}text {)}$ compared to pure o-phase Negative Capacitance FETs (NCFETs). This $text {g}_{text {m}}$ enhancement is not due to increased carrier mobility but rather stems from the complex interplay of channel electrostatics influenced by the coexistence of t- and o-phase FE. We further investigate the impact of t-phase fraction and its spatial distribution along the channel, revealing their critical role in device behavior.
{"title":"Anomalous Transconductance Behavior in Mixed-Phase Negative Capacitance FETs","authors":"Yogendra Machhiwar;Danish Raja;Girish Pahwa;Pragya Kushwaha;Harshit Agarwal","doi":"10.1109/LED.2025.3634342","DOIUrl":"https://doi.org/10.1109/LED.2025.3634342","url":null,"abstract":"Most <inline-formula> <tex-math>$text {Hf}text {O}_{{2}}-text {Zr}text {O}_{{2}}$ </tex-math></inline-formula> (HZH) superlattice stacks exhibit a mixed-phase character stabilizing tetragonal (t, nonpolar, antiferroelectric) and orthorhombic (o, polar, ferroelectric) phases. The nonpolar phases are typically viewed as detrimental for memory and logic applications since it does not support switchable ferroelectric (FE) polarization. In this study, we show that although the t-phase leads to a reduction in the on-current <inline-formula> <tex-math>$text {(}text {I}_{text {ON}}text {)}$ </tex-math></inline-formula>, it can result in a higher transconductance <inline-formula> <tex-math>$text {(}text {g}_{text {m}}text {)}$ </tex-math></inline-formula> compared to pure o-phase Negative Capacitance FETs (NCFETs). This <inline-formula> <tex-math>$text {g}_{text {m}}$ </tex-math></inline-formula> enhancement is not due to increased carrier mobility but rather stems from the complex interplay of channel electrostatics influenced by the coexistence of t- and o-phase FE. We further investigate the impact of t-phase fraction and its spatial distribution along the channel, revealing their critical role in device behavior.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 1","pages":"184-187"},"PeriodicalIF":4.5,"publicationDate":"2025-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145852466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
For the first time, this letter proposes a unipolar Schmitt trigger with two transistors structure composed of an antiferroelectric thin film transistor (AFeTFT) and a feedback thin film transistor (TFT), greatly saving hardware overhead. Due to the antiferroelectricity and positive feedback in circuit, it features unipolar threshold characteristics, achieving a lower threshold voltage of 0.4 V and an upper threshold voltage of 1.5 V, which is crucial for chips powered by single-supply voltage. The experiments demonstrate that reducing the area ratio between the channel and capacitor in the AFeTFT facilitates a positive shift in the lower threshold of Schmitt trigger. Additionally, simulations indicate that as the threshold of the AFeTFT increases, the threshold window of the trigger shifts positively. Tunable threshold window enables the Schmitt trigger to meet diverse performance requirements in complex circuits.
{"title":"Unipolar Schmitt Trigger Based on Antiferroelectric Thin Film Transistor","authors":"Xiaopeng Luo;Peng Yang;Yefan Zhang;Shihao Yu;Yang Liu;Wei Wu;Zihao Hou;Sen Liu;Nan Li;Bing Song;Qingjiang Li","doi":"10.1109/LED.2025.3633294","DOIUrl":"https://doi.org/10.1109/LED.2025.3633294","url":null,"abstract":"For the first time, this letter proposes a unipolar Schmitt trigger with two transistors structure composed of an antiferroelectric thin film transistor (AFeTFT) and a feedback thin film transistor (TFT), greatly saving hardware overhead. Due to the antiferroelectricity and positive feedback in circuit, it features unipolar threshold characteristics, achieving a lower threshold voltage of 0.4 V and an upper threshold voltage of 1.5 V, which is crucial for chips powered by single-supply voltage. The experiments demonstrate that reducing the area ratio between the channel and capacitor in the AFeTFT facilitates a positive shift in the lower threshold of Schmitt trigger. Additionally, simulations indicate that as the threshold of the AFeTFT increases, the threshold window of the trigger shifts positively. Tunable threshold window enables the Schmitt trigger to meet diverse performance requirements in complex circuits.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 1","pages":"180-183"},"PeriodicalIF":4.5,"publicationDate":"2025-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145852525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-03DOI: 10.1109/LED.2025.3628488
Han-Fei Wang;Xue-Qing Tian;Hong-Zhi Jia;Jian-Ren Xu;Li Wei;Bo Dai;Da-Wei Zhang;Ning Wang
This letter proposes a short-distance thermally driven spiral Y-type thermoelectric generator (TEG) based on the Low-Temperature Co-Fired Ceramic (LTCC) technology. The proposed device adopts the staggered distribution of the cold and heat sources and the spiral layout of thermocouple (TC) arrays, thereby realizing the synchronous conduction of longitudinal heat flow and transverse current. The spiral thermocouple array is constructed by the multi-stage arc-shaped P-type and N-type thermocouple units, which can effectively increase the path length in the direction of temperature gradient. The experimental results show that the maximum power factor of the proposed structure is $0.034mu $ W/cm${}^{{2}}cdot $ K2, which is improved by 2.6 orders of magnitude compared with the bilayer non-contact structure. The work in this letter can give a reference for the design of new energy harvesting devices.
{"title":"Y-Type Transverse Thermoelectric Generator With Spiral Structure Based on LTCC Technology","authors":"Han-Fei Wang;Xue-Qing Tian;Hong-Zhi Jia;Jian-Ren Xu;Li Wei;Bo Dai;Da-Wei Zhang;Ning Wang","doi":"10.1109/LED.2025.3628488","DOIUrl":"https://doi.org/10.1109/LED.2025.3628488","url":null,"abstract":"This letter proposes a short-distance thermally driven spiral Y-type thermoelectric generator (TEG) based on the Low-Temperature Co-Fired Ceramic (LTCC) technology. The proposed device adopts the staggered distribution of the cold and heat sources and the spiral layout of thermocouple (TC) arrays, thereby realizing the synchronous conduction of longitudinal heat flow and transverse current. The spiral thermocouple array is constructed by the multi-stage arc-shaped P-type and N-type thermocouple units, which can effectively increase the path length in the direction of temperature gradient. The experimental results show that the maximum power factor of the proposed structure is <inline-formula> <tex-math>$0.034mu $ </tex-math></inline-formula>W/cm<inline-formula> <tex-math>${}^{{2}}cdot $ </tex-math></inline-formula>K<sup>2</sup>, which is improved by 2.6 orders of magnitude compared with the bilayer non-contact structure. The work in this letter can give a reference for the design of new energy harvesting devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 1","pages":"192-195"},"PeriodicalIF":4.5,"publicationDate":"2025-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145852550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We present a ferroelectric NAND (FENAND) design that steepens the incremental step pulse programming (ISPP) slope and enhances reliability via a laminated FE stack. The laminate incorporates a 3Å Al2O3 interlayer at the mid-plane of a 15 nm HfZrO2 film. This structural modification reshapes the polarization-voltage loop, yielding a 25 % increase in coercive voltage (VC) and a 19 % reduction in remnant polarization (Pr). Consequently, the ISPP slope improved by 16 %. The improvement stems from two effects: 1) Before switching, higher VC delays FE reversal, allowing more program voltage (VPGM) to drop across the gate insulator (G.IL), strengthening the field and boosting gate-side injection. 2) After switching, reduced Pr lowers the compensation charge at the channel interface, suppressing channel-side injection. Lowering charge injection through channel insulator (Ch.IL) during write, without sacrificing memory window (MW), mitigates dielectric stress, achieving 10-year retention and endurance up to $10{^{{6}}}$ cycles. This FE stack design provides practical guidelines for scaling VPGM and spacer dimensions in high-density 3D FENAND.
{"title":"Laminated Ferroelectric Stack for Enhanced ISPP Slope and Endurance in FE-NAND","authors":"Hyun Jae Lee;Minji Sohn;Sijung Yoo;Yunseong Lee;Kihong Kim;Seung-Geol Nam;Yoonsang Park;Sanghyun Jo;Donghoon Kim;Jinseong Heo;Wanki Kim;Daewon Ha;Asif Khan;Shimeng Yu;Duk-Hyun Choe;Suman Datta","doi":"10.1109/LED.2025.3628206","DOIUrl":"https://doi.org/10.1109/LED.2025.3628206","url":null,"abstract":"We present a ferroelectric NAND (FENAND) design that steepens the incremental step pulse programming (ISPP) slope and enhances reliability via a laminated FE stack. The laminate incorporates a 3Å <bold>Al<sub>2</sub>O<sub>3</sub></b> interlayer at the mid-plane of a 15 nm <bold>HfZrO<sub>2</sub></b> film. This structural modification reshapes the polarization-voltage loop, yielding a 25 % increase in coercive voltage (<italic>V<sub>C</sub></i>) and a 19 % reduction in remnant polarization (<italic>P<sub>r</sub></i>). Consequently, the ISPP slope improved by 16 %. The improvement stems from two effects: 1) Before switching, higher <italic>V<sub>C</sub></i> delays FE reversal, allowing more program voltage (<italic>V<sub>PGM</sub></i>) to drop across the gate insulator (G.IL), strengthening the field and boosting gate-side injection. 2) After switching, reduced <italic>P<sub>r</sub></i> lowers the compensation charge at the channel interface, suppressing channel-side injection. Lowering charge injection through channel insulator (Ch.IL) during write, without sacrificing memory window (MW), mitigates dielectric stress, achieving 10-year retention and endurance up to <inline-formula> <tex-math>$10{^{{6}}}$ </tex-math></inline-formula> cycles. This FE stack design provides practical guidelines for scaling <italic>V<sub>PGM</sub></i> and spacer dimensions in high-density 3D FENAND.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 1","pages":"188-191"},"PeriodicalIF":4.5,"publicationDate":"2025-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145852531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-28DOI: 10.1109/LED.2025.3615867
{"title":"Call for Papers for a Special Issue of IEEE Transactions on Electron Devices: Ultrawide Band Gap Semiconductor Devices for RF, Power and Optoelectronic Applications","authors":"","doi":"10.1109/LED.2025.3615867","DOIUrl":"https://doi.org/10.1109/LED.2025.3615867","url":null,"abstract":"","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 11","pages":"2218-2219"},"PeriodicalIF":4.5,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11219681","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145405369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-28DOI: 10.1109/LED.2025.3615869
{"title":"IEEE Transactions on Electron Devices Table of Contents","authors":"","doi":"10.1109/LED.2025.3615869","DOIUrl":"https://doi.org/10.1109/LED.2025.3615869","url":null,"abstract":"","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 11","pages":"2220-C3"},"PeriodicalIF":4.5,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11219680","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145374726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Heterogeneous integration has attracted significant research attention as a pathway toward high-performance, multifunctional systems, especially under rising on-chip power densities. Here, we introduce a sacrificial-layer-free layer-transfer integration process for aluminum nitride (AlN) film bulk acoustic resonators (FBARs), enabling their use in high-temperature heterogeneous systems. Pre-fabricated AlN FBAR chip is bonded onto a coefficient of thermal expansion (CTE)-matched host substrate using Au–Au flip-chip bonding. Unlike prior approaches, no sacrificial layer or pre-etched substrate is required: the bonding process itself defines an embedded air cavity beneath the resonant stack, simplifying fabrication and enhancing integration flexibility. The integrated resonators exhibit a high quality factor (Q) of 934 at 3.25 GHz and stable resonance characteristics following cumulative annealing at $800~^{circ }$ C for 30 mins, with minimal performance degradation. This approach circumvents conventional fabrication constraints and advances monolithic integration of high-figure-of-merit radio frequency (RF) filters and resonators for harsh-environment applications.
{"title":"AlN FBARs via Thin-Film Transfer for Heterogeneous Integration","authors":"Mingyo Park;Tanya Chauhan;Seyyed Mojtaba Hassani Gangaraj;Azadeh Ansari","doi":"10.1109/LED.2025.3626464","DOIUrl":"https://doi.org/10.1109/LED.2025.3626464","url":null,"abstract":"Heterogeneous integration has attracted significant research attention as a pathway toward high-performance, multifunctional systems, especially under rising on-chip power densities. Here, we introduce a sacrificial-layer-free layer-transfer integration process for aluminum nitride (AlN) film bulk acoustic resonators (FBARs), enabling their use in high-temperature heterogeneous systems. Pre-fabricated AlN FBAR chip is bonded onto a coefficient of thermal expansion (CTE)-matched host substrate using Au–Au flip-chip bonding. Unlike prior approaches, no sacrificial layer or pre-etched substrate is required: the bonding process itself defines an embedded air cavity beneath the resonant stack, simplifying fabrication and enhancing integration flexibility. The integrated resonators exhibit a high quality factor (Q) of 934 at 3.25 GHz and stable resonance characteristics following cumulative annealing at <inline-formula> <tex-math>$800~^{circ }$ </tex-math></inline-formula>C for 30 mins, with minimal performance degradation. This approach circumvents conventional fabrication constraints and advances monolithic integration of high-figure-of-merit radio frequency (RF) filters and resonators for harsh-environment applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 1","pages":"176-179"},"PeriodicalIF":4.5,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145929592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-20DOI: 10.1109/LED.2025.3623121
Renzhen Xiao;Kun Chen;Renjie Cheng;Jie Wang;Zhimin Song;Junqing Wang;Shaohui Han
A key limitation of magnetically insulated transmission line oscillators (MILOs) is their relatively low efficiency, typically less than 20%. To address this issue, we propose an X-band planar MILO operating under a modest external magnetic field. Particle-in-cell simulations demonstrate that at a diode voltage of 727 kV, a diode current of 7.2 kA, and an applied magnetic field of 0.25 T, the device achieves an output microwave power of 2.2 GW at a frequency of 8.96 GHz. This corresponds to a beam-wave conversion efficiency of 42%. The required external magnetic field can be supplied by a permanent magnet weighing only 29 kg. Compared to existing high-power microwave sources, the proposed device exhibits notable advantages in terms of efficiency, output power, and compactness, thus providing a very promising foundation for future practical applications.
{"title":"Simulation of High Efficiency X-Band Planar Magnetically Insulated Transmission Line Oscillator With a Weak External Magnetic Field","authors":"Renzhen Xiao;Kun Chen;Renjie Cheng;Jie Wang;Zhimin Song;Junqing Wang;Shaohui Han","doi":"10.1109/LED.2025.3623121","DOIUrl":"https://doi.org/10.1109/LED.2025.3623121","url":null,"abstract":"A key limitation of magnetically insulated transmission line oscillators (MILOs) is their relatively low efficiency, typically less than 20%. To address this issue, we propose an X-band planar MILO operating under a modest external magnetic field. Particle-in-cell simulations demonstrate that at a diode voltage of 727 kV, a diode current of 7.2 kA, and an applied magnetic field of 0.25 T, the device achieves an output microwave power of 2.2 GW at a frequency of 8.96 GHz. This corresponds to a beam-wave conversion efficiency of 42%. The required external magnetic field can be supplied by a permanent magnet weighing only 29 kg. Compared to existing high-power microwave sources, the proposed device exhibits notable advantages in terms of efficiency, output power, and compactness, thus providing a very promising foundation for future practical applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 12","pages":"2325-2328"},"PeriodicalIF":4.5,"publicationDate":"2025-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145665822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-20DOI: 10.1109/LED.2025.3616983
Omar Barrera;Sinwoo Cho;Jack Kramer;Vakhtang Chulukhadze;Tzu-Hsuan Hsu;Ruochen Lu
Acoustic filters are preferred front-end solutions at sub-6 GHz due to their superior frequency selectivity compared to electromagnetic (EM) counterparts. With the ongoing development of 5G and the evolution toward 6G, there is a growing need to extend acoustic filter technologies into frequency range 3 (FR3), which spans 7 to 24 GHz to accommodate emerging high-frequency bands. However, scaling acoustic filters beyond 10 GHz presents significant challenges, as conventional platforms suffer from increased insertion loss (IL) and degraded out-of-band (OoB) rejection at higher frequencies. Recent innovations have led to the emergence of periodically poled piezoelectric lithium niobate (P3F LN) laterally excited bulk acoustic resonators (XBARs), offering low-loss and high electromechanical coupling performance above 10 GHz. This work presents the first tri-layer P3F LN filter operating at 19.3 GHz, achieving a low IL of 2.2 dB, a 3-dB fractional bandwidth (FBW) of 8.5%, and an impressive 49 dB close-in rejection. These results demonstrate strong potential for integration into FR3 diplexers.
{"title":"19.3 GHz Acoustic Filter With High Close-In Rejection in Tri-Layer Thin-Film Lithium Niobate","authors":"Omar Barrera;Sinwoo Cho;Jack Kramer;Vakhtang Chulukhadze;Tzu-Hsuan Hsu;Ruochen Lu","doi":"10.1109/LED.2025.3616983","DOIUrl":"https://doi.org/10.1109/LED.2025.3616983","url":null,"abstract":"Acoustic filters are preferred front-end solutions at sub-6 GHz due to their superior frequency selectivity compared to electromagnetic (EM) counterparts. With the ongoing development of 5G and the evolution toward 6G, there is a growing need to extend acoustic filter technologies into frequency range 3 (FR3), which spans 7 to 24 GHz to accommodate emerging high-frequency bands. However, scaling acoustic filters beyond 10 GHz presents significant challenges, as conventional platforms suffer from increased insertion loss (IL) and degraded out-of-band (OoB) rejection at higher frequencies. Recent innovations have led to the emergence of periodically poled piezoelectric lithium niobate (P3F LN) laterally excited bulk acoustic resonators (XBARs), offering low-loss and high electromechanical coupling performance above 10 GHz. This work presents the first tri-layer P3F LN filter operating at 19.3 GHz, achieving a low IL of 2.2 dB, a 3-dB fractional bandwidth (FBW) of 8.5%, and an impressive 49 dB close-in rejection. These results demonstrate strong potential for integration into FR3 diplexers.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 12","pages":"2353-2356"},"PeriodicalIF":4.5,"publicationDate":"2025-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145665733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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