Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131473
R. Zhang, Q. Yang, Q. Li, Y. Zhang, V. Padilla, T. Pastore, W. Meier, S. Pidaparthi, C. Drowley
This work reports the first switching performance characterization of a 650 V NexGen's Vertical GaNTM fin-channel junction field effect transistor (Fin-JFET) fabricated on 4-inch GaN-on-GaN wafer. Compared to similarly-rated GaN HEMT and SiC MOSFET, the GaN Fin-JFET has smaller specific on-resistance, die size, and output capacitance ($C_{text{oss}}$). To exploit these merits in switching applications, an RC interface gate driver was selected with the driving strategy optimized by switching transient analysis. In the GaN Fin-JFET, the gate-to-drain capacitance ($C_{text{GD}}$) dominates $C_{text{oss}}$. Accordingly, the positive gate driver input voltage ($V_{G}^{+}$) was found to be critical to enable a fast gate charging for the Fin-JFET. Increasing $V_{G}^{+}$ from 8 V to 12 V allowed for a considerable reduction in the fall time and turn-on energy ($E_{text{ON}}$). Compared to similarly-rated GaN HEMTs and SiC MOSFETs, the vertical GaN Fin-JFET shows smaller turn-off energy ($E_{text{OFF}}$) and similar $E_{text{ON}}$, suggesting its good promise for soft switching applications. Finally, a zero-voltage switching converter based on the GaN Fin-JFET half bridge was demonstrated with a switching frequency up to 1 MHz, in which the Fin-JFET's $E_{text{OFF}}$ was extracted to be 1.7 µJunder the 400 V/6 A switching condition.
{"title":"Switching Performance Evaluation of 650 V Vertical GaN Fin JFET","authors":"R. Zhang, Q. Yang, Q. Li, Y. Zhang, V. Padilla, T. Pastore, W. Meier, S. Pidaparthi, C. Drowley","doi":"10.1109/APEC43580.2023.10131473","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131473","url":null,"abstract":"This work reports the first switching performance characterization of a 650 V NexGen's Vertical GaNTM fin-channel junction field effect transistor (Fin-JFET) fabricated on 4-inch GaN-on-GaN wafer. Compared to similarly-rated GaN HEMT and SiC MOSFET, the GaN Fin-JFET has smaller specific on-resistance, die size, and output capacitance ($C_{text{oss}}$). To exploit these merits in switching applications, an RC interface gate driver was selected with the driving strategy optimized by switching transient analysis. In the GaN Fin-JFET, the gate-to-drain capacitance ($C_{text{GD}}$) dominates $C_{text{oss}}$. Accordingly, the positive gate driver input voltage ($V_{G}^{+}$) was found to be critical to enable a fast gate charging for the Fin-JFET. Increasing $V_{G}^{+}$ from 8 V to 12 V allowed for a considerable reduction in the fall time and turn-on energy ($E_{text{ON}}$). Compared to similarly-rated GaN HEMTs and SiC MOSFETs, the vertical GaN Fin-JFET shows smaller turn-off energy ($E_{text{OFF}}$) and similar $E_{text{ON}}$, suggesting its good promise for soft switching applications. Finally, a zero-voltage switching converter based on the GaN Fin-JFET half bridge was demonstrated with a switching frequency up to 1 MHz, in which the Fin-JFET's $E_{text{OFF}}$ was extracted to be 1.7 µJunder the 400 V/6 A switching condition.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116953212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131262
R. Kheirollahi, Shuyan Zhao, Hua Zhang, F. Lu
This digest introduces a new dc solid-state circuit breaker (SSCB) using a complementary commutation technique. The proposed SSCB employs a capacitor-capacitor pair topology in a Π structure, called II-type SSCB. The capacitor-capacitor pair structure helps to achieve a reliable and fast re-closing and re-breaking process. The presented topology mostly benefits from its simplicity. It removes the voltage on passive components during the SSCB OFF-state, which enhances reliability. The II-type SSCB needs no charge/discharge circuits, and it solely depends on the dc system itself. In addition, the introduced SSCB facilities using high-power rating thyristors in the main and auxiliary branches, making it one of the best solutions for medium-voltage section. Two modified topologies are also presented to extend the applications of II-type SSCB in practice. To verify the effectiveness of the proposed topology, experiments of 500 V/50 A prototype are conducted. The results show the reaction time interval of 42 μs under load current interruption, where the peak voltage on the main and auxiliary thyristors reaches 581 V and 500 V, respectively.
{"title":"Complementary Commutation-Based Π-Type DC SSCB","authors":"R. Kheirollahi, Shuyan Zhao, Hua Zhang, F. Lu","doi":"10.1109/APEC43580.2023.10131262","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131262","url":null,"abstract":"This digest introduces a new dc solid-state circuit breaker (SSCB) using a complementary commutation technique. The proposed SSCB employs a capacitor-capacitor pair topology in a Π structure, called II-type SSCB. The capacitor-capacitor pair structure helps to achieve a reliable and fast re-closing and re-breaking process. The presented topology mostly benefits from its simplicity. It removes the voltage on passive components during the SSCB OFF-state, which enhances reliability. The II-type SSCB needs no charge/discharge circuits, and it solely depends on the dc system itself. In addition, the introduced SSCB facilities using high-power rating thyristors in the main and auxiliary branches, making it one of the best solutions for medium-voltage section. Two modified topologies are also presented to extend the applications of II-type SSCB in practice. To verify the effectiveness of the proposed topology, experiments of 500 V/50 A prototype are conducted. The results show the reaction time interval of 42 μs under load current interruption, where the peak voltage on the main and auxiliary thyristors reaches 581 V and 500 V, respectively.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117288907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131453
Mouzhi Dong, Ruiyang Yu, Yifan Jiang, J. Bu, J. Knapp, Daniel Brdar
A BTRAN™ device, rated at 1200V/SOA in a double-sided cooling TO-264 package, and driver design, are characterized and reported in this paper. Both DC and switching characterizations on the wafer and packaged levels validated the predicted simulation results reported last year at APEC 2022 [1]. Packaged devices showed bidirectional operation and symmetrical performance in both directions. The breakdown voltage, on-state voltage, and current gain (ß) were measured to be 1280 V, 0.6-0.8 V, and 4, respectively [2]. Double Pulse Testing (DPT) showed significant improvement over the comparative devices in the market. We obtained ultra-low conduction and switching power losses in switching modes of operation, showing the promise of utilizing B- TRAN™ in many power electronics applications such as Electric Vehicle (EV) traction inverters, EV Off-Board Chargers, Solid-State Circuit Breakers (SSCB), Bidirectional Power Converters, Battery Disconnect Switches, IGBT Common- Emitter applications, and Matrix Converters. At 800V/14A testing, the emitter-emitter on state voltage drop is 0.6V; under the same condition, the two best common-emitter IGBT bidirectional switches [3], [4] are shown to be 2.65V. Thus BTRAN™ offers close to an 80% reduction in conduction power losses (Figure 11 and Figure 13).
{"title":"B-TRAN™ Optimization and Performance Characterization","authors":"Mouzhi Dong, Ruiyang Yu, Yifan Jiang, J. Bu, J. Knapp, Daniel Brdar","doi":"10.1109/APEC43580.2023.10131453","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131453","url":null,"abstract":"A BTRAN™ device, rated at 1200V/SOA in a double-sided cooling TO-264 package, and driver design, are characterized and reported in this paper. Both DC and switching characterizations on the wafer and packaged levels validated the predicted simulation results reported last year at APEC 2022 [1]. Packaged devices showed bidirectional operation and symmetrical performance in both directions. The breakdown voltage, on-state voltage, and current gain (ß) were measured to be 1280 V, 0.6-0.8 V, and 4, respectively [2]. Double Pulse Testing (DPT) showed significant improvement over the comparative devices in the market. We obtained ultra-low conduction and switching power losses in switching modes of operation, showing the promise of utilizing B- TRAN™ in many power electronics applications such as Electric Vehicle (EV) traction inverters, EV Off-Board Chargers, Solid-State Circuit Breakers (SSCB), Bidirectional Power Converters, Battery Disconnect Switches, IGBT Common- Emitter applications, and Matrix Converters. At 800V/14A testing, the emitter-emitter on state voltage drop is 0.6V; under the same condition, the two best common-emitter IGBT bidirectional switches [3], [4] are shown to be 2.65V. Thus BTRAN™ offers close to an 80% reduction in conduction power losses (Figure 11 and Figure 13).","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116342402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131550
Itziar Alzuguren, A. Garcia‐Bediaga, A. Avila, A. Rujas, M. Vasić
This paper will discuss an ultra-functional circuit that can work in a variety of applications, including electric vehicle charging. Inside this application, it can be used in different modalities, such as on-board chargers, off-board wallbox chargers or wireless chargers. The main function of the circuit is to filter the power ripple at twice the grid frequency by means of a decoupling circuit connected in series with a resonant modified dual active bridge converter. However, it can also perform other functions such as peak shaving or low-voltage battery charging. The experimental results corroborate that the proposed active filter circuit with the connection in the high-frequency link opens new opportunities for single-stage integrated topologies.
{"title":"Ultra-Functional Novel Circuit for Electric Vehicle Charging Solutions Based on a Floating Active Filter Connected to the High-Frequency Link","authors":"Itziar Alzuguren, A. Garcia‐Bediaga, A. Avila, A. Rujas, M. Vasić","doi":"10.1109/APEC43580.2023.10131550","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131550","url":null,"abstract":"This paper will discuss an ultra-functional circuit that can work in a variety of applications, including electric vehicle charging. Inside this application, it can be used in different modalities, such as on-board chargers, off-board wallbox chargers or wireless chargers. The main function of the circuit is to filter the power ripple at twice the grid frequency by means of a decoupling circuit connected in series with a resonant modified dual active bridge converter. However, it can also perform other functions such as peak shaving or low-voltage battery charging. The experimental results corroborate that the proposed active filter circuit with the connection in the high-frequency link opens new opportunities for single-stage integrated topologies.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116386844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131280
Ruiyang Qin, Jie Li, Jingjing Sun, D. Costinett
This paper details a fully compensated self-resonant coil (FSRC) with series LC resonance and reduced surface electric field for application in wireless power transfer for consumer electronics. By having a repeated series LC connection along the entire coil trace, the proposed series resonant structure achieves high-Q, low E-field, and thin profile simultaneously. The impact of ferrite shielding is also studied. Different E-field compensation coil geometries are studied, and a systematic design method is presented for optimal coil performance. Experimental tests verify the coil function, modeling, and design.
{"title":"Fully Compensated Self-Resonant Coil with Low E-field and Low Profile for Consumer Electronics Wireless Charging","authors":"Ruiyang Qin, Jie Li, Jingjing Sun, D. Costinett","doi":"10.1109/APEC43580.2023.10131280","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131280","url":null,"abstract":"This paper details a fully compensated self-resonant coil (FSRC) with series LC resonance and reduced surface electric field for application in wireless power transfer for consumer electronics. By having a repeated series LC connection along the entire coil trace, the proposed series resonant structure achieves high-Q, low E-field, and thin profile simultaneously. The impact of ferrite shielding is also studied. Different E-field compensation coil geometries are studied, and a systematic design method is presented for optimal coil performance. Experimental tests verify the coil function, modeling, and design.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123209762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131496
Han Zhang, Rui Liu, Cheng Xue, Y. Li
Single-line-ground fault, which happens at the delta terminal of a $mathrm{Y}gDelta$ transformer or the ungrounded wye terminal of a $mathrm{Y}gmathrm{Y}$ transformer in a grid-forming inverter system will cause severe overcurrent and overvoltage simultaneously. However, they are rarely investigated together and mitigated through a control strategy at the same time. In this paper, phase voltages at the point of common coupling (PCC) and inverter output currents during the fault are firstly calculated based on the sequence network of the system. Subsequently, to ride through the fault, the hybrid mitigation strategy based on the virtual negative-sequence and positive-sequence impedance is proposed. The virtual negative-sequence impedance, realized through current feedback control, can not only reduce the overvoltage at healthy phases slightly and equalize them but also reduce inverter fault currents significantly. Besides, its weak overvoltage and strong overcurrent limiting abilities are also analyzed with varying grid short-circuit ratios and fault impedances. To limit the overvoltage, the virtual positive-sequence impedance can be increased during the fault in each control time step until the maximum phase voltage at the PCC is lower than the fault ride-through requirement. Consequently, the proposed mitigation strategy is verified by real-time simulations.
{"title":"Simultaneous Overvoltage and Overcurrent Mitigation of Grid-Forming Inverters under A Single-Line-Ground Fault","authors":"Han Zhang, Rui Liu, Cheng Xue, Y. Li","doi":"10.1109/APEC43580.2023.10131496","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131496","url":null,"abstract":"Single-line-ground fault, which happens at the delta terminal of a $mathrm{Y}gDelta$ transformer or the ungrounded wye terminal of a $mathrm{Y}gmathrm{Y}$ transformer in a grid-forming inverter system will cause severe overcurrent and overvoltage simultaneously. However, they are rarely investigated together and mitigated through a control strategy at the same time. In this paper, phase voltages at the point of common coupling (PCC) and inverter output currents during the fault are firstly calculated based on the sequence network of the system. Subsequently, to ride through the fault, the hybrid mitigation strategy based on the virtual negative-sequence and positive-sequence impedance is proposed. The virtual negative-sequence impedance, realized through current feedback control, can not only reduce the overvoltage at healthy phases slightly and equalize them but also reduce inverter fault currents significantly. Besides, its weak overvoltage and strong overcurrent limiting abilities are also analyzed with varying grid short-circuit ratios and fault impedances. To limit the overvoltage, the virtual positive-sequence impedance can be increased during the fault in each control time step until the maximum phase voltage at the PCC is lower than the fault ride-through requirement. Consequently, the proposed mitigation strategy is verified by real-time simulations.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123718881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131436
Katsuhiro Hata, Sadanori Suzuki, Kenichi Watanabe, Kenichi Nagayoshi, M. Takamiya
A 2-phase series capacitor synchronous rectifier (SC-SR) in active clamp forward (ACF) converters is proposed to solve the inductor cooling problems caused by the recent trend of increasing the output current. The proposed 2-phase SC-SR can achieve the interleaved operation by adding only one flying capacitor to the 2-parallel conventional SRs without increasing the number of the primary circuit elements and transformer. Furthermore, the proposed 2-phase SC-SR can achieve the automatic inductor current balancing, which helps distribute the heat evenly in the two inductors. In the measurement at 140 V -to-5 V conversion, the peak efficiency of the ACF converters with the proposed 2-phase SC-SR and conventional SR was 90.3 % and 85.9 % at 28 AOUT, respectively, resulting in the improvement in efficiency by 4.4 %. In addition, the interleaved operation of the proposed 2-phase SC-SR reduced the output current ripple from 10.8 A to 6.4 A compared to the conventional SR at 40 AOUT. The current imbalance between the two output inductors of the proposed 2-phase SC-SR was less than 10% under heavy load even without any control or compensation, demonstrating the practicability of the proposed 2-phase SC-SR in ACF converters.
为解决当前变换器输出电流不断增大所带来的电感冷却问题，提出了一种用于有源箝位变换器的2相串联电容同步整流器(SC-SR)。所提出的两相SC-SR在不增加一次电路元件和变压器数量的情况下，只需在2并联的传统sr上增加一个飞行电容器，即可实现交错运行。此外，所提出的两相SC-SR可以实现电感电流的自动平衡，有助于在两个电感中均匀地分配热量。在140 V -5 V转换测试中，采用两相SC-SR和常规SR的ACF转换器在28约out时的峰值效率分别为90.3%和85.9%，效率提高了4.4%。此外，与传统SR相比，所提出的2相SC-SR的交错操作将输出电流纹波从10.8 A降低到6.4 A，约为40。在不进行任何控制和补偿的情况下，该2相SC-SR的两个输出电感之间的电流不平衡小于10%，证明了该2相SC-SR在ACF变换器中的实用性。
{"title":"2-Phase Series Capacitor Synchronous Rectifier in Active Clamp Forward Converter","authors":"Katsuhiro Hata, Sadanori Suzuki, Kenichi Watanabe, Kenichi Nagayoshi, M. Takamiya","doi":"10.1109/APEC43580.2023.10131436","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131436","url":null,"abstract":"A 2-phase series capacitor synchronous rectifier (SC-SR) in active clamp forward (ACF) converters is proposed to solve the inductor cooling problems caused by the recent trend of increasing the output current. The proposed 2-phase SC-SR can achieve the interleaved operation by adding only one flying capacitor to the 2-parallel conventional SRs without increasing the number of the primary circuit elements and transformer. Furthermore, the proposed 2-phase SC-SR can achieve the automatic inductor current balancing, which helps distribute the heat evenly in the two inductors. In the measurement at 140 V -to-5 V conversion, the peak efficiency of the ACF converters with the proposed 2-phase SC-SR and conventional SR was 90.3 % and 85.9 % at 28 AOUT, respectively, resulting in the improvement in efficiency by 4.4 %. In addition, the interleaved operation of the proposed 2-phase SC-SR reduced the output current ripple from 10.8 A to 6.4 A compared to the conventional SR at 40 AOUT. The current imbalance between the two output inductors of the proposed 2-phase SC-SR was less than 10% under heavy load even without any control or compensation, demonstrating the practicability of the proposed 2-phase SC-SR in ACF converters.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121891876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131596
B. Gong, J. Afsharian, D. Xu, Z. Yang
This paper presents a two-step commutation scheme with analysis of zero voltage switching (ZVS) for all bidirectional switches of the three-phase isolated bidirectional matrix converter. The proposed commutation scheme for matrix converter is evaluated and verified by simulations and experiments on a 4 kW prototype.
{"title":"A Two-Step Commutation Scheme with Analysis of Zero-Voltage Switching for Bidirectional Isolated Matrix Converter","authors":"B. Gong, J. Afsharian, D. Xu, Z. Yang","doi":"10.1109/APEC43580.2023.10131596","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131596","url":null,"abstract":"This paper presents a two-step commutation scheme with analysis of zero voltage switching (ZVS) for all bidirectional switches of the three-phase isolated bidirectional matrix converter. The proposed commutation scheme for matrix converter is evaluated and verified by simulations and experiments on a 4 kW prototype.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125789467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131392
Nithin Kolli, Sanket Parashar, Raj Kumar Kokkonda, S. Bhattacharya, V. Veliadis
The recent advancement in the technology of SiC MOSFETs has spurred interest in designing compact and high switching frequency (10–20 kHz) power converters. However, grid-integration of these power converters at medium voltage (MV) scale would require a conventional transformer. With the development of new high voltage (HV) 10 kV and 15 kV SiC MOSFETs, these converters can directly interface with medium voltage (MV) grids without the need for line-frequency transformers, using simple two-level and three-level topologies. The application of these devices is currently being explored in all MV Applications (8 kV to 30 kV) like Solid State Transformer, MV Drives, Power Conditioning Systems, and MVDC isolators. This paper discusses application of 10 kV SiC MOSFETs and JBS Diodes for enabling Asynchronous Microgrid Power Conditioning System (AMPCS). This medium voltage power converter is enabled by series-connection of devices, in a Three-Level Neutral Point Clamped (3L-NPC) configuration. The voltage balancing of these series-connected devices is achieved by using R C-snubbers. This paper addresses the different conduction modes and switching sequences of a 3L-NPC pole, which is used as building block for the three-phase converter. The switching loss analysis, for various snubber values, is presented for the MOSFETs and the clamping diodes along with experimental results. This research helps in providing an overview of switching losses that are disspated through the device (and heatsink) and through the snubber resistor in a 3L-NPC convertor pole.
SiC mosfet技术的最新进展激发了人们对设计紧凑高开关频率(10 - 20khz)功率转换器的兴趣。然而，在中压(MV)尺度下，这些电源转换器的并网将需要一个传统的变压器。随着新型高压(HV) 10kv和15kv SiC mosfet的发展，这些变换器可以直接与中压(MV)电网接口，而不需要线频变压器，使用简单的二电平和三电平拓扑。目前正在探索这些器件在所有中压应用(8千伏至30千伏)中的应用，如固态变压器，中压驱动器，电力调节系统和MVDC隔离器。本文讨论了10kv SiC mosfet和JBS二极管在异步微电网电力调节系统(AMPCS)中的应用。该中压电源转换器通过设备串联连接，采用三电平中性点箝位(3L-NPC)配置。这些串联设备的电压平衡是通过使用rc缓冲器来实现的。本文讨论了作为三相变换器基本元件的3L-NPC极的不同导通模式和开关顺序。给出了mosfet和箝位二极管在不同缓冲值下的开关损耗分析，并给出了实验结果。这项研究有助于概述通过器件(和散热器)和3L-NPC变换器极中的缓冲电阻消散的开关损耗。
{"title":"Switching Loss Analysis of Three-Phase Three- Level Neutral Point Clamped Converter Pole Enabled by Series-Connected 10 kV SiC MOSFETs","authors":"Nithin Kolli, Sanket Parashar, Raj Kumar Kokkonda, S. Bhattacharya, V. Veliadis","doi":"10.1109/APEC43580.2023.10131392","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131392","url":null,"abstract":"The recent advancement in the technology of SiC MOSFETs has spurred interest in designing compact and high switching frequency (10–20 kHz) power converters. However, grid-integration of these power converters at medium voltage (MV) scale would require a conventional transformer. With the development of new high voltage (HV) 10 kV and 15 kV SiC MOSFETs, these converters can directly interface with medium voltage (MV) grids without the need for line-frequency transformers, using simple two-level and three-level topologies. The application of these devices is currently being explored in all MV Applications (8 kV to 30 kV) like Solid State Transformer, MV Drives, Power Conditioning Systems, and MVDC isolators. This paper discusses application of 10 kV SiC MOSFETs and JBS Diodes for enabling Asynchronous Microgrid Power Conditioning System (AMPCS). This medium voltage power converter is enabled by series-connection of devices, in a Three-Level Neutral Point Clamped (3L-NPC) configuration. The voltage balancing of these series-connected devices is achieved by using R C-snubbers. This paper addresses the different conduction modes and switching sequences of a 3L-NPC pole, which is used as building block for the three-phase converter. The switching loss analysis, for various snubber values, is presented for the MOSFETs and the clamping diodes along with experimental results. This research helps in providing an overview of switching losses that are disspated through the device (and heatsink) and through the snubber resistor in a 3L-NPC convertor pole.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125808822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131317
F. Khan, Sarwar Islam, J. Major, Adil Usman, G. Moreno, S. Narumanchi
A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.
{"title":"A Smart Silicon Carbide Power Module With Pulse Width Modulation Over Wi-Fi and Wireless Power Transfer-Enabled Gate Driver, Featuring Onboard State of Health Estimator and High-Voltage Scaling Capabilities","authors":"F. Khan, Sarwar Islam, J. Major, Adil Usman, G. Moreno, S. Narumanchi","doi":"10.1109/APEC43580.2023.10131317","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131317","url":null,"abstract":"A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126035109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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