Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967617
H. Wu, W. Beyene, N. Cheng, Ching-Chao Huang, C. Yuan
Differential signaling is a popular choice for multi-gigabit digital applications such as FiberChannel, Infiniband, OIF, RapidIO, and XAUI. This is due to the fact that differential signaling has the ability to reject common mode noise such as cross talk, simultaneous switching noise, power supply and ground bounce noise. To support differential signaling, differential transmission lines are required. There are several ways of designing differential transmission lines on a conventional printed circuit board (PCB). These include microstrip line, edge coupled stripline, and broadside-coupled stripline. This paper describes a methodology for designing and verifying differential transmission lines on PCBs. The electrical performance of these three differential transmission lines is evaluated in both the frequency and time domain. The practical consideration of manufacturing variation is also examined. Finally, accurate HSPICE w-element models are generated for time domain transient simulations.
{"title":"Design and verification of differential transmission lines","authors":"H. Wu, W. Beyene, N. Cheng, Ching-Chao Huang, C. Yuan","doi":"10.1109/EPEP.2001.967617","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967617","url":null,"abstract":"Differential signaling is a popular choice for multi-gigabit digital applications such as FiberChannel, Infiniband, OIF, RapidIO, and XAUI. This is due to the fact that differential signaling has the ability to reject common mode noise such as cross talk, simultaneous switching noise, power supply and ground bounce noise. To support differential signaling, differential transmission lines are required. There are several ways of designing differential transmission lines on a conventional printed circuit board (PCB). These include microstrip line, edge coupled stripline, and broadside-coupled stripline. This paper describes a methodology for designing and verifying differential transmission lines on PCBs. The electrical performance of these three differential transmission lines is evaluated in both the frequency and time domain. The practical consideration of manufacturing variation is also examined. Finally, accurate HSPICE w-element models are generated for time domain transient simulations.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122665978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967607
P. Gunupudi, R. Khazaka, Michel S. Nakhla
This paper presents a new technique to reduce the order of transmission line circuits simultaneously with respect to multiple parameters. The reduction is based on multi-dimensional congruence transformation. The proposed algorithm provides efficient means to estimate the response of large distributed circuits simultaneously as a function of frequency and other design parameters.
{"title":"Analysis of transmission line circuits using multi-dimensional model reduction techniques","authors":"P. Gunupudi, R. Khazaka, Michel S. Nakhla","doi":"10.1109/EPEP.2001.967607","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967607","url":null,"abstract":"This paper presents a new technique to reduce the order of transmission line circuits simultaneously with respect to multiple parameters. The reduction is based on multi-dimensional congruence transformation. The proposed algorithm provides efficient means to estimate the response of large distributed circuits simultaneously as a function of frequency and other design parameters.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115913617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967674
Seungyoung Ahn, A. Lu, W. Fan, L.W. Lai, Joungho Kim
This paper presents a solution space analysis of differential interconnects for low voltage differential signal (LVDS) applications. The interconnect performance has been evaluated using frequency-domain 3-D full-wave simulation, TDR measurement and time-domain transient simulation.
{"title":"Solution space analysis of interconnects for low voltage differential signaling (LVDS) applications","authors":"Seungyoung Ahn, A. Lu, W. Fan, L.W. Lai, Joungho Kim","doi":"10.1109/EPEP.2001.967674","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967674","url":null,"abstract":"This paper presents a solution space analysis of differential interconnects for low voltage differential signal (LVDS) applications. The interconnect performance has been evaluated using frequency-domain 3-D full-wave simulation, TDR measurement and time-domain transient simulation.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116357212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967629
S. Dalmia, J. Hobbs, V. Sundaram, M. Swaminathan, G. White, R. Tummala, S. Ogitani
By considering the potential variation of process parameters such as line width and dielectric thickness, several hybrid coplanar waveguide microstrip (CPWM) well matched lines were designed, fabricated and tested up to 6 GHz on a low loss thin film organic high density interconnect (HDI) substrate. The multiple CPWM lines were then used to characterize the thin film dielectric up to 6 GHz.
{"title":"Characterization of thin film organic materials at high frequency","authors":"S. Dalmia, J. Hobbs, V. Sundaram, M. Swaminathan, G. White, R. Tummala, S. Ogitani","doi":"10.1109/EPEP.2001.967629","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967629","url":null,"abstract":"By considering the potential variation of process parameters such as line width and dielectric thickness, several hybrid coplanar waveguide microstrip (CPWM) well matched lines were designed, fabricated and tested up to 6 GHz on a low loss thin film organic high density interconnect (HDI) substrate. The multiple CPWM lines were then used to characterize the thin film dielectric up to 6 GHz.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122148866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967623
Myunghee Sung, Namhoon Kim, Junwoo Lee, Baekkyu Choi, Ikseong Park, J. Hong, Yongtae Kwon, K. Choi, Joungho Kim
In this paper, we firstly report the crosstalk model of redistribution lines on Wafer Level Package over 5 GHz. The extracted mutual inductance and mutual capacitance have the maximum values of 220 pH/cm and 98.2 fF/cm, respectively.
{"title":"Microwave frequency crosstalk model of redistribution line patterns on Wafer Level Package","authors":"Myunghee Sung, Namhoon Kim, Junwoo Lee, Baekkyu Choi, Ikseong Park, J. Hong, Yongtae Kwon, K. Choi, Joungho Kim","doi":"10.1109/EPEP.2001.967623","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967623","url":null,"abstract":"In this paper, we firstly report the crosstalk model of redistribution lines on Wafer Level Package over 5 GHz. The extracted mutual inductance and mutual capacitance have the maximum values of 220 pH/cm and 98.2 fF/cm, respectively.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123597084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967658
Ibrahim M. Elfadel, H. Huang, A. Ruehli, A. Dounavis, Michel S. Nakhla
Two general algorithms for the modeling of lossy transmission lines with frequency-dependent parameters are contrasted and compared. The first is based on the generalized method of characteristics while the second is based on the more recent Pade macromodeling approach. The different approximations made in these two algorithms are contrasted and computational evidence is presented to show that these two methods complement rather than compete with each other.
{"title":"A comparative study of two transient analysis algorithms for lossy transmission lines with frequency-dependent data","authors":"Ibrahim M. Elfadel, H. Huang, A. Ruehli, A. Dounavis, Michel S. Nakhla","doi":"10.1109/EPEP.2001.967658","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967658","url":null,"abstract":"Two general algorithms for the modeling of lossy transmission lines with frequency-dependent parameters are contrasted and compared. The first is based on the generalized method of characteristics while the second is based on the more recent Pade macromodeling approach. The different approximations made in these two algorithms are contrasted and computational evidence is presented to show that these two methods complement rather than compete with each other.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"1 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128782298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967661
V. S. Cyr, I. Novak, N. Biunno, J. Howard
Power-distribution networks need to provide flat low impedance over a wide band. Bypass capacitors with different values, and capacitors and planes create resonance peaks, unless the capacitor parameters are selected properly. Distributed matched bypassing is used to create a smooth impedance profile. The ESR of ceramic capacitors is increased by adding embedded annular resistors in series to the capacitors.
{"title":"ARIES: using annular ring embedded resistors to set capacitor ESR in power distribution networks","authors":"V. S. Cyr, I. Novak, N. Biunno, J. Howard","doi":"10.1109/EPEP.2001.967661","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967661","url":null,"abstract":"Power-distribution networks need to provide flat low impedance over a wide band. Bypass capacitors with different values, and capacitors and planes create resonance peaks, unless the capacitor parameters are selected properly. Distributed matched bypassing is used to create a smooth impedance profile. The ESR of ceramic capacitors is increased by adding embedded annular resistors in series to the capacitors.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115299010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967620
R. Ramachandran, D. Newlin, A. Pham
Presents the design and development of on-chip inductors using an organic micromachining process for RF and microwave applications. The process employs an SU-8 negative photoresist for developing micromachined structures using standard lithography techniques and is compatible with post-IC process to integrate passive devices onto foundry-fabricated circuits. Our initial results demonstrate that a spiral inductor fabricated on Si using this technology achieves a measured Q-factor of 20 at 2.1 GHz. Further refinement of the process and design will increase the Q-factor to 60 as predicted by electromagnetic simulations. At the meeting we will present the design and development of various inductor topologies, including gridded ground planes, for achieving high Q-factors.
{"title":"Development of RF/microwave on-chip inductors using an organic micromachining process","authors":"R. Ramachandran, D. Newlin, A. Pham","doi":"10.1109/EPEP.2001.967620","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967620","url":null,"abstract":"Presents the design and development of on-chip inductors using an organic micromachining process for RF and microwave applications. The process employs an SU-8 negative photoresist for developing micromachined structures using standard lithography techniques and is compatible with post-IC process to integrate passive devices onto foundry-fabricated circuits. Our initial results demonstrate that a spiral inductor fabricated on Si using this technology achieves a measured Q-factor of 20 at 2.1 GHz. Further refinement of the process and design will increase the Q-factor to 60 as predicted by electromagnetic simulations. At the meeting we will present the design and development of various inductor topologies, including gridded ground planes, for achieving high Q-factors.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116884856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967618
Sheng-Mou Lin, R. Wu
The signal propagating along a microstrip line over a slot on the power plane will suffer from composite effects of reflected noise by a discontinuity in signal return path and ground bounce between power/ground planes. A new equivalent circuit model is proposed and simulations are performed for a three-layer structure to characterize ground bounce coupling.
{"title":"Composite effects of reflections and ground bounce for signal line through a split power plane","authors":"Sheng-Mou Lin, R. Wu","doi":"10.1109/EPEP.2001.967618","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967618","url":null,"abstract":"The signal propagating along a microstrip line over a slot on the power plane will suffer from composite effects of reflected noise by a discontinuity in signal return path and ground bounce between power/ground planes. A new equivalent circuit model is proposed and simulations are performed for a three-layer structure to characterize ground bounce coupling.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129983175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-01DOI: 10.1109/EPEP.2001.967672
U. Arz, D.F. Williams, H. Grabinski
We use a measurement method designed for coupled lines on highly conductive substrates to characterize identical asymmetric coupled lines fabricated on lossy silicon with and without a metallization plane beneath the two signal conductors. The study illustrates the important role of the return path in determining the electromagnetic coupling between the lines.
{"title":"Experimental study of the ground plane in asymmetric coupled silicon lines","authors":"U. Arz, D.F. Williams, H. Grabinski","doi":"10.1109/EPEP.2001.967672","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967672","url":null,"abstract":"We use a measurement method designed for coupled lines on highly conductive substrates to characterize identical asymmetric coupled lines fabricated on lossy silicon with and without a metallization plane beneath the two signal conductors. The study illustrates the important role of the return path in determining the electromagnetic coupling between the lines.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124815074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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