Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967613
Shih-Yen Lee, Y. Yeo, M. Yeo, M. Iyer, N. Do, Wui-Weng Wong
A 2-layered power plane modelling methodology based on transmission lines (TL) is used to model a commercial microprocessor package up to 10 GHz. Subsequently, a 3-layered power plane model is proposed. This model was further modified to model 3-layered power distribution planes with vias. Comparisons with the measurements showed that the modified model was able to offer accurate simulation results up to 10 GHz.
{"title":"Modelling of multi-layered power supply planes with vias","authors":"Shih-Yen Lee, Y. Yeo, M. Yeo, M. Iyer, N. Do, Wui-Weng Wong","doi":"10.1109/EPEP.2001.967613","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967613","url":null,"abstract":"A 2-layered power plane modelling methodology based on transmission lines (TL) is used to model a commercial microprocessor package up to 10 GHz. Subsequently, a 3-layered power plane model is proposed. This model was further modified to model 3-layered power distribution planes with vias. Comparisons with the measurements showed that the modified model was able to offer accurate simulation results up to 10 GHz.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130817857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967612
M. Iwanami, S. Hoshino
This paper describes the fundamental characteristics of parallel-plate resonances which are induced by the via penetrating a parallel-plate in a multilayer printed circuit board (PCB). From the results of experiments and simulations, the origin of the strong resonance peak in the |S/sub 21/| characteristic is discussed. It is shown that the strong resonance peak may result from the correspondence between the parallel resonance frequencies in the input impedance of the parallel-plate and in that of the signal trace with the exception of the via.
{"title":"Characterization of via-induced parallel-plate resonances in a printed circuit board","authors":"M. Iwanami, S. Hoshino","doi":"10.1109/EPEP.2001.967612","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967612","url":null,"abstract":"This paper describes the fundamental characteristics of parallel-plate resonances which are induced by the via penetrating a parallel-plate in a multilayer printed circuit board (PCB). From the results of experiments and simulations, the origin of the strong resonance peak in the |S/sub 21/| characteristic is discussed. It is shown that the strong resonance peak may result from the correspondence between the parallel resonance frequencies in the input impedance of the parallel-plate and in that of the signal trace with the exception of the via.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132202700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967631
Ling Yang, Ching-Chao Huang, J. Feng
This paper shows a generalized optimizer that interacts with an external circuit simulator to extract frequency-dependent lossy coupled transmission line models from TDR or VNA measurements. The optimizer's architectural flow, and such concepts as global and local iterations, weighting function, time-windowing and piecewise-linear source models are mentioned. Several examples, including a complex BGA package model, are used to demonstrate its effectiveness in extracting model parameters and correlating waveforms.
{"title":"Model extraction and waveform correlation via a generalized frequency- and time-domain optimizer","authors":"Ling Yang, Ching-Chao Huang, J. Feng","doi":"10.1109/EPEP.2001.967631","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967631","url":null,"abstract":"This paper shows a generalized optimizer that interacts with an external circuit simulator to extract frequency-dependent lossy coupled transmission line models from TDR or VNA measurements. The optimizer's architectural flow, and such concepts as global and local iterations, weighting function, time-windowing and piecewise-linear source models are mentioned. Several examples, including a complex BGA package model, are used to demonstrate its effectiveness in extracting model parameters and correlating waveforms.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"67 30","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114005506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967665
Z. Mu, K. Willis
This paper covers the board level signal integrity issues at Gbps rates, impact of pre-emphasis, interconnect design considerations, and plane configuration techniques for power delivery. Pre-defined rules can be drawn from the discussion to guide high speed board designs.
{"title":"SI and design considerations for Gbps PCBs in communication systems","authors":"Z. Mu, K. Willis","doi":"10.1109/EPEP.2001.967665","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967665","url":null,"abstract":"This paper covers the board level signal integrity issues at Gbps rates, impact of pre-emphasis, interconnect design considerations, and plane configuration techniques for power delivery. Pre-defined rules can be drawn from the discussion to guide high speed board designs.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116984483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967675
I. Stievano, Z. Chen, Dale Becker, F. Canavero, G. Katopis, I. Maio
This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for signal integrity simulations and timing analyses. The modeling process is described and applied to the characterization of actual devices.
{"title":"Behavioral modeling of digital IC input and output ports","authors":"I. Stievano, Z. Chen, Dale Becker, F. Canavero, G. Katopis, I. Maio","doi":"10.1109/EPEP.2001.967675","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967675","url":null,"abstract":"This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for signal integrity simulations and timing analyses. The modeling process is described and applied to the characterization of actual devices.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123813252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967648
G. Taylor, C. Deutschle, T. Arabi, B. Owens
A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.
{"title":"An approach to measuring power supply impedance of microprocessors","authors":"G. Taylor, C. Deutschle, T. Arabi, B. Owens","doi":"10.1109/EPEP.2001.967648","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967648","url":null,"abstract":"A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117011347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967676
Hai Lan, Amy, A. Weisshaar
Accurate closed-form expressions for the frequency-dependent [R], [L], [G], [C] line parameters of coupled on-chip interconnects on lossy silicon substrate are presented. The closed-form expressions for the frequency-dependent series impedance parameters are obtained using a complex image method. The frequency-dependent shunt admittance parameters are expressed using high- and low-frequency asymptotic static solutions. The proposed closed-from expressions are shown to be in good agreement with both quasi-static and full-wave electromagnetic solutions.
{"title":"Accurate closed-form expressions for the frequency-dependent line parameters of coupled on-chip interconnects on silicon substrate","authors":"Hai Lan, Amy, A. Weisshaar","doi":"10.1109/EPEP.2001.967676","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967676","url":null,"abstract":"Accurate closed-form expressions for the frequency-dependent [R], [L], [G], [C] line parameters of coupled on-chip interconnects on lossy silicon substrate are presented. The closed-form expressions for the frequency-dependent series impedance parameters are obtained using a complex image method. The frequency-dependent shunt admittance parameters are expressed using high- and low-frequency asymptotic static solutions. The proposed closed-from expressions are shown to be in good agreement with both quasi-static and full-wave electromagnetic solutions.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126810130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967655
S. Grivet-Talocia, I. Maio, F. Canavero
This paper addresses some important issues related to reduced-order modeling of complex interconnects. Two different but complementary directions are investigated. On one hand, multiport interconnect structures with possibly complex geometry are analyzed by means of model order reduction from transient scattering responses. On the other hand, some recent advances on stable and robust treatment of transmission lines with arbitrary frequency-dependent parameters are illustrated. Both modeling strategies lead to the automatic generation of a SPICE-ready equivalent circuit for system-level simulation.
{"title":"Recent advances in reduced-order modeling of complex interconnects","authors":"S. Grivet-Talocia, I. Maio, F. Canavero","doi":"10.1109/EPEP.2001.967655","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967655","url":null,"abstract":"This paper addresses some important issues related to reduced-order modeling of complex interconnects. Two different but complementary directions are investigated. On one hand, multiport interconnect structures with possibly complex geometry are analyzed by means of model order reduction from transient scattering responses. On the other hand, some recent advances on stable and robust treatment of transmission lines with arbitrary frequency-dependent parameters are illustrated. Both modeling strategies lead to the automatic generation of a SPICE-ready equivalent circuit for system-level simulation.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125727913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967663
Huabo Chen, J. Fang, Weimin Shi
Decoupling capacitors on packages and printed circuit boards are often essential to reduce voltage fluctuations and maintain power and signal integrity. This paper presents a measure for the evaluation of effectiveness of decoupling capacitors placed on package or board structures.
{"title":"Effective decoupling radius of decoupling capacitor","authors":"Huabo Chen, J. Fang, Weimin Shi","doi":"10.1109/EPEP.2001.967663","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967663","url":null,"abstract":"Decoupling capacitors on packages and printed circuit boards are often essential to reduce voltage fluctuations and maintain power and signal integrity. This paper presents a measure for the evaluation of effectiveness of decoupling capacitors placed on package or board structures.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132912022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-29DOI: 10.1109/EPEP.2001.967654
Weimin Shi, J. Fang
This paper introduces a new efficient numerical technique for the computation of fields in electronics packages with power and ground planes. This full wave approach can be conveniently integrated with circuit solvers. Skin-effect loss from metal planes and dielectric loss, together with the non-total reflections from outer edges of planes, can be easily incorporated. A special computation scheme was developed for handling vias between metal planes. Very good correlation has been achieved on printed-circuit test boards up to several GHz.
{"title":"New efficient method of modeling electronics packages with power and ground planes","authors":"Weimin Shi, J. Fang","doi":"10.1109/EPEP.2001.967654","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967654","url":null,"abstract":"This paper introduces a new efficient numerical technique for the computation of fields in electronics packages with power and ground planes. This full wave approach can be conveniently integrated with circuit solvers. Skin-effect loss from metal planes and dielectric loss, together with the non-total reflections from outer edges of planes, can be easily incorporated. A special computation scheme was developed for handling vias between metal planes. Very good correlation has been achieved on printed-circuit test boards up to several GHz.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124464293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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