Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268661
Arnau Salas Barenys, N. Vidal, J. López-Villegas
The aim of this work is to fabricate and characterize a very compact branch-line coupler at the UHF band, where the wavelength is critical for miniaturization. In order to do this, the advantages of a 3D-printed electronics manufacturing process developed in former work demonstrated the usability of helical-microstrip transmission lines and allowed the materialization of a new folded topology for hybrid couplers. The design methodology and the manufacturing process have been described. A conventional hybrid coupler has been also designed, manufactured and characterized in order to compare dimensions and model simulation and prototype characterization results in terms of the scattering parameters.
{"title":"Compact 3D-Printed Folded Branch-Line Hybrid Coupler based on Helical-Microstrip Transmission Lines","authors":"Arnau Salas Barenys, N. Vidal, J. López-Villegas","doi":"10.1109/DCIS51330.2020.9268661","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268661","url":null,"abstract":"The aim of this work is to fabricate and characterize a very compact branch-line coupler at the UHF band, where the wavelength is critical for miniaturization. In order to do this, the advantages of a 3D-printed electronics manufacturing process developed in former work demonstrated the usability of helical-microstrip transmission lines and allowed the materialization of a new folded topology for hybrid couplers. The design methodology and the manufacturing process have been described. A conventional hybrid coupler has been also designed, manufactured and characterized in order to compare dimensions and model simulation and prototype characterization results in terms of the scattering parameters.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"32 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127375288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268662
M. F. Canabal, J. A. Miranda, J. M. Lanza-Gutiérrez, A. I. P. Garcilópez, C. López-Ongil
Nowadays, the integration of smart sensors in wearable affective computing systems aims to improve and create applications based on conventional sensing technology. The inclusion of this type of sensors is key in high sensing-demanding applications, such as those based on affective computing. This sensing integration must be quantitatively supported by metrics that directly affect performance, such as processing time, memory usage, and measurement accuracy. This paper presents a comprehensive analysis of a specific smart sensor integration in a wearable constrained device from an embedded perspective. The authors performed this implementation by considering BINDI, which is a wearable device developed by the UC3M4Safety research group to prevent gender violence situations. BINDI monitors user physiological and physical variables to detect fear through artificial intelligence algorithms. Along with other sensors, this device incorporates an electroDermal activity (EDA) sensor. This type of sensor was proven to be a valuable source of information directly related to the autonomous nervous system (ANS) activation, which regulates physiological responses in stress and relaxed affective states. In the initial version of BINDI, which was validated in different experiments with different volunteers, the EDA sensor is based on a DC measurement schema. However, AC measurement EDA circuitry is known to provide a higher amount of information. Thus, this work presents a detailed comparison between the current EDA sensor and a specific AC smart EDA sensor for a future version of BINDI.
{"title":"Electrodermal Activity Smart Sensor Integration in a Wearable Affective Computing System","authors":"M. F. Canabal, J. A. Miranda, J. M. Lanza-Gutiérrez, A. I. P. Garcilópez, C. López-Ongil","doi":"10.1109/DCIS51330.2020.9268662","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268662","url":null,"abstract":"Nowadays, the integration of smart sensors in wearable affective computing systems aims to improve and create applications based on conventional sensing technology. The inclusion of this type of sensors is key in high sensing-demanding applications, such as those based on affective computing. This sensing integration must be quantitatively supported by metrics that directly affect performance, such as processing time, memory usage, and measurement accuracy. This paper presents a comprehensive analysis of a specific smart sensor integration in a wearable constrained device from an embedded perspective. The authors performed this implementation by considering BINDI, which is a wearable device developed by the UC3M4Safety research group to prevent gender violence situations. BINDI monitors user physiological and physical variables to detect fear through artificial intelligence algorithms. Along with other sensors, this device incorporates an electroDermal activity (EDA) sensor. This type of sensor was proven to be a valuable source of information directly related to the autonomous nervous system (ANS) activation, which regulates physiological responses in stress and relaxed affective states. In the initial version of BINDI, which was validated in different experiments with different volunteers, the EDA sensor is based on a DC measurement schema. However, AC measurement EDA circuitry is known to provide a higher amount of information. Thus, this work presents a detailed comparison between the current EDA sensor and a specific AC smart EDA sensor for a future version of BINDI.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123586763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268674
Alberto Ramírez-Bárcenas, M. Portela-García, M. García-Valderas, C. López-Ongil
The use of smart sensors in wearable devices is thoroughly extended in recent times. The processing of large amount of sensed data is performed in these Cyberphysical System to avoid heavy wireless communication as well as high time and energy consumption. Therefore, very complex devices are being built which implies a concern in system dependability, especially when critical applications are the objective. In this paper, an enhanced methodology to assess in-field dependability of wearable devices is proposed. It includes a power consumption effect analysis of the mitigation and detection techniques. Proposed methodology has been applied on a real case study.
{"title":"System Dependability in Edge Computing Wearable Devices","authors":"Alberto Ramírez-Bárcenas, M. Portela-García, M. García-Valderas, C. López-Ongil","doi":"10.1109/DCIS51330.2020.9268674","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268674","url":null,"abstract":"The use of smart sensors in wearable devices is thoroughly extended in recent times. The processing of large amount of sensed data is performed in these Cyberphysical System to avoid heavy wireless communication as well as high time and energy consumption. Therefore, very complex devices are being built which implies a concern in system dependability, especially when critical applications are the objective. In this paper, an enhanced methodology to assess in-field dependability of wearable devices is proposed. It includes a power consumption effect analysis of the mitigation and detection techniques. Proposed methodology has been applied on a real case study.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116197227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268664
J. Abella, C. Bulla, Guillem Cabo, F. Cazorla, A. Cristal, Max Doblas, R. Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, R. Martínez, J. Mendoza, F. Moll, Miquel Moreteó, Julian Pavon, Cristóbal Ramíez, M. A. Ramírez, Carlos Rojas, A. Rubio, Abraham Ruiz, Nehir Sonmez, Víctor Soria, L. Terés, O. Unsal, M. Valero, Iván Vargas, L. Villa
The design presented in this paper, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V processor designed and fabricated by a Spanish or Mexican academic institution, and will be the basis of future RISC-V designs jointly developed by these institutions. This paper summarizes the design tasks, for FPGA first and for SoC later, from high architectural level descriptions down to RTL and then going through logic synthesis and physical design to get the layout ready for its final tapeout in CMOS 65nm technology.
{"title":"An Academic RISC-V Silicon Implementation Based on Open-Source Components","authors":"J. Abella, C. Bulla, Guillem Cabo, F. Cazorla, A. Cristal, Max Doblas, R. Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, R. Martínez, J. Mendoza, F. Moll, Miquel Moreteó, Julian Pavon, Cristóbal Ramíez, M. A. Ramírez, Carlos Rojas, A. Rubio, Abraham Ruiz, Nehir Sonmez, Víctor Soria, L. Terés, O. Unsal, M. Valero, Iván Vargas, L. Villa","doi":"10.1109/DCIS51330.2020.9268664","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268664","url":null,"abstract":"The design presented in this paper, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V processor designed and fabricated by a Spanish or Mexican academic institution, and will be the basis of future RISC-V designs jointly developed by these institutions. This paper summarizes the design tasks, for FPGA first and for SoC later, from high architectural level descriptions down to RTL and then going through logic synthesis and physical design to get the layout ready for its final tapeout in CMOS 65nm technology.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"31 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132365641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268646
Beatriz Martínez-Vega, E. Quevedo, Raquel León, H. Fabelo, S. Ortega, G. Callicó, Irene Castaño, G. Carretero, P. Almeida, Aday García, Javier A. Hernández, Stig Uteng, F. Godtliebsen
Hyperspectral Imaging (HSI) for dermatology applications lacks a physical model to differentiate between cancerous or non-cancerous pigmented skin lesions. In this paper the statistical properties of a set of HSI data are exploited as an alternative to this limitation. The hyperspectral dermatologic database employed in the experiments is composed by 40 noncancerous and 36 cancerous pigmented skin lesions (PSLs) obtained from 61 patients. The preliminary experiments suggest the potential of a simple statistics metrics, such as the coefficient of variation, to distinguish between cancerous and non-cancerous PSLs using hyperspectral data. A sensitivity result of 100% was achieved in the test set providing an overall accuracy classification of 80%.
{"title":"Statistics-based Classification Approach for Hyperspectral Dermatologic Data Processing","authors":"Beatriz Martínez-Vega, E. Quevedo, Raquel León, H. Fabelo, S. Ortega, G. Callicó, Irene Castaño, G. Carretero, P. Almeida, Aday García, Javier A. Hernández, Stig Uteng, F. Godtliebsen","doi":"10.1109/DCIS51330.2020.9268646","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268646","url":null,"abstract":"Hyperspectral Imaging (HSI) for dermatology applications lacks a physical model to differentiate between cancerous or non-cancerous pigmented skin lesions. In this paper the statistical properties of a set of HSI data are exploited as an alternative to this limitation. The hyperspectral dermatologic database employed in the experiments is composed by 40 noncancerous and 36 cancerous pigmented skin lesions (PSLs) obtained from 61 patients. The preliminary experiments suggest the potential of a simple statistics metrics, such as the coefficient of variation, to distinguish between cancerous and non-cancerous PSLs using hyperspectral data. A sensitivity result of 100% was achieved in the test set providing an overall accuracy classification of 80%.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130119307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268622
Asghar Bahramali, M. López-Vallejo, C. López-Barrio
In this paper an ultra low power consumption (in the range of pW) start-up circuit is introduced. In the proposed circuit configuration no resistor nor capacitor are included and only normal CMOS devices with low device count (only three devices) are used. In this manner the active area of the circuit is extremely reduced. The circuit shows a very fast reaction time of less than 2µs that makes it attractive for many real time applications. The proposed circuit has the feature of acting as a composite transistor in the normal active mode of the targeted self biased circuit helping to improve its line regulation performance. This is a benefit of the proposed start-up circuit which is completely in line with the purpose of using the self- biased configurations in voltage reference circuits. The circuit is designed and simulated in a commercial 40nm technology using Cadence tools. The parasitic effects of the layout are also included in the simulations.
{"title":"An ultra-low power deep sub-micron fast start-up circuit with added line regulation","authors":"Asghar Bahramali, M. López-Vallejo, C. López-Barrio","doi":"10.1109/DCIS51330.2020.9268622","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268622","url":null,"abstract":"In this paper an ultra low power consumption (in the range of pW) start-up circuit is introduced. In the proposed circuit configuration no resistor nor capacitor are included and only normal CMOS devices with low device count (only three devices) are used. In this manner the active area of the circuit is extremely reduced. The circuit shows a very fast reaction time of less than 2µs that makes it attractive for many real time applications. The proposed circuit has the feature of acting as a composite transistor in the normal active mode of the targeted self biased circuit helping to improve its line regulation performance. This is a benefit of the proposed start-up circuit which is completely in line with the purpose of using the self- biased configurations in voltage reference circuits. The circuit is designed and simulated in a commercial 40nm technology using Cadence tools. The parasitic effects of the layout are also included in the simulations.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126822845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268642
M. Garrido
This paper explores the evolution of the three main figures of merit for pipeline fast Fourier transform (FFT) architecture through the years. These figures of merit are throughput, power consumption and area. By means of a careful analysis of more than 200 FFT architectures, this papers provides a big picture of the evolution of pipelined FFT architectures, it reveals hidden trends, and gives hints about the future of pipelined FFT architectures.
{"title":"Evolution of the Performance of Pipelined FFT Architectures Through the Years","authors":"M. Garrido","doi":"10.1109/DCIS51330.2020.9268642","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268642","url":null,"abstract":"This paper explores the evolution of the three main figures of merit for pipeline fast Fourier transform (FFT) architecture through the years. These figures of merit are throughput, power consumption and area. By means of a careful analysis of more than 200 FFT architectures, this papers provides a big picture of the evolution of pipelined FFT architectures, it reveals hidden trends, and gives hints about the future of pipelined FFT architectures.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133709627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268644
Jesús Lázaro, L. Burgos, L. Muguira, A. Astarloa, J. Jiménez
Rocketry has been a driving force for engineering for a good part of the XX. century and still is one of the more advanced engineering fields. Apart from being a challenging field, it is also very attractive and spectacular. Due to the decrease in the number of students in engineering courses, these kinds of initiatives may have a public impact and attract more candidates to STEM degrees. In this scenario, in the Bilbao Engineering School, a student group, dedicated to rocketry, has been formed: BiSKY Team. One of the key elements in a rocket is the electronics. This paper presents the control electronics of a rocket as well as its impact on students and soon to be students, to focus their career in engineering and specifically in electronics.
{"title":"Electronic control board for student Rocket","authors":"Jesús Lázaro, L. Burgos, L. Muguira, A. Astarloa, J. Jiménez","doi":"10.1109/DCIS51330.2020.9268644","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268644","url":null,"abstract":"Rocketry has been a driving force for engineering for a good part of the XX. century and still is one of the more advanced engineering fields. Apart from being a challenging field, it is also very attractive and spectacular. Due to the decrease in the number of students in engineering courses, these kinds of initiatives may have a public impact and attract more candidates to STEM degrees. In this scenario, in the Bilbao Engineering School, a student group, dedicated to rocketry, has been formed: BiSKY Team. One of the key elements in a rocket is the electronics. This paper presents the control electronics of a rocket as well as its impact on students and soon to be students, to focus their career in engineering and specifically in electronics.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"132 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133783004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/dcis51330.2020.9268640
{"title":"DCIS 2020 Committees","authors":"","doi":"10.1109/dcis51330.2020.9268640","DOIUrl":"https://doi.org/10.1109/dcis51330.2020.9268640","url":null,"abstract":"","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114689351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-18DOI: 10.1109/DCIS51330.2020.9268653
J. M. D. Silva, Ilaria Cerrone, Daniel Malágon, Jorge Marinho, Stephen Mundy, João Gaspar, J. Mendes
Natural teeth eventually fall out as one becomes older, making it more difficult chewing, speaking and get a reference plane for the body postural equilibrium. To minimize the problem, the missing teeth are eventually replaced by implants that restore the referred functions but miss the sensing of the applied force. As a consequence, the masticatory forces become erratic as the brain receives no feedback (or inaccurate) sensing information. The present work aims at developing a preliminary prototype of a smart dental implant meant to restore the proprioceptive control of the masticatory and chewing muscle activity. After the description of the physiological and biomechanical aspects related to tooth loss, details are provided on the force sensing and electrical stimulation provided by the active implant being proposed. Simulation results obtained with the development tool of the GreenPAK programmable chip being used are included.
{"title":"A Smart Dental Prosthesis to Restore Dental Proprioceptivity","authors":"J. M. D. Silva, Ilaria Cerrone, Daniel Malágon, Jorge Marinho, Stephen Mundy, João Gaspar, J. Mendes","doi":"10.1109/DCIS51330.2020.9268653","DOIUrl":"https://doi.org/10.1109/DCIS51330.2020.9268653","url":null,"abstract":"Natural teeth eventually fall out as one becomes older, making it more difficult chewing, speaking and get a reference plane for the body postural equilibrium. To minimize the problem, the missing teeth are eventually replaced by implants that restore the referred functions but miss the sensing of the applied force. As a consequence, the masticatory forces become erratic as the brain receives no feedback (or inaccurate) sensing information. The present work aims at developing a preliminary prototype of a smart dental implant meant to restore the proprioceptive control of the masticatory and chewing muscle activity. After the description of the physiological and biomechanical aspects related to tooth loss, details are provided on the force sensing and electrical stimulation provided by the active implant being proposed. Simulation results obtained with the development tool of the GreenPAK programmable chip being used are included.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114569033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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