Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1011468
R. Chang, B. Lim
The routing table lookup becomes a great bottleneck when multi-gigabit links are required in today's network routers. Hence, we propose a lookup scheme that can efficiently handle IP routing lookup, insertion and deletion inside the routing table. By introducing memory reduction and the novel skip function, we have successfully reduced the required memory size to about 0.59 Mbytes. The routing table VLSI design was carried out. It can achieve one route lookup for every memory access using pipeline implementation. Timemill post-layout simulation results show that the chip can furnish approximately 30/spl times/10/sup 6/ lookups/s, and thus it can support up to 30 Gbits/s link speed when the frame size is 1000 bits. In addition, our design can be easily scaled from IPv4 to IPv6.
{"title":"Efficient IP routing table VLSI design for multigigabit routers","authors":"R. Chang, B. Lim","doi":"10.1109/ISCAS.2002.1011468","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1011468","url":null,"abstract":"The routing table lookup becomes a great bottleneck when multi-gigabit links are required in today's network routers. Hence, we propose a lookup scheme that can efficiently handle IP routing lookup, insertion and deletion inside the routing table. By introducing memory reduction and the novel skip function, we have successfully reduced the required memory size to about 0.59 Mbytes. The routing table VLSI design was carried out. It can achieve one route lookup for every memory access using pipeline implementation. Timemill post-layout simulation results show that the chip can furnish approximately 30/spl times/10/sup 6/ lookups/s, and thus it can support up to 30 Gbits/s link speed when the frame size is 1000 bits. In addition, our design can be easily scaled from IPv4 to IPv6.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128024031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1011014
F. Gerfers, C. Hack, Y. Manoli
This paper presents an architecture for a CMOS high-swing 1.2 V low-power fully differential class-AB amplifier (opamp) with a DC-gain of 52 dB. A low-voltage differential input stage is applied as the basic architecture. The replica gain enhancement technique is used to increase the DC-gain without degrading the output swing. Furthermore, this gain enhancement concept does not increase the minimal supply voltage and also allows scaling of the replica amplifier. The power dissipation is 200 /spl mu/W, providing a gainbandwidth (GBW) of 1.9 MHz with a capacitive load of 30 pF.
{"title":"A 1.2 V rail-to-rail low-power opamp with replica amplifier gain enhancement","authors":"F. Gerfers, C. Hack, Y. Manoli","doi":"10.1109/ISCAS.2002.1011014","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1011014","url":null,"abstract":"This paper presents an architecture for a CMOS high-swing 1.2 V low-power fully differential class-AB amplifier (opamp) with a DC-gain of 52 dB. A low-voltage differential input stage is applied as the basic architecture. The replica gain enhancement technique is used to increase the DC-gain without degrading the output swing. Furthermore, this gain enhancement concept does not increase the minimal supply voltage and also allows scaling of the replica amplifier. The power dissipation is 200 /spl mu/W, providing a gainbandwidth (GBW) of 1.9 MHz with a capacitive load of 30 pF.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125669695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010547
A. Fishov, E. Siragusa, Jared Welz, E. Fogleman, I. Galton
Tree-structured mismatch-shaping DACs have recently been used as enabling components in state-of-the-art /spl Delta//spl Sigma/ ADCs to suppress signal-band error arising from mismatches among fabricated DAC components. This paper presents a segmented version of the encoder with significantly reduced hardware complexity. The segmented architecture follows from a result that any digital encoder for which the output values sum to the input value can be implemented using a tree-structured encoder.
{"title":"Segmented mismatch-shaping D/A conversion","authors":"A. Fishov, E. Siragusa, Jared Welz, E. Fogleman, I. Galton","doi":"10.1109/ISCAS.2002.1010547","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010547","url":null,"abstract":"Tree-structured mismatch-shaping DACs have recently been used as enabling components in state-of-the-art /spl Delta//spl Sigma/ ADCs to suppress signal-band error arising from mismatches among fabricated DAC components. This paper presents a segmented version of the encoder with significantly reduced hardware complexity. The segmented architecture follows from a result that any digital encoder for which the output values sum to the input value can be implemented using a tree-structured encoder.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125773860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010798
V. Donde, I. Hiskens
The paper analyses the nature of limit cycles induced through the interaction of transformer tap changing and load dynamics. Linearization of a Poincare map is used to prove local stability. An approximation is introduced which allows the map to be formulated explicitly. An estimate of the region of attraction can then be obtained.
{"title":"Analysis of limit cycle stability in a tap-changing transformer","authors":"V. Donde, I. Hiskens","doi":"10.1109/ISCAS.2002.1010798","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010798","url":null,"abstract":"The paper analyses the nature of limit cycles induced through the interaction of transformer tap changing and load dynamics. Linearization of a Poincare map is used to prove local stability. An approximation is introduced which allows the map to be formulated explicitly. An estimate of the region of attraction can then be obtained.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126017320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1009853
Jie Chen, K. R. Liu
We propose a joint source-channel content-based multistream video coding scheme to combat transmission errors. By coupling it with our ground breaking innovation frequency-hopping OFDM at the physical layer, our proposed multistream design provides better error protection than the conventional design. Note that the frequency-hopping OFDM provides a significantly superior platform to all other existing technologies, including cdma2000 and WCDMA, for wireless services. Simulations demonstrate that our design outperforms the single stream layered design by 3-7 dB under harsh network conditions.
{"title":"Joint source-channel content-based multistream video coding scheme","authors":"Jie Chen, K. R. Liu","doi":"10.1109/ISCAS.2002.1009853","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1009853","url":null,"abstract":"We propose a joint source-channel content-based multistream video coding scheme to combat transmission errors. By coupling it with our ground breaking innovation frequency-hopping OFDM at the physical layer, our proposed multistream design provides better error protection than the conventional design. Note that the frequency-hopping OFDM provides a significantly superior platform to all other existing technologies, including cdma2000 and WCDMA, for wireless services. Simulations demonstrate that our design outperforms the single stream layered design by 3-7 dB under harsh network conditions.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121977909","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1009821
N. Takahashi, T. Otake, Mamoru Tanaka
Describes the A and B templates optimization of discrete time cellular neural network (CNN) for image compression and reconstruction. It is a very significant characteristic of CNN that nonlinear function and A template initiate some dynamics. Also, optimized B template contributes to the initial condition of some dynamics. This paper describes effectiveness by not only each A and B template but also the combination of A (dynamics) and B (filter) templates. It is a very significant point for CNN that the target issue is solved not by B template (filter) but by A template (dynamics) of CNN. The discrete time CNN with nonlinear quantization function proposed can encode (compress) images to small compressed code and can decode (reconstruct) its code to high quality lossy image. It is very important that the discrete time CNN state variable image which is determined dynamically based on the minimization of the discrete time CNN Lyapunov energy function to generate an optimized interpolative predict function is a lossy interpolative DPCM image between the original input and the interpolation predict functions.
{"title":"The template optimization of discrete time CNN for image compression and reconstruction","authors":"N. Takahashi, T. Otake, Mamoru Tanaka","doi":"10.1109/ISCAS.2002.1009821","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1009821","url":null,"abstract":"Describes the A and B templates optimization of discrete time cellular neural network (CNN) for image compression and reconstruction. It is a very significant characteristic of CNN that nonlinear function and A template initiate some dynamics. Also, optimized B template contributes to the initial condition of some dynamics. This paper describes effectiveness by not only each A and B template but also the combination of A (dynamics) and B (filter) templates. It is a very significant point for CNN that the target issue is solved not by B template (filter) but by A template (dynamics) of CNN. The discrete time CNN with nonlinear quantization function proposed can encode (compress) images to small compressed code and can decode (reconstruct) its code to high quality lossy image. It is very important that the discrete time CNN state variable image which is determined dynamically based on the minimization of the discrete time CNN Lyapunov energy function to generate an optimized interpolative predict function is a lossy interpolative DPCM image between the original input and the interpolation predict functions.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127983663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1011459
A. Bandyopadhyay, Grant H. Mulliken, Gert Cauwenberghs, N. Thakor
A neurochemical sensor system is being developed to spatially sense and process neurotransmitters. This paper reports the design and VLSI implementation of a multichannel potentiostat that interfaces to a nitric-oxide (NO) sensor array. Picoampere to microampere input currents are range-normalized with programmable gain, and digitized by a bank of current-mode delta-sigma analog-to-digital (A/D) converters. First-order noise shaping and 4096-fold oversampling provide high signal-to-noise ratio for the low-frequency NO transients. A shift register scans the buffered decimated delta-sigma outputs in bit-serial format providing asynchronous sequential readout. An 8-channel potentiostat in 0.5 /spl mu/m CMOS measures 1.5 mm/spl times/1.5 mm, and consumes 0.5 mW power. The device is expected to serve as a valuable tool for neurophysiological research and implantable neural prostheses.
{"title":"VLSI potentiostat array for distributed electrochemical neural recording","authors":"A. Bandyopadhyay, Grant H. Mulliken, Gert Cauwenberghs, N. Thakor","doi":"10.1109/ISCAS.2002.1011459","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1011459","url":null,"abstract":"A neurochemical sensor system is being developed to spatially sense and process neurotransmitters. This paper reports the design and VLSI implementation of a multichannel potentiostat that interfaces to a nitric-oxide (NO) sensor array. Picoampere to microampere input currents are range-normalized with programmable gain, and digitized by a bank of current-mode delta-sigma analog-to-digital (A/D) converters. First-order noise shaping and 4096-fold oversampling provide high signal-to-noise ratio for the low-frequency NO transients. A shift register scans the buffered decimated delta-sigma outputs in bit-serial format providing asynchronous sequential readout. An 8-channel potentiostat in 0.5 /spl mu/m CMOS measures 1.5 mm/spl times/1.5 mm, and consumes 0.5 mW power. The device is expected to serve as a valuable tool for neurophysiological research and implantable neural prostheses.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115793165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010783
M. Mowafi, Nan Jiang, T. Caudell, W. Shu, Minyou Wu
Three-dimensional (3D) imaging technology is a very promising approach expected to outgrow the conventional framework of visual communication. In order to enable stereoscopic visual communication over the Internet, two video sources, for the left and right eyes' viewpoints, need to be transmitted and properly presented at the remote end using a 3D-visualization system. This paper proposes a simple method for real-time transmission of stereo images over the National Computational Science Alliance Access Grid. The method is compatible with existing access grid software and does not require additional bandwidth or major modifications to the coding process. The proposed method is very efficient for stereoscopic video transmission over the Internet. Furthermore, the development of software tools to transmit and receive stereo images over the Internet is presented.
{"title":"Real-time transmission of stereo images over the access grid","authors":"M. Mowafi, Nan Jiang, T. Caudell, W. Shu, Minyou Wu","doi":"10.1109/ISCAS.2002.1010783","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010783","url":null,"abstract":"Three-dimensional (3D) imaging technology is a very promising approach expected to outgrow the conventional framework of visual communication. In order to enable stereoscopic visual communication over the Internet, two video sources, for the left and right eyes' viewpoints, need to be transmitted and properly presented at the remote end using a 3D-visualization system. This paper proposes a simple method for real-time transmission of stereo images over the National Computational Science Alliance Access Grid. The method is compatible with existing access grid software and does not require additional bandwidth or major modifications to the coding process. The proposed method is very efficient for stereoscopic video transmission over the Internet. Furthermore, the development of software tools to transmit and receive stereo images over the Internet is presented.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131980673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010503
F. R. Palomo, J. Quero, L. Franquelo
We present experimental measures of the intermodulation distortion in a static stochastic resonator. The dispositive is basically a Heaviside nonlinearity with adjustable threshold fed with a white noise plus a harmonic test signal. In the stochastic resonance regime, we present experimental results demonstrating a linearization effect. These results are important for signal recovery applications in noisy environments.
{"title":"Intermodulation distortion measures in a stochastic resonator","authors":"F. R. Palomo, J. Quero, L. Franquelo","doi":"10.1109/ISCAS.2002.1010503","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010503","url":null,"abstract":"We present experimental measures of the intermodulation distortion in a static stochastic resonator. The dispositive is basically a Heaviside nonlinearity with adjustable threshold fed with a white noise plus a harmonic test signal. In the stochastic resonance regime, we present experimental results demonstrating a linearization effect. These results are important for signal recovery applications in noisy environments.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"243 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132033748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010945
A.J. O'Brien
In the development of a fuzzy logic implementation of a high-order, nonlinear, dynamic muscle model, opportunities continue to arise for the development and verification of other fuzzy implementations, including selected differential calculus and other classical mathematical relationships. The availability of a reliable, accessible, and powerful Generalized Fuzzy Inference Engine (GFIE), developed as part of the fuzzy modeling effort, facilitates the realization of fuzzy implementations such as low-pass filtering. This tool has also facilitated evaluation of fuzzy mathematical operations published in the literature but not always included in fuzzy systems software packages (e.g. MATLAB). Advantages of using fuzzy implementations described herein include robustness to noise and signal uncertainty (e.g. temporary signal drop-out) as well as potential reduction of sampling rates. Noise and parameter sensitivity studies are planned for quantifying these advantages in the setting of the fuzzy muscle model.
{"title":"Fuzzy inference engine provides opportunity for testbed","authors":"A.J. O'Brien","doi":"10.1109/ISCAS.2002.1010945","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010945","url":null,"abstract":"In the development of a fuzzy logic implementation of a high-order, nonlinear, dynamic muscle model, opportunities continue to arise for the development and verification of other fuzzy implementations, including selected differential calculus and other classical mathematical relationships. The availability of a reliable, accessible, and powerful Generalized Fuzzy Inference Engine (GFIE), developed as part of the fuzzy modeling effort, facilitates the realization of fuzzy implementations such as low-pass filtering. This tool has also facilitated evaluation of fuzzy mathematical operations published in the literature but not always included in fuzzy systems software packages (e.g. MATLAB). Advantages of using fuzzy implementations described herein include robustness to noise and signal uncertainty (e.g. temporary signal drop-out) as well as potential reduction of sampling rates. Noise and parameter sensitivity studies are planned for quantifying these advantages in the setting of the fuzzy muscle model.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132117487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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