Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010510
W. Hung, Xiaoyu Song
We address a problem of local variable storage for embedded DSP processors. The objective is to optimally assign local variables on the program stack. We adapt a powerful combinatorial search technique, called scatter search, to this optimization problem. We couple that with a hierarchical search approach that explores the flexibility of the address generation unit and yet focus on a small search space. Empirical results show promising performance compared with previous approaches.
{"title":"On data address computation for embedded DSP systems","authors":"W. Hung, Xiaoyu Song","doi":"10.1109/ISCAS.2002.1010510","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010510","url":null,"abstract":"We address a problem of local variable storage for embedded DSP processors. The objective is to optimally assign local variables on the program stack. We adapt a powerful combinatorial search technique, called scatter search, to this optimization problem. We couple that with a hierarchical search approach that explores the flexibility of the address generation unit and yet focus on a small search space. Empirical results show promising performance compared with previous approaches.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134084230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010231
A. Fettweis, N. Bose
It is proved that the multidimensional differential operator is an annihilator of the adjoint matrix associated with a Jacobian matrix. Some of the consequences of this result for other distinguished matrices are pointed out and its relevance in the derivation of a multidimensional wave digital filter structure from a passive multidimensional Kirchhoff network is confirmed.
{"title":"A property of Jacobian matrices and some of its consequences","authors":"A. Fettweis, N. Bose","doi":"10.1109/ISCAS.2002.1010231","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010231","url":null,"abstract":"It is proved that the multidimensional differential operator is an annihilator of the adjoint matrix associated with a Jacobian matrix. Some of the consequences of this result for other distinguished matrices are pointed out and its relevance in the derivation of a multidimensional wave digital filter structure from a passive multidimensional Kirchhoff network is confirmed.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134242442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010148
M. Fu, O. Au, Wing Cheong Chan
Low-band-shift (LBS) is a very efficient technique to compute and store the wavelet coefficients of all the shifted versions of an image. It makes it possible to perform motion estimation (called LBSME) directly in wavelet domain overcoming the shift variant property of discrete wavelet transform. However, when motion vectors of boundary wavelet blocks point outside the image boundaries, LBSME does not work well. In this paper, we proposed an algorithm called LBSME-SP to combine LBSME with symmetric padding to minimize the effects of boundary discontinuities. Consequently, the LBS structure is modified. Simulation results suggest that the proposed LBSME-SP can give considerable PSNR gain with only minor additional computation.
{"title":"Low-band-shift (LBS) motion estimation with symmetric padding in wavelet domain","authors":"M. Fu, O. Au, Wing Cheong Chan","doi":"10.1109/ISCAS.2002.1010148","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010148","url":null,"abstract":"Low-band-shift (LBS) is a very efficient technique to compute and store the wavelet coefficients of all the shifted versions of an image. It makes it possible to perform motion estimation (called LBSME) directly in wavelet domain overcoming the shift variant property of discrete wavelet transform. However, when motion vectors of boundary wavelet blocks point outside the image boundaries, LBSME does not work well. In this paper, we proposed an algorithm called LBSME-SP to combine LBSME with symmetric padding to minimize the effects of boundary discontinuities. Consequently, the LBS structure is modified. Simulation results suggest that the proposed LBSME-SP can give considerable PSNR gain with only minor additional computation.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134571589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010313
Ki-Hyuk Sung, Byung‐Do Yang, L. Kim
A new interleaved synchronous mirror delay (SMD) is proposed in order to reduce the circuit size. The conventional interleaved SMD has multiple pairs of forward delay array (FDA) and backward delay array (BDA) in order to reduce the clock skew. The proposed interleaved SMD requires one FDA and one BDA by changing the position of MUX. Simulation results show that about 30% power reduction and 40% area reduction are achieved in the proposed interleaved SMD. All circuit simulations and implementations are based on 0.25 /spl mu/m two-metal CMOS technology.
{"title":"Low power clock generator based on an area-reduced interleaved synchronous mirror delay scheme","authors":"Ki-Hyuk Sung, Byung‐Do Yang, L. Kim","doi":"10.1109/ISCAS.2002.1010313","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010313","url":null,"abstract":"A new interleaved synchronous mirror delay (SMD) is proposed in order to reduce the circuit size. The conventional interleaved SMD has multiple pairs of forward delay array (FDA) and backward delay array (BDA) in order to reduce the clock skew. The proposed interleaved SMD requires one FDA and one BDA by changing the position of MUX. Simulation results show that about 30% power reduction and 40% area reduction are achieved in the proposed interleaved SMD. All circuit simulations and implementations are based on 0.25 /spl mu/m two-metal CMOS technology.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134319384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010358
T. Tsai, Chuh-Chu Yen
MP3 is the popular audio coding standard. But now, a new higher quality audio coding standard Advanced Audio Coding (AAC) is proposed and widely used. The quantization/re-quantization is essential in both MP3 and AAC. This paper proposes a new high accuracy estimation algorithm for MP3 and MEPG-4 AAC audio coding. The algorithm can be applied not only for re-quantization process in decoder, but also for quantization in encoder. According to the floating-point behavior description, the proposed algorithm can achieve the lowest error result measured in quantization/re-quantization. Furthermore, in order to maintain the high quality with limited data precision, finite word length for fixed-point effects are investigated. Our algorithm has the low complexity advantages of multiplication-free and low memory requirements which will be more suitable in VLSI design for audio encoder/decoder.
{"title":"A high quality re-quantization/quantization method for MP3 and MPEG-4 AAC audio coding","authors":"T. Tsai, Chuh-Chu Yen","doi":"10.1109/ISCAS.2002.1010358","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010358","url":null,"abstract":"MP3 is the popular audio coding standard. But now, a new higher quality audio coding standard Advanced Audio Coding (AAC) is proposed and widely used. The quantization/re-quantization is essential in both MP3 and AAC. This paper proposes a new high accuracy estimation algorithm for MP3 and MEPG-4 AAC audio coding. The algorithm can be applied not only for re-quantization process in decoder, but also for quantization in encoder. According to the floating-point behavior description, the proposed algorithm can achieve the lowest error result measured in quantization/re-quantization. Furthermore, in order to maintain the high quality with limited data precision, finite word length for fixed-point effects are investigated. Our algorithm has the low complexity advantages of multiplication-free and low memory requirements which will be more suitable in VLSI design for audio encoder/decoder.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131538804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010330
T. Oura, T. Yoneyama, Shashidhar Tantry, H. Asai
In this paper, we propose new bilateral floating resistor circuits having both positive and negative resistance values. The equivalent resistance of this floating resistor in CMOS technology can be changed by using controlled-voltages, which is an advantage over polysilicon or diffused resistor in the integrated circuit. Moreover the characteristics of the proposed circuits are independent of the threshold voltage. We have simulated the proposed circuit by using HSPICE. Finally, we have confirmed that the proposed circuit is useful as an analog component.
{"title":"A threshold voltage independent floating resistor circuit exhibiting both positive and negative resistance values","authors":"T. Oura, T. Yoneyama, Shashidhar Tantry, H. Asai","doi":"10.1109/ISCAS.2002.1010330","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010330","url":null,"abstract":"In this paper, we propose new bilateral floating resistor circuits having both positive and negative resistance values. The equivalent resistance of this floating resistor in CMOS technology can be changed by using controlled-voltages, which is an advantage over polysilicon or diffused resistor in the integrated circuit. Moreover the characteristics of the proposed circuits are independent of the threshold voltage. We have simulated the proposed circuit by using HSPICE. Finally, we have confirmed that the proposed circuit is useful as an analog component.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131555141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010714
S. Leung, Y. Xiong, J. Weng, C. F. So, W. Lau
This paper presents the performance analysis of a recursive least square algorithm with error-saturation in mixture noise. The algorithm is referred to as nonlinear RLS (NRLS). A generalized clipping function is considered for the error-saturation nonlinearity. An improved mean square behavior of NRLS is carried out. It is shown that the theoretical analysis and the simulation results are close to each other. From the analysis, we can relate the convergence and the mean square error in terms of the slope and clipping level of the nonlinear function. Based on the normalized mse, an instrumental variable is derived for yielding a variable clipping function to provide fast convergence and small mean square error.
{"title":"Performance analysis of nonlinear RLS in mixture noise","authors":"S. Leung, Y. Xiong, J. Weng, C. F. So, W. Lau","doi":"10.1109/ISCAS.2002.1010714","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010714","url":null,"abstract":"This paper presents the performance analysis of a recursive least square algorithm with error-saturation in mixture noise. The algorithm is referred to as nonlinear RLS (NRLS). A generalized clipping function is considered for the error-saturation nonlinearity. An improved mean square behavior of NRLS is carried out. It is shown that the theoretical analysis and the simulation results are close to each other. From the analysis, we can relate the convergence and the mean square error in terms of the slope and clipping level of the nonlinear function. Based on the normalized mse, an instrumental variable is derived for yielding a variable clipping function to provide fast convergence and small mean square error.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131636734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1009845
W. Rajan, Quek Boon Seah, Pan Yu Fei
This paper presents the design of a 5V analog buffer capable of driving and receiving voltages in excess of 3.6V using 3.3V 0.35um technology, while meeting the reliability constraints of max Vgs, Vgd, Vds imposed by the technology. This OTA is used in the output driver and filter stage of a 5V Sensor ASIC.
{"title":"A reliable 5V OTA in 3.3V CMOS technology","authors":"W. Rajan, Quek Boon Seah, Pan Yu Fei","doi":"10.1109/ISCAS.2002.1009845","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1009845","url":null,"abstract":"This paper presents the design of a 5V analog buffer capable of driving and receiving voltages in excess of 3.6V using 3.3V 0.35um technology, while meeting the reliability constraints of max Vgs, Vgd, Vds imposed by the technology. This OTA is used in the output driver and filter stage of a 5V Sensor ASIC.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132616592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1010600
A. Chihoub, Z. B. Miled
Detecting human sleep is an area of active research. At Siemens Corporate Research Inc., a method to track human eyes in a sequence of images was developed. The method is used to detect when the subject is on the verge of sleep. A key component of the methodology is a filter used to isolate the eyes. In this paper, the algorithm, architecture and implementation of this filter is presented. The implementation of the filter is based on field programmable gate arrays from Xilinx.
探测人类睡眠是一个活跃的研究领域。西门子企业研究公司(Siemens Corporate Research Inc.)开发了一种通过一系列图像跟踪人眼的方法。该方法用于检测受试者何时处于睡眠的边缘。该方法的一个关键组成部分是用来隔离眼睛的过滤器。本文给出了该滤波器的算法、结构和实现。滤波器的实现基于Xilinx的现场可编程门阵列。
{"title":"Architectural support for detection of sleepy eye behavior","authors":"A. Chihoub, Z. B. Miled","doi":"10.1109/ISCAS.2002.1010600","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1010600","url":null,"abstract":"Detecting human sleep is an area of active research. At Siemens Corporate Research Inc., a method to track human eyes in a sequence of images was developed. The method is used to detect when the subject is on the verge of sleep. A key component of the methodology is a filter used to isolate the eyes. In this paper, the algorithm, architecture and implementation of this filter is presented. The implementation of the filter is based on field programmable gate arrays from Xilinx.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"138 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128928066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ISCAS.2002.1009848
Lihong Zhang, U. Kleine
This paper presents a novel approach to analog module placement with the combination of genetic algorithm and simulated annealing. The approach is based on the bottom-left relative placement represented by binary tree. It is superior to the other three approaches which were implemented with pure simulated annealing or genetic algorithms. A fractional factorial experiment was conducted using an orthogonal array to study the algorithm parameters. A meta-GA was applied to determine the exact parameter values. The dedicated cost function covers the special requirements of analog integrated circuits. The experimental results show this promising algorithm makes the best performance with the least mean cost and standard deviation over all the other compared approaches.
{"title":"A genetic approach to analog module placement with simulated annealing","authors":"Lihong Zhang, U. Kleine","doi":"10.1109/ISCAS.2002.1009848","DOIUrl":"https://doi.org/10.1109/ISCAS.2002.1009848","url":null,"abstract":"This paper presents a novel approach to analog module placement with the combination of genetic algorithm and simulated annealing. The approach is based on the bottom-left relative placement represented by binary tree. It is superior to the other three approaches which were implemented with pure simulated annealing or genetic algorithms. A fractional factorial experiment was conducted using an orthogonal array to study the algorithm parameters. A meta-GA was applied to determine the exact parameter values. The dedicated cost function covers the special requirements of analog integrated circuits. The experimental results show this promising algorithm makes the best performance with the least mean cost and standard deviation over all the other compared approaches.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"132 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130861727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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