Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569241
Seunghyeon Rhee, Yong-Kyu Kim, Hyun Meen Jung, Kyu Tae Park
A modified uniform quantizer which gives better performance at low bit rates is introduced. Two other uniform quantizers are also analyzed in terms of rate-distortion characteristics. It is verified that better rate-distortion characteristics are obtained by using decision levels shifted from the midpoints of quantization intervals. The new decision levels give the optimum round off thresholds. Experimental results show that, applying Laplacian input source, the SNR is improved by 0.87 dB at 0.8 bits/sample compared with a widely used uniform quantizer.
{"title":"A uniform reconstruction level quantizer with improved performance at low bit rates","authors":"Seunghyeon Rhee, Yong-Kyu Kim, Hyun Meen Jung, Kyu Tae Park","doi":"10.1109/APCAS.1996.569241","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569241","url":null,"abstract":"A modified uniform quantizer which gives better performance at low bit rates is introduced. Two other uniform quantizers are also analyzed in terms of rate-distortion characteristics. It is verified that better rate-distortion characteristics are obtained by using decision levels shifted from the midpoints of quantization intervals. The new decision levels give the optimum round off thresholds. Experimental results show that, applying Laplacian input source, the SNR is improved by 0.87 dB at 0.8 bits/sample compared with a widely used uniform quantizer.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78836120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569334
J. Paik, K. P. Hong, J. Paik, J. Hwang
In the present paper we propose an image sequence interpolation algorithm for improving the resolution of the magnified image. The proposed algorithm can be divided by two parts. The first main processing part is to overcome the limits of existing still image interpolation by using image sequences and is composed of motion estimation, image registration, and image interpolation. The second post processing part is to remove the artifacts in the interpolated image due to main processing by a directionally adaptive filtering. It is demonstrated that the proposed algorithm can be the theoretical bases for interpolation of dynamic image sequences, and experimental results of the proposed algorithm are also presented.
{"title":"Image sequence interpolation for improving the resolution of the magnified image","authors":"J. Paik, K. P. Hong, J. Paik, J. Hwang","doi":"10.1109/APCAS.1996.569334","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569334","url":null,"abstract":"In the present paper we propose an image sequence interpolation algorithm for improving the resolution of the magnified image. The proposed algorithm can be divided by two parts. The first main processing part is to overcome the limits of existing still image interpolation by using image sequences and is composed of motion estimation, image registration, and image interpolation. The second post processing part is to remove the artifacts in the interpolated image due to main processing by a directionally adaptive filtering. It is demonstrated that the proposed algorithm can be the theoretical bases for interpolation of dynamic image sequences, and experimental results of the proposed algorithm are also presented.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87660429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569228
Min-seop Jeong, Seehyun Kim, Jongseo Sohn, Wonyong Sung
A set of internal wordlengths for implementing an MPEG-2 audio decoder has been determined to minimize the hardware cost while limiting the fixed-point noise to be below the perceptual masking curve. The hardware architecture is based on a data path containing a multiplier and an adder. The finite wordlength effects of three DCT algorithms for the efficient implementation of the subband filtering are also compared. For the bit-accurate fixed-point simulation, the fixed-point optimization utility, which has been developed for the rapid evaluation of finite wordlength effects, is used.
{"title":"Wordlength optimization of an MPEG-2 audio decoder","authors":"Min-seop Jeong, Seehyun Kim, Jongseo Sohn, Wonyong Sung","doi":"10.1109/APCAS.1996.569228","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569228","url":null,"abstract":"A set of internal wordlengths for implementing an MPEG-2 audio decoder has been determined to minimize the hardware cost while limiting the fixed-point noise to be below the perceptual masking curve. The hardware architecture is based on a data path containing a multiplier and an adder. The finite wordlength effects of three DCT algorithms for the efficient implementation of the subband filtering are also compared. For the bit-accurate fixed-point simulation, the fixed-point optimization utility, which has been developed for the rapid evaluation of finite wordlength effects, is used.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86169020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569327
Chin-Fong Chiu, Chung-Yu Wu
A new rotation-invariant pattern recognition system is proposed and analyzed. In this system, silicon retina cells capable of image sensing and edge extraction are used so that the system can directly process images from the real world without an extra edge detector. The rotation-invariant discrete correlation function is modified and implemented in the silicon retina structure by using current summation. Simulation results have verified the correct function of the proposed system. Moreover, an experimental chip to implement the proposed system with a 32/spl times/32 cell array has been designed and fabricated in a 0.8 /spl mu/m N-well CMOS process. Experimental results have successfully shown that the system works well for arbitrary orientation pattern recognition.
{"title":"CMOS rotation-invariant pattern recognition system","authors":"Chin-Fong Chiu, Chung-Yu Wu","doi":"10.1109/APCAS.1996.569327","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569327","url":null,"abstract":"A new rotation-invariant pattern recognition system is proposed and analyzed. In this system, silicon retina cells capable of image sensing and edge extraction are used so that the system can directly process images from the real world without an extra edge detector. The rotation-invariant discrete correlation function is modified and implemented in the silicon retina structure by using current summation. Simulation results have verified the correct function of the proposed system. Moreover, an experimental chip to implement the proposed system with a 32/spl times/32 cell array has been designed and fabricated in a 0.8 /spl mu/m N-well CMOS process. Experimental results have successfully shown that the system works well for arbitrary orientation pattern recognition.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85225874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569245
Eunyong Ha, Yanghee Choi, Chongsang Kim
With the increase of the mobile user population and the advance of wireless technology, cell size becomes smaller. This smaller cell size causes frequent handoffs between cells, so a new handoff method is needed in order to provide the user with the seamless connection service. In this paper, we propose a handoff method which is fit for the picocellular networks the cell size of which is the order of ten meters or more. We call this method SGMH (SubGroup Multicast-based Handoff). Since SGMH considers the MH speed and the distance from the MH's current location to the candidate handoff cells, on selecting the multicast subgroups, it reduces the buffer overhead which is the main drawback of multicast-based handoff. We evaluated the performance of SGMH through the analysis and simulation of the traffic of handoff requests. Simulation results show that the reduction of buffer overhead decreases the blocking probability of handoff requests. We believe that SGMH will be applied for the time constraint service area such as audio and video related applications.
{"title":"A multicast-based handoff for seamless connection in picocellular networks","authors":"Eunyong Ha, Yanghee Choi, Chongsang Kim","doi":"10.1109/APCAS.1996.569245","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569245","url":null,"abstract":"With the increase of the mobile user population and the advance of wireless technology, cell size becomes smaller. This smaller cell size causes frequent handoffs between cells, so a new handoff method is needed in order to provide the user with the seamless connection service. In this paper, we propose a handoff method which is fit for the picocellular networks the cell size of which is the order of ten meters or more. We call this method SGMH (SubGroup Multicast-based Handoff). Since SGMH considers the MH speed and the distance from the MH's current location to the candidate handoff cells, on selecting the multicast subgroups, it reduces the buffer overhead which is the main drawback of multicast-based handoff. We evaluated the performance of SGMH through the analysis and simulation of the traffic of handoff requests. Simulation results show that the reduction of buffer overhead decreases the blocking probability of handoff requests. We believe that SGMH will be applied for the time constraint service area such as audio and video related applications.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73446444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569290
J. I. Moon, Sang Ku Kim, J. Paik, M. Kang
The goal of image restoration is to reconstruct the original image from a degraded model. This recovery process is very important in many image processing applications. In the present paper we propose two methods which improve the conventional iterative restoration algorithms. One is to accelerate convergence of the steepest descent method using the improved search directions. The other accelerates convergence by using preconditioners. It is also shown that the proposed preconditioned algorithm can accelerate iteration-adaptive iterative image restoration algorithm. The preconditioner in the proposed algorithm can be implemented by using the FIR filter structure, so it can be applied to practical application with manageable amounts of computation.
{"title":"Fast iterative image restoration algorithms","authors":"J. I. Moon, Sang Ku Kim, J. Paik, M. Kang","doi":"10.1109/APCAS.1996.569290","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569290","url":null,"abstract":"The goal of image restoration is to reconstruct the original image from a degraded model. This recovery process is very important in many image processing applications. In the present paper we propose two methods which improve the conventional iterative restoration algorithms. One is to accelerate convergence of the steepest descent method using the improved search directions. The other accelerates convergence by using preconditioners. It is also shown that the proposed preconditioned algorithm can accelerate iteration-adaptive iterative image restoration algorithm. The preconditioner in the proposed algorithm can be implemented by using the FIR filter structure, so it can be applied to practical application with manageable amounts of computation.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73112357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569278
G. Hellestrand
The architecture of a CPU capable of both executing multithreaded user processes in a commercial multi-threaded operating system environment and rapidly (sub microsecond) responding to real-time events, such as those that arise in the processing and synchronization of audio-video-data streams constituting concurrent interactive multi-media sessions, is discussed in this paper. The rapid, often simple, responses of a CPU to prioritized requests requires careful design of the on chip caches and registers and management of the hazards causing latencies in the CPU pipeline. The novel incorporation of a register cache in the CPU, its design, and the design of the instruction and data caches is described.
{"title":"VLSI register, instruction and data caches suited to on chip CPU multi-threading support for real-time multi-media applications","authors":"G. Hellestrand","doi":"10.1109/APCAS.1996.569278","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569278","url":null,"abstract":"The architecture of a CPU capable of both executing multithreaded user processes in a commercial multi-threaded operating system environment and rapidly (sub microsecond) responding to real-time events, such as those that arise in the processing and synchronization of audio-video-data streams constituting concurrent interactive multi-media sessions, is discussed in this paper. The rapid, often simple, responses of a CPU to prioritized requests requires careful design of the on chip caches and registers and management of the hazards causing latencies in the CPU pipeline. The novel incorporation of a register cache in the CPU, its design, and the design of the instruction and data caches is described.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84601173","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569286
Sook-Jin Lee, H. Um, Soon-Young Lim, Woo-Gu Park
This paper describes an adaptive anti-jamming algorithm in DS-CDMA cellular system. The proposed algorithm consists of detection, verification and control modules. The detection module is based on the investigation of user's Eb/Mo received at the channel element (CE) of Base Station (BS) for finding a jamming mobile station (MS) when all the SNRs of the mobile stations are greater than a threshold. In order to find the jamming MS in which the mean of received Eb/No is less than 8.5 dB, the verification module is based on transmitting the decreased power control bit to the MS. The control module is based on the disconnection of active call of jamming MS. As a result, we can find a jamming MS using the adaptive anti-jamming algorithm in DS-CDMA cellular system and prevent the coverage of cell from shrinking due to the jamming MS and decrease the load of system by hand-off.
{"title":"Adaptive anti-jamming algorithm in DS-CDMA cellular system","authors":"Sook-Jin Lee, H. Um, Soon-Young Lim, Woo-Gu Park","doi":"10.1109/APCAS.1996.569286","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569286","url":null,"abstract":"This paper describes an adaptive anti-jamming algorithm in DS-CDMA cellular system. The proposed algorithm consists of detection, verification and control modules. The detection module is based on the investigation of user's Eb/Mo received at the channel element (CE) of Base Station (BS) for finding a jamming mobile station (MS) when all the SNRs of the mobile stations are greater than a threshold. In order to find the jamming MS in which the mean of received Eb/No is less than 8.5 dB, the verification module is based on transmitting the decreased power control bit to the MS. The control module is based on the disconnection of active call of jamming MS. As a result, we can find a jamming MS using the adaptive anti-jamming algorithm in DS-CDMA cellular system and prevent the coverage of cell from shrinking due to the jamming MS and decrease the load of system by hand-off.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82121349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569212
Ching-Chao Yang, C. Jen, Tian-Sheuan Chang
In this paper, we proposed a new algorithm based on Montgomery's algorithm to calculate modular multiplication that is the core arithmetic operation in RSA cryptosystem. Since the critical path delay in modular multiplication operation is reduced, the new design yields a very fast implementation. We have implemented a 512-bit single chip RSA processor based on our modified algorithm with Compass 0.6 /spl mu/m SPDM cell library. By our modified modular exponentiation algorithm, it takes about 1.5 n/sup 2/ clock cycles to finish one n-bit RSA modular exponentiation operation in our architecture. The simulation results show that we can operate up to 125 Mhz, therefore the baud rate of our 512-bit RSA processor is about 164 k bits/sec.
{"title":"The IC design of a high speed RSA processor","authors":"Ching-Chao Yang, C. Jen, Tian-Sheuan Chang","doi":"10.1109/APCAS.1996.569212","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569212","url":null,"abstract":"In this paper, we proposed a new algorithm based on Montgomery's algorithm to calculate modular multiplication that is the core arithmetic operation in RSA cryptosystem. Since the critical path delay in modular multiplication operation is reduced, the new design yields a very fast implementation. We have implemented a 512-bit single chip RSA processor based on our modified algorithm with Compass 0.6 /spl mu/m SPDM cell library. By our modified modular exponentiation algorithm, it takes about 1.5 n/sup 2/ clock cycles to finish one n-bit RSA modular exponentiation operation in our architecture. The simulation results show that we can operate up to 125 Mhz, therefore the baud rate of our 512-bit RSA processor is about 164 k bits/sec.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83770960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-11-18DOI: 10.1109/APCAS.1996.569283
T. Kabasawa, M. Sengoku
In a cellular mobile communication system, a service area is divided into a number of cells for efficient use of channels. It is necessary to consider the intercell vehicle movement for analyzing traffic performance of such a cellular mobile communication system. This paper presents a theoretical performance evaluation of a band-shaped service area when the traffic offered to a specific cell is bigger than other cells. Furthermore, the characteristics of mobile communication traffic are analyzed when the length of the cell is different from other cells. Through the comparison of theoretical and simulation results, the validity of the theoretical results has been shown.
{"title":"Characteristics of mobile communication traffic considering the vehicle movement in a band-shaped service area","authors":"T. Kabasawa, M. Sengoku","doi":"10.1109/APCAS.1996.569283","DOIUrl":"https://doi.org/10.1109/APCAS.1996.569283","url":null,"abstract":"In a cellular mobile communication system, a service area is divided into a number of cells for efficient use of channels. It is necessary to consider the intercell vehicle movement for analyzing traffic performance of such a cellular mobile communication system. This paper presents a theoretical performance evaluation of a band-shaped service area when the traffic offered to a specific cell is bigger than other cells. Furthermore, the characteristics of mobile communication traffic are analyzed when the length of the cell is different from other cells. Through the comparison of theoretical and simulation results, the validity of the theoretical results has been shown.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76359762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：