Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003192
C.-S. Choi, G. Cha, Hyun-Soon Kang, C. Song
A Hall effect sensor using a 7 /spl mu/m, 1.7 /spl Omega/-cm bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes, to optimize offset voltage and sensitivity for proper applications. In order to measure offset voltage at chip scale, the Agilent 4156C and nano-voltage meter were used and the best structure in offset voltage terms was finally selected by using a ceramic package. The patterns appear to be quadri-rectangular patterns entirely and three-parallelogram patterns. The measured offset voltages were found to be about 173/spl sim/365 /spl mu/V. Meanwhile, in the offset voltage, the standard deviation of the measured values is more important than the average value itself because the unfavorable offset voltages due to mainly misalignment between PISO and N+CONT can be easily overcome by the Hall IC fabrication with compensated processing circuitry. The standard deviation ranges from 78 to 188. The measured misalignment is about 0.32 /spl mu/m. After measuring the offset voltages, we checked the sensitivity by using the Lakeshore electromagnetic field measurement tool. We selected the best patterns for the sensitivity. The measured sensitivities are about 11/spl sim/18 mV/gauss. Furthermore, thermal drift was measured with increasing temperature and the values showed linearity ranging from 0 /spl deg/C to 120 /spl deg/C.
{"title":"Design parameter optimization for Hall sensor application","authors":"C.-S. Choi, G. Cha, Hyun-Soon Kang, C. Song","doi":"10.1109/MIEL.2002.1003192","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003192","url":null,"abstract":"A Hall effect sensor using a 7 /spl mu/m, 1.7 /spl Omega/-cm bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes, to optimize offset voltage and sensitivity for proper applications. In order to measure offset voltage at chip scale, the Agilent 4156C and nano-voltage meter were used and the best structure in offset voltage terms was finally selected by using a ceramic package. The patterns appear to be quadri-rectangular patterns entirely and three-parallelogram patterns. The measured offset voltages were found to be about 173/spl sim/365 /spl mu/V. Meanwhile, in the offset voltage, the standard deviation of the measured values is more important than the average value itself because the unfavorable offset voltages due to mainly misalignment between PISO and N+CONT can be easily overcome by the Hall IC fabrication with compensated processing circuitry. The standard deviation ranges from 78 to 188. The measured misalignment is about 0.32 /spl mu/m. After measuring the offset voltages, we checked the sensitivity by using the Lakeshore electromagnetic field measurement tool. We selected the best patterns for the sensitivity. The measured sensitivities are about 11/spl sim/18 mV/gauss. Furthermore, thermal drift was measured with increasing temperature and the values showed linearity ranging from 0 /spl deg/C to 120 /spl deg/C.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133036607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003206
Kh. Khudaverdyan, H. Harutyunyan
The silicide-silicon-silicide type photoreceiving structures recrystallized by laser, currently studied differ efficiently from conventional photoreceivers in their multifunctional operation. In them, the photosensitivity can be controlled by the external voltage and the device can be used as a zero frequency gauge due to dependence of the photocurrent on the external voltage of the mark shift point. This work is the first to investigate the influence of the photoemission from the contact on the spectral characteristics of the afore-mentioned structures.
{"title":"Study of photo-emission current impact on spectral characteristics of double barrier photo-receiving structure [NiSi-Si-TiSi/sub 2/]","authors":"Kh. Khudaverdyan, H. Harutyunyan","doi":"10.1109/MIEL.2002.1003206","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003206","url":null,"abstract":"The silicide-silicon-silicide type photoreceiving structures recrystallized by laser, currently studied differ efficiently from conventional photoreceivers in their multifunctional operation. In them, the photosensitivity can be controlled by the external voltage and the device can be used as a zero frequency gauge due to dependence of the photocurrent on the external voltage of the mark shift point. This work is the first to investigate the influence of the photoemission from the contact on the spectral characteristics of the afore-mentioned structures.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131811739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003200
N. Dmitruk, O. I. Mayeva, S. Mamykin, I. Mamontova, V. I. Min’ko, O. Yastrubchak
The paper is devoted to elaboration of an advanced polaritonic photodetector based on the metal (Au or Al)/semiconductor (GaAs or InP) surface barrier heterostructures (SBH). A basic principle underlying the device operation is surface plasmon resonance (SPR) in a SBH with the microrelief (quasigrating, grating and bigrating) at the interface. Influence of the microstructure of continuous metal films and of island films on the efficiency of photodetectors is also investigated.
{"title":"New advanced polaritonic photodetector on base of surface barrier structure","authors":"N. Dmitruk, O. I. Mayeva, S. Mamykin, I. Mamontova, V. I. Min’ko, O. Yastrubchak","doi":"10.1109/MIEL.2002.1003200","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003200","url":null,"abstract":"The paper is devoted to elaboration of an advanced polaritonic photodetector based on the metal (Au or Al)/semiconductor (GaAs or InP) surface barrier heterostructures (SBH). A basic principle underlying the device operation is surface plasmon resonance (SPR) in a SBH with the microrelief (quasigrating, grating and bigrating) at the interface. Influence of the microstructure of continuous metal films and of island films on the efficiency of photodetectors is also investigated.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122412147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003369
S. Mileusnic, M. Zivanov, P. Habaš
Charge build-up and generation of interface states are the most important degradation factors in metal-oxide-semiconductor devices. Traditional methods to determine the radiation hardness of MOS structures require destructive testing. In this study we performed tests for commercial power MOSFET characterization by means of generally adopted methods like charge pumping (CP), I-V and split C-V techniques. Results of measurements confirm theoretical expectations but some unexpected effects also occurred.
{"title":"A study of irradiation damage in commercial power MOSFETs by means of split C-V and conventional methods","authors":"S. Mileusnic, M. Zivanov, P. Habaš","doi":"10.1109/MIEL.2002.1003369","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003369","url":null,"abstract":"Charge build-up and generation of interface states are the most important degradation factors in metal-oxide-semiconductor devices. Traditional methods to determine the radiation hardness of MOS structures require destructive testing. In this study we performed tests for commercial power MOSFET characterization by means of generally adopted methods like charge pumping (CP), I-V and split C-V techniques. Results of measurements confirm theoretical expectations but some unexpected effects also occurred.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122417573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003213
N. Turmezei, Á. Nemcsics
The Cd/sub 4/GeSe/sub 6/ crystal has a great importance in the respect of electrochemical solar cell application. In this work the properties of the junction of Cd/sub 4/GeSe/sub 6/ crystal electrolyte are investigated with impedance analysis. The electrical parameters of the junction are very important to know for device applications which are determined in this work.
{"title":"Modelling of Cd/sub 4/GeSe/sub 6/ crystal-electrolyte junction for electrochemical solar cell purposes","authors":"N. Turmezei, Á. Nemcsics","doi":"10.1109/MIEL.2002.1003213","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003213","url":null,"abstract":"The Cd/sub 4/GeSe/sub 6/ crystal has a great importance in the respect of electrochemical solar cell application. In this work the properties of the junction of Cd/sub 4/GeSe/sub 6/ crystal electrolyte are investigated with impedance analysis. The electrical parameters of the junction are very important to know for device applications which are determined in this work.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122540107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003334
A. Jutman, J. Raik, R. Ubar
Logic-level simulation is still one of the most often used operations on digital designs during both design and test stages. This makes it a critical issue affecting the overall cost of a project. In this paper we investigate and show the origins of common advantages of four recently proposed efficient simulation methods of different classes: logic simulation, multi-valued simulation, timing simulation, and fault simulation. Described advantages became possible due to use of a highly efficient model called Structurally Synthesized Binary Decision Diagrams (SSBDD). This very compact model preserves the structural information about the modeled circuit and utilizes circuit partitioning into a set of macros represented each by its own SSBDD. All this makes the SSBDD model a good choice as a logic-level digital design representation. The analysis is made on the basis of experimental data acquired using ISCAS'85 benchmark circuits.
{"title":"On efficient logic-level simulation of digital circuits represented by the SSBDD model","authors":"A. Jutman, J. Raik, R. Ubar","doi":"10.1109/MIEL.2002.1003334","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003334","url":null,"abstract":"Logic-level simulation is still one of the most often used operations on digital designs during both design and test stages. This makes it a critical issue affecting the overall cost of a project. In this paper we investigate and show the origins of common advantages of four recently proposed efficient simulation methods of different classes: logic simulation, multi-valued simulation, timing simulation, and fault simulation. Described advantages became possible due to use of a highly efficient model called Structurally Synthesized Binary Decision Diagrams (SSBDD). This very compact model preserves the structural information about the modeled circuit and utilizes circuit partitioning into a set of macros represented each by its own SSBDD. All this makes the SSBDD model a good choice as a logic-level digital design representation. The analysis is made on the basis of experimental data acquired using ISCAS'85 benchmark circuits.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122540593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003224
O. I. Vlasenko, Z. Vlasenko, P. E. Mozol'
Electron-probe methods have been used to study the evolution of the topology of near-surface macroscopic growth defects and macroscopic defects introduced by mechanical processing in Cd/sub x/Hg/sub 1-x/Te (x = 0.2) crystals (CMT crystals). When the samples were stored for a long time, the formation of inclusions saturated with mercury or tellurium was observed in the region of the macroscopic defects. The effective self-diffusion coefficients of mercury, estimated from the growth rate of the mercury inclusions at their formation stage, exceeded those known from the literature. The possible causes of such a discrepancy are discussed; they are connected, in particular, with the fact that the mass-transfer process involves internal elastic stresses that arise when the surface is mechanically processed, when diffusional fluxes that differ in their mechanisms are applied, etc.
{"title":"Appearance of enriched Hg regions in solid state in CdHgTe crystals","authors":"O. I. Vlasenko, Z. Vlasenko, P. E. Mozol'","doi":"10.1109/MIEL.2002.1003224","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003224","url":null,"abstract":"Electron-probe methods have been used to study the evolution of the topology of near-surface macroscopic growth defects and macroscopic defects introduced by mechanical processing in Cd/sub x/Hg/sub 1-x/Te (x = 0.2) crystals (CMT crystals). When the samples were stored for a long time, the formation of inclusions saturated with mercury or tellurium was observed in the region of the macroscopic defects. The effective self-diffusion coefficients of mercury, estimated from the growth rate of the mercury inclusions at their formation stage, exceeded those known from the literature. The possible causes of such a discrepancy are discussed; they are connected, in particular, with the fact that the mass-transfer process involves internal elastic stresses that arise when the surface is mechanically processed, when diffusional fluxes that differ in their mechanisms are applied, etc.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122545817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003335
Dejan Stefanovic, M. Sokolovic, P. Petkovic, V. Litovski
Tanner Tools system (TTS) is a very useful tool for design automation. However, during the layout verification phase, the overall circuit is flattened and only transistor level simulation by TSpice simulator is possible. Obviously, this is not convenient especially regarding large digital or mixed circuits. Therefore, this paper describes a methodology for joint simulation based on Alecsis mixed-mode circuit simulator. The method is described on example of 64-level Calibrated Current-steering DAC.
{"title":"TSpice-Alecsis co-simulation","authors":"Dejan Stefanovic, M. Sokolovic, P. Petkovic, V. Litovski","doi":"10.1109/MIEL.2002.1003335","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003335","url":null,"abstract":"Tanner Tools system (TTS) is a very useful tool for design automation. However, during the layout verification phase, the overall circuit is flattened and only transistor level simulation by TSpice simulator is possible. Obviously, this is not convenient especially regarding large digital or mixed circuits. Therefore, this paper describes a methodology for joint simulation based on Alecsis mixed-mode circuit simulator. The method is described on example of 64-level Calibrated Current-steering DAC.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124004129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003318
V. Litvinov, K. D. Demakov, O. A. Agueev, A. M. Svetlichnyi, R. Konakova, P. Lytvyn, V. V. Milenin
Studied the effect of rapid thermal annealing (RTA) on the parameters of diode structures with Ni-n-SiC-21R(0001) and Ni-n-SiC-21R(0001~) Schottky barriers. Ohmic contacts to these structures were formed by nickel resistive sputtering onto the substrate (heated up to 300/spl deg/C) followed with fusion at T = 450/spl deg/C for 10 min. It was shown that one can, in principle, obtain Ni-n-SiC diode structures (formed at Si- and C-faces of SiC-21R polytype) that are heat-tolerant up to 450/spl deg/C.
{"title":"Influence of rapid thermal annealing modes on the parameters of Ni/21R-SiC contacts","authors":"V. Litvinov, K. D. Demakov, O. A. Agueev, A. M. Svetlichnyi, R. Konakova, P. Lytvyn, V. V. Milenin","doi":"10.1109/MIEL.2002.1003318","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003318","url":null,"abstract":"Studied the effect of rapid thermal annealing (RTA) on the parameters of diode structures with Ni-n-SiC-21R(0001) and Ni-n-SiC-21R(0001~) Schottky barriers. Ohmic contacts to these structures were formed by nickel resistive sputtering onto the substrate (heated up to 300/spl deg/C) followed with fusion at T = 450/spl deg/C for 10 min. It was shown that one can, in principle, obtain Ni-n-SiC diode structures (formed at Si- and C-faces of SiC-21R polytype) that are heat-tolerant up to 450/spl deg/C.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127744720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/MIEL.2002.1003221
D. Todorović, M. Smiljanić
The spectral and dynamic characteristics of surface energy states on Si wafers are investigated by photoacoustic (PA) spectroscopy. The PA spectra were measured as a function of the wavelength and modulation frequency of the excitation optical beam by a PA spectrometer. The PA amplitude spectra of Si samples (n-Si wafer, 500 /spl Omega/cm) with various surface qualities were studied at room temperature in the optical energy beam excitation range from 0.7 to 1.5 eV and for various modulation frequencies (10, 40 and 160 Hz). The different PA amplitude spectra of incoming Si wafers and Si wafers with mechanically roughened surfaces, for various modulation frequencies, indicate the energy distribution and the dynamics of the surface electronic states (SES).
{"title":"Investigation of surface energy states on Si by photoacoustic spectroscopy","authors":"D. Todorović, M. Smiljanić","doi":"10.1109/MIEL.2002.1003221","DOIUrl":"https://doi.org/10.1109/MIEL.2002.1003221","url":null,"abstract":"The spectral and dynamic characteristics of surface energy states on Si wafers are investigated by photoacoustic (PA) spectroscopy. The PA spectra were measured as a function of the wavelength and modulation frequency of the excitation optical beam by a PA spectrometer. The PA amplitude spectra of Si samples (n-Si wafer, 500 /spl Omega/cm) with various surface qualities were studied at room temperature in the optical energy beam excitation range from 0.7 to 1.5 eV and for various modulation frequencies (10, 40 and 160 Hz). The different PA amplitude spectra of incoming Si wafers and Si wafers with mechanically roughened surfaces, for various modulation frequencies, indicate the energy distribution and the dynamics of the surface electronic states (SES).","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121039633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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