Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785953
I. Adesida, A. Mahajan, G. Cueva
Processes for the monolithic integration of enhancement- and depletion-mode HEMTs (E/D-HEMTs) in the lattice matched InP material system are described. Using the buried Pt gate technology, 0.3 /spl mu/m gate-length E-HEMTs exhibiting a threshold voltage of +167 mV and a maximum extrinsic transconductance, g/sub mext/, of 700 mS/mm are demonstrated. D-HEMTs with corresponding device parameters of -443 mV and 462 mS/mm are presented. Unity current gain cut-off frequencies of-over 95 GHz were obtained for these devices. Implementation of a divide-by-four prescaler in the direct coupled FET logic technology based on E- and D-HEMTs is demonstrated.
{"title":"InP-based HEMTs for high speed, low power circuit applications","authors":"I. Adesida, A. Mahajan, G. Cueva","doi":"10.1109/ICSICT.1998.785953","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785953","url":null,"abstract":"Processes for the monolithic integration of enhancement- and depletion-mode HEMTs (E/D-HEMTs) in the lattice matched InP material system are described. Using the buried Pt gate technology, 0.3 /spl mu/m gate-length E-HEMTs exhibiting a threshold voltage of +167 mV and a maximum extrinsic transconductance, g/sub mext/, of 700 mS/mm are demonstrated. D-HEMTs with corresponding device parameters of -443 mV and 462 mS/mm are presented. Unity current gain cut-off frequencies of-over 95 GHz were obtained for these devices. Implementation of a divide-by-four prescaler in the direct coupled FET logic technology based on E- and D-HEMTs is demonstrated.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132355296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786439
Jeng-Hua Wei, Si‐Chen Lee
In order to reduce the bias-induced degradation in hydrogenated amorphous silicon thin film transistors (a-Si:H TFT), a deuterated amorphous silicon layer prepared by deuterium plasma treatment is used as the active layer. It is demonstrated that the stability, i.e., the shifts of threshold voltage and subthreshold swing, of deuterated amorphous silicon thin film transistor can be indeed improved as compared to the hydrogenated ones. This result is consistent with the improvement of the light-induced degradation in deuterated amorphous silicon films and this improvement can be explained by the efficient coupling between Si-D wagging mode and amorphous silicon phonon mode.
{"title":"The improved stability of deuterated amorphous silicon thin film transistor","authors":"Jeng-Hua Wei, Si‐Chen Lee","doi":"10.1109/ICSICT.1998.786439","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786439","url":null,"abstract":"In order to reduce the bias-induced degradation in hydrogenated amorphous silicon thin film transistors (a-Si:H TFT), a deuterated amorphous silicon layer prepared by deuterium plasma treatment is used as the active layer. It is demonstrated that the stability, i.e., the shifts of threshold voltage and subthreshold swing, of deuterated amorphous silicon thin film transistor can be indeed improved as compared to the hydrogenated ones. This result is consistent with the improvement of the light-induced degradation in deuterated amorphous silicon films and this improvement can be explained by the efficient coupling between Si-D wagging mode and amorphous silicon phonon mode.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114166264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785822
H. Jia, Xiaojun Jin, Jinshu Zhang, Pei-yi Chen, P. Tsien
Ultra High Vacuum Chemical Vapor Deposition (UHV/CVD) is carried out to deposit silicon. The deposition is carried out in the temperature range of 550 to 800/spl deg/C. Electrochemical etching is used to test the defects in epitaxial films. Two different ways of etching were performed to validate the thin film etching. The results is almost the same. The defects are visible by the microscope at about 600/spl times/. It is found that the film quality is good in two extreme temperature ranges, i.e. 500 to 700/spl deg/C and above 750/spl deg/C, which was also observed by other authors. The defect density is estimated to be in the order of 10/sup 6/ to 10/sup 8/ cm/sup -2/, including line defects, even micro-defects because of the poor environment cleanliness.
{"title":"Electrochemical etching used on UHV/CVD epitaxial thin films","authors":"H. Jia, Xiaojun Jin, Jinshu Zhang, Pei-yi Chen, P. Tsien","doi":"10.1109/ICSICT.1998.785822","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785822","url":null,"abstract":"Ultra High Vacuum Chemical Vapor Deposition (UHV/CVD) is carried out to deposit silicon. The deposition is carried out in the temperature range of 550 to 800/spl deg/C. Electrochemical etching is used to test the defects in epitaxial films. Two different ways of etching were performed to validate the thin film etching. The results is almost the same. The defects are visible by the microscope at about 600/spl times/. It is found that the film quality is good in two extreme temperature ranges, i.e. 500 to 700/spl deg/C and above 750/spl deg/C, which was also observed by other authors. The defect density is estimated to be in the order of 10/sup 6/ to 10/sup 8/ cm/sup -2/, including line defects, even micro-defects because of the poor environment cleanliness.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114094163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785972
Shi Yan-li, Shen Guang-di, Wu Xing-hui, Feng Wen-Qing, Chen Tie-Jin
Instead of anodization, photochemical oxidation is used to perform the surface passivation of n-type mercury cadmium tellurium (HgCdTe) photoconductance detectors for the first time. X-ray photoelectron spectroscopy (XPS) is used to analyze the influence of the oxidation condition on the oxidation reaction. The passivation mechanism of photochemical oxidation is also studied. Comparing of the performances of the two kinds of detectors with each other, which were prepared under the same technique conditions by the anodization and the photochemical oxidation respectively, it shows that the results of photochemical oxidation is slightly superior to that of anodic oxidation.
{"title":"Study and mechanism analysis of photochemical oxidation for n-type mercury cadmium tellurium photoconductance detectors","authors":"Shi Yan-li, Shen Guang-di, Wu Xing-hui, Feng Wen-Qing, Chen Tie-Jin","doi":"10.1109/ICSICT.1998.785972","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785972","url":null,"abstract":"Instead of anodization, photochemical oxidation is used to perform the surface passivation of n-type mercury cadmium tellurium (HgCdTe) photoconductance detectors for the first time. X-ray photoelectron spectroscopy (XPS) is used to analyze the influence of the oxidation condition on the oxidation reaction. The passivation mechanism of photochemical oxidation is also studied. Comparing of the performances of the two kinds of detectors with each other, which were prepared under the same technique conditions by the anodization and the photochemical oxidation respectively, it shows that the results of photochemical oxidation is slightly superior to that of anodic oxidation.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116753448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786091
Wu Chuanliang, C. Jianmin, Huang Chang, Hu Guicai, Li Yinbo, Xu Yangzhen
The structure of DTMOSFET is proposed. SOI DTMOSFET devices and ring oscillators are designed and fabricated. The characteristics of DTMOS devices and the speed performance of DTMOS-based ring oscillators are discussed.
{"title":"Experimental studies of SOI DTMOSFET for low-voltage low-power applications","authors":"Wu Chuanliang, C. Jianmin, Huang Chang, Hu Guicai, Li Yinbo, Xu Yangzhen","doi":"10.1109/ICSICT.1998.786091","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786091","url":null,"abstract":"The structure of DTMOSFET is proposed. SOI DTMOSFET devices and ring oscillators are designed and fabricated. The characteristics of DTMOS devices and the speed performance of DTMOS-based ring oscillators are discussed.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116977436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785934
Chen Guping, Zhu Zhaohui
A basic review of ESD protection mechanism is presented and a typical ESD on chip protection circuit used in IC card is discussed. Some critical factors correlated to ESD performance ore considered to form physical structure of protection device in the CMOS technology.
{"title":"ESD protection circuit in IC card","authors":"Chen Guping, Zhu Zhaohui","doi":"10.1109/ICSICT.1998.785934","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785934","url":null,"abstract":"A basic review of ESD protection mechanism is presented and a typical ESD on chip protection circuit used in IC card is discussed. Some critical factors correlated to ESD performance ore considered to form physical structure of protection device in the CMOS technology.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117294258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786066
Q. Gong, J.B. Liang, B. Xu, Z.G. Wang
Quantum dot lasers are predicted to have proved lasing characteristics compared to quantum well and quantum wire lasers. We report on quantum dot lasers with active media of vertically stacked InAs quantum dot layers grown by molecular beam epitaxy. The laser diodes were fabricated and the threshold current density of 220 A/cm/sup 2/ was achieved at room temperature with lasing wavelength of 951 nm. The characteristic temperature T/sub 0/ was measured to be 333 K and 157 K for the temperature ranges of 40-180 K and 180-300 K, respectively.
{"title":"Room-temperature continuous-wave lasing from InAs/GaAs quantum dot laser grown by molecular beam epitaxy","authors":"Q. Gong, J.B. Liang, B. Xu, Z.G. Wang","doi":"10.1109/ICSICT.1998.786066","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786066","url":null,"abstract":"Quantum dot lasers are predicted to have proved lasing characteristics compared to quantum well and quantum wire lasers. We report on quantum dot lasers with active media of vertically stacked InAs quantum dot layers grown by molecular beam epitaxy. The laser diodes were fabricated and the threshold current density of 220 A/cm/sup 2/ was achieved at room temperature with lasing wavelength of 951 nm. The characteristic temperature T/sub 0/ was measured to be 333 K and 157 K for the temperature ranges of 40-180 K and 180-300 K, respectively.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115130530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes a manufacturing process of a bipolar IC with a Zener diode. The Zener diode is manufactured by a process which is compatible with the ordinary bipolar IC process. Since the breakdown voltage of the Zener diode is not equal to the emitter-base breakdown voltage of the longitudinal n-p-n transistors, the doping concentration in the positive area of the Zener diode is not the same as the doping concentration in the base area of the n-p-n transistor. The doping concentration and junction depth of the positive of the Zener diode is decided by its breakdown voltage value. It is produced by another implantation dose and followed by a drive-in step. Hence this process utilizes two boron implantations during the base area formation, one is used to form the base area of ordinary n-p-n transistors, another is used to make the positive of the Zener diode. The relationship between the implantation dose and breakdown voltage of the Zener diode is investigated. A bipolar ASIC with a Zener diode was fabricated by this process.
{"title":"Manufacturing process of bipolar IC with Zener diode","authors":"Jianfeng Wang, Jianmin Cao, Yongming Shen, Yuefang Jiang","doi":"10.1109/ICSICT.1998.785795","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785795","url":null,"abstract":"This paper describes a manufacturing process of a bipolar IC with a Zener diode. The Zener diode is manufactured by a process which is compatible with the ordinary bipolar IC process. Since the breakdown voltage of the Zener diode is not equal to the emitter-base breakdown voltage of the longitudinal n-p-n transistors, the doping concentration in the positive area of the Zener diode is not the same as the doping concentration in the base area of the n-p-n transistor. The doping concentration and junction depth of the positive of the Zener diode is decided by its breakdown voltage value. It is produced by another implantation dose and followed by a drive-in step. Hence this process utilizes two boron implantations during the base area formation, one is used to form the base area of ordinary n-p-n transistors, another is used to make the positive of the Zener diode. The relationship between the implantation dose and breakdown voltage of the Zener diode is investigated. A bipolar ASIC with a Zener diode was fabricated by this process.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122977280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785970
Chien-Ping Lee, Shiang-Yu Wang
By using highly doped InGaAs quantum wells, grating-free two color quantum well infrared photodetectors with large normal incidence responses have been demonstrated. These devices have comparable performance as conventional QWIPs with surface gratings but without the complexity of gratings. The TE absorption was found to be enhanced by the use of the highly strained InGaAs quantum wells and the high doping concentration in the wells. Two-color QWIPs have also demonstrated with excellent performance.
{"title":"Normal incident quantum well infrared photodetectors","authors":"Chien-Ping Lee, Shiang-Yu Wang","doi":"10.1109/ICSICT.1998.785970","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785970","url":null,"abstract":"By using highly doped InGaAs quantum wells, grating-free two color quantum well infrared photodetectors with large normal incidence responses have been demonstrated. These devices have comparable performance as conventional QWIPs with surface gratings but without the complexity of gratings. The TE absorption was found to be enhanced by the use of the highly strained InGaAs quantum wells and the high doping concentration in the wells. Two-color QWIPs have also demonstrated with excellent performance.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121414486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785793
Nie Jiping, Liu Zhongli, He Zhijing, Yu Fang, L. Guohua
A process for fabricating n-channel JFET/SOS (junction field-effect transistors on silicon-on-sapphire) has been researched. The gate p/sup +/-n junction was obtained by diffusion, and the conductive channel formed by a double ion implantation. Both enhancement and depletion mode transistors were fabricated in different processing conditions. From the results of the Co/sub 60/ /spl gamma/-ray irradiation experiments, we found that the devices had a good total dose radiation hardness. When the total dose was 5 Mrad(Si), their threshold voltages shift was less than 0.1 V. The variation of transconductance and the channel leakage current were also small.
{"title":"JFET/SOS devices: processing and gamma radiation effects","authors":"Nie Jiping, Liu Zhongli, He Zhijing, Yu Fang, L. Guohua","doi":"10.1109/ICSICT.1998.785793","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785793","url":null,"abstract":"A process for fabricating n-channel JFET/SOS (junction field-effect transistors on silicon-on-sapphire) has been researched. The gate p/sup +/-n junction was obtained by diffusion, and the conductive channel formed by a double ion implantation. Both enhancement and depletion mode transistors were fabricated in different processing conditions. From the results of the Co/sub 60/ /spl gamma/-ray irradiation experiments, we found that the devices had a good total dose radiation hardness. When the total dose was 5 Mrad(Si), their threshold voltages shift was less than 0.1 V. The variation of transconductance and the channel leakage current were also small.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126178888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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