Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628269
R. Hickling, R. A. Kot, M. Yagi, R. Nagarajan, W. Sha, R. Craig
A single chip, 10-channel optical transimpedance receiver and a low-power, single channel clock recovery circuit have been designed and characterized. The 10-channel receiver operates from a single 3.3 V or 5 V power supply, is capable of automatic offset correction, and generates ECL or PECL output levels. The clock recovery circuit operates from a single 5 V power supply and is based upon a novel variation on the so-called early-late gate bit synchronizer loop.
{"title":"Low power components for 1 Gb/s optical communications: A single-chip 10-channel optical receiver and a clock recovery circuit","authors":"R. Hickling, R. A. Kot, M. Yagi, R. Nagarajan, W. Sha, R. Craig","doi":"10.1109/GAAS.1997.628269","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628269","url":null,"abstract":"A single chip, 10-channel optical transimpedance receiver and a low-power, single channel clock recovery circuit have been designed and characterized. The 10-channel receiver operates from a single 3.3 V or 5 V power supply, is capable of automatic offset correction, and generates ECL or PECL output levels. The clock recovery circuit operates from a single 5 V power supply and is based upon a novel variation on the so-called early-late gate bit synchronizer loop.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128585694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628275
J. Moniz
With the advent of a manufacturable Silicon Germanium (SiGe) heterojunction bipolar transistor (HBT) technology, does Gallium Arsenide (GaAs) have a future in today's high volume high frequency wireless communications marketplace? This paper describes the capabilities of IBM SiGe HBT technology as it compares to GaAs HBT and Field Effect Transistor (FET) technologies for radio frequency (RF) applications. Comparisons are made at the device, single function, and highly integrated RF integrated circuit (RFIC) level for performance and cost.
{"title":"Is SiGe the future of GaAs for RF applications?","authors":"J. Moniz","doi":"10.1109/GAAS.1997.628275","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628275","url":null,"abstract":"With the advent of a manufacturable Silicon Germanium (SiGe) heterojunction bipolar transistor (HBT) technology, does Gallium Arsenide (GaAs) have a future in today's high volume high frequency wireless communications marketplace? This paper describes the capabilities of IBM SiGe HBT technology as it compares to GaAs HBT and Field Effect Transistor (FET) technologies for radio frequency (RF) applications. Comparisons are made at the device, single function, and highly integrated RF integrated circuit (RFIC) level for performance and cost.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130891201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628270
M. Yung, J. Jensen, G. Raghavan, M. Rodwell, M. Hafizi, R. Walden, K. Elliott, M. Kardos, Y. Brown, M. Montes, H. Sun, W. Stanchina
The authors designed and fabricated a highly integrated and very low power receiver IC for 2.5 Gb/s optical communication. It consisted of an AGC data recovery circuit and demultiplexer, and consumed only 340 mW power. The measured data have validated our design approach and have demonstrated the potential of the InP HBT technology to integrate analog and digital functions for low power and high speed applications. Achieving even lower power is feasible through device scaling. Additional functionality such as multiple data rate, frequency detection, lock indicator and data decoder can be included in future integration.
{"title":"An InP HBT low power receiver IC integrating AGC amplifier, clock recovery circuit and demultiplexers","authors":"M. Yung, J. Jensen, G. Raghavan, M. Rodwell, M. Hafizi, R. Walden, K. Elliott, M. Kardos, Y. Brown, M. Montes, H. Sun, W. Stanchina","doi":"10.1109/GAAS.1997.628270","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628270","url":null,"abstract":"The authors designed and fabricated a highly integrated and very low power receiver IC for 2.5 Gb/s optical communication. It consisted of an AGC data recovery circuit and demultiplexer, and consumed only 340 mW power. The measured data have validated our design approach and have demonstrated the potential of the InP HBT technology to integrate analog and digital functions for low power and high speed applications. Achieving even lower power is feasible through device scaling. Additional functionality such as multiple data rate, frequency detection, lock indicator and data decoder can be included in future integration.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125319776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628255
D. Streit, A. Gutierrez-Aitken, J. Cowles, Li-Wu Yang, K. Kobayashi, L. Tran, T. Block, A. Oki
We have developed an InP-based HBT fabrication line to produce HBT integrated circuits in high volume for government and commercial applications. We present here production results and performance characteristics for InP HBT MMICs specifically designed for consumer products.
{"title":"Production and commercial insertion of InP HBT integrated circuits","authors":"D. Streit, A. Gutierrez-Aitken, J. Cowles, Li-Wu Yang, K. Kobayashi, L. Tran, T. Block, A. Oki","doi":"10.1109/GAAS.1997.628255","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628255","url":null,"abstract":"We have developed an InP-based HBT fabrication line to produce HBT integrated circuits in high volume for government and commercial applications. We present here production results and performance characteristics for InP HBT MMICs specifically designed for consumer products.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121900023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628248
R. Savarã
A monolithic 2.125GB/s per port 64/spl times/33 crosspoint switch IC has been designed, fabricated, and tested. A 0.6 um enhancement/depletion, recessed gate GaAs process was chosen for this product, which offers high speed devices with low power dissipation. The design used SCFL (Source Coupled FET Logic) standard cells for the switch matrix. All the data path signals use standard differential PECL input and output levels to maintain precision pulse width characteristics. The control signals, are in TTL levels. The high speed data inputs are DC biased allowing AC coupled operation. The switch offers non-blocking programming, and can be configured prior to enabling the outputs for synchronous reprogramming and operation from a single +5V supply.
{"title":"A high speed and high precision 64/spl times/33 crosspoint switch IC","authors":"R. Savarã","doi":"10.1109/GAAS.1997.628248","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628248","url":null,"abstract":"A monolithic 2.125GB/s per port 64/spl times/33 crosspoint switch IC has been designed, fabricated, and tested. A 0.6 um enhancement/depletion, recessed gate GaAs process was chosen for this product, which offers high speed devices with low power dissipation. The design used SCFL (Source Coupled FET Logic) standard cells for the switch matrix. All the data path signals use standard differential PECL input and output levels to maintain precision pulse width characteristics. The control signals, are in TTL levels. The high speed data inputs are DC biased allowing AC coupled operation. The switch offers non-blocking programming, and can be configured prior to enabling the outputs for synchronous reprogramming and operation from a single +5V supply.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122735914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628284
E. Suematsu, M. Yagura, A. Yamada, K. Kishimoto, Yu Zhu, J. Twynam, K. Sakuno, T. Hasegawa, M. Hasegawa, H. Sato
A subharmonically injection-locked MMIC harmonic VCO for use as a synthesized local oscillator in the 60 GHz band has been experimentally investigated. The designs using HBT MMICs are based on the use of 2nd subharmonic injection locking of the harmonic VCOs to upconvert to millimeter-wave frequency and broaden the locking range. The use of the 4th harmonic signal from the VCOs allows a factor of eight increase in the locking range. The transmission type injection-locked MMIC VCO with the refractive type load circuit increases not only the locking range, but also the high-order harmonic output power in the locked VCO output.
{"title":"Millimeter-wave HBT MMIC synthesizers using subharmonically injection-locked oscillators","authors":"E. Suematsu, M. Yagura, A. Yamada, K. Kishimoto, Yu Zhu, J. Twynam, K. Sakuno, T. Hasegawa, M. Hasegawa, H. Sato","doi":"10.1109/GAAS.1997.628284","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628284","url":null,"abstract":"A subharmonically injection-locked MMIC harmonic VCO for use as a synthesized local oscillator in the 60 GHz band has been experimentally investigated. The designs using HBT MMICs are based on the use of 2nd subharmonic injection locking of the harmonic VCOs to upconvert to millimeter-wave frequency and broaden the locking range. The use of the 4th harmonic signal from the VCOs allows a factor of eight increase in the locking range. The transmission type injection-locked MMIC VCO with the refractive type load circuit increases not only the locking range, but also the high-order harmonic output power in the locked VCO output.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125022902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628231
D. Monthei
This paper discusses some of the typical packages being used for wireless applications today and how they are "modified" for high frequency use. Also discussed are electrical modeling concerns of packages, PC board layout and a number of other factors impacting part performance. Choices in parasitic circuit topology are discussed along with EM simulation and comparison to measured data.
{"title":"Packaging for wireless technology","authors":"D. Monthei","doi":"10.1109/GAAS.1997.628231","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628231","url":null,"abstract":"This paper discusses some of the typical packages being used for wireless applications today and how they are \"modified\" for high frequency use. Also discussed are electrical modeling concerns of packages, PC board layout and a number of other factors impacting part performance. Choices in parasitic circuit topology are discussed along with EM simulation and comparison to measured data.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131866274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628237
M. LaMacchla, J. Abrokwah, B. Bernhardt, B. Crawforth, B. Mathes, T. McGuire, T. Weatherford
The addition of a low temperature GaAs (LTG) layer to the self-aligned complementary GaAs (CGaAs/sup TM/) HIGFET structure has reduced the SEU sensitivity while improving the short channel characteristics of the P-channel HIGFETs. Subthreshold leakage currents, gate leakage, and output conductances have been significantly reduced. Designs of 170 K transistor complexity have been demonstrated on CGaAs/sup TM/ wafers with the LTG layer.
{"title":"Radiation hardened complementary GaAs(CGaAs/sup TM/)","authors":"M. LaMacchla, J. Abrokwah, B. Bernhardt, B. Crawforth, B. Mathes, T. McGuire, T. Weatherford","doi":"10.1109/GAAS.1997.628237","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628237","url":null,"abstract":"The addition of a low temperature GaAs (LTG) layer to the self-aligned complementary GaAs (CGaAs/sup TM/) HIGFET structure has reduced the SEU sensitivity while improving the short channel characteristics of the P-channel HIGFETs. Subthreshold leakage currents, gate leakage, and output conductances have been significantly reduced. Designs of 170 K transistor complexity have been demonstrated on CGaAs/sup TM/ wafers with the LTG layer.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"03 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129275009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628236
J. Huang, E. Glass, J. Abrokwah, B. Bernhardt, M. Majerus, E. Spears, J. Parsey, D. Scheitlin, R. Droopad, L. Mills, K. Hawthorne, J. Blaugh
This paper describes a true enhancement mode RF power device with state-of-the-art performance operated at 3.5 Volts at 900 MHz. The performance was realized with a technology derived from the digital CGaAs/sup TM/ technology. The necessary device and process optimizations to adapt the digital technology for RF applications are discussed and results presented.
{"title":"Device and process optimization for a low voltage enhancement mode power heterojunction FET for portable applications","authors":"J. Huang, E. Glass, J. Abrokwah, B. Bernhardt, M. Majerus, E. Spears, J. Parsey, D. Scheitlin, R. Droopad, L. Mills, K. Hawthorne, J. Blaugh","doi":"10.1109/GAAS.1997.628236","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628236","url":null,"abstract":"This paper describes a true enhancement mode RF power device with state-of-the-art performance operated at 3.5 Volts at 900 MHz. The performance was realized with a technology derived from the digital CGaAs/sup TM/ technology. The necessary device and process optimizations to adapt the digital technology for RF applications are discussed and results presented.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114705647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628285
K. Kamozaki, N. Kurita, W. Hioe, T. Tanimoto, H. Ohta, T. Nakamura, H. Kondoh
A 77-GHz MMIC chip set consisting of a low noise amplifier, a power amplifier, a down converter and a voltage controlled oscillator has been developed to constitute a T/R module for automotive radar systems. The low noise amplifier exhibited a gain of 9.5 dB/spl plusmn/1.0 dB over a 62-96.5 GHz band with an NF of 5.8 dB. The power amplifier achieved a small-signal gain of 13.5 dB/spl plusmn/2.5 dB from 70.7 GHz to 80.3 GHz with 9.7 dBm output power at the 1 dB gain compression. The down converter exhibited a conversion gain of 1.3 dB/spl plusmn/2.2 dB in a band between 75 GHz and 98 GHz with an NF of 7.5 dB. The 77-GHz voltage controlled oscillator exhibited an output power of 0.9 dBm/spl plusmn/0.9 dB over a tuning range of 75.5-76.6 GHz. A design philosophy has been adopted of achieving broadband performance in small MMIC chip size in order to improve manufacturability and performance/cost characteristics of the chip set. The total area for the chip set is 7.92 mm/sup 2/.
{"title":"A 77 GHz T/R MMIC chip set for automotive radar systems","authors":"K. Kamozaki, N. Kurita, W. Hioe, T. Tanimoto, H. Ohta, T. Nakamura, H. Kondoh","doi":"10.1109/GAAS.1997.628285","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628285","url":null,"abstract":"A 77-GHz MMIC chip set consisting of a low noise amplifier, a power amplifier, a down converter and a voltage controlled oscillator has been developed to constitute a T/R module for automotive radar systems. The low noise amplifier exhibited a gain of 9.5 dB/spl plusmn/1.0 dB over a 62-96.5 GHz band with an NF of 5.8 dB. The power amplifier achieved a small-signal gain of 13.5 dB/spl plusmn/2.5 dB from 70.7 GHz to 80.3 GHz with 9.7 dBm output power at the 1 dB gain compression. The down converter exhibited a conversion gain of 1.3 dB/spl plusmn/2.2 dB in a band between 75 GHz and 98 GHz with an NF of 7.5 dB. The 77-GHz voltage controlled oscillator exhibited an output power of 0.9 dBm/spl plusmn/0.9 dB over a tuning range of 75.5-76.6 GHz. A design philosophy has been adopted of achieving broadband performance in small MMIC chip size in order to improve manufacturability and performance/cost characteristics of the chip set. The total area for the chip set is 7.92 mm/sup 2/.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121898430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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