Pub Date : 1997-12-01DOI: 10.1109/GAAS.1997.628234
T. Yoshimasu, M. Akagi, N. Tanba, S. Hara
A novel linearization technique which improves the phase distortion and gain compression of a power amplifier is proposed in this paper. Moreover, a low distortion and high efficiency AlGaAs/GaAs HBT MMIC power amplifier for the 1.9 GHz PHS system has been demonstrated using the novel linearization technique. The HBT MMIC power amplifier exhibits an output power of 21 dBm and a power added efficiency as high as 37% at an operation voltage of 2.7 V with linearity well within the PHS standard.
{"title":"A low distortion and high efficiency HBT MMIC power amplifier with a novel linearization technique for /spl pi//4 DPSK modulation","authors":"T. Yoshimasu, M. Akagi, N. Tanba, S. Hara","doi":"10.1109/GAAS.1997.628234","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628234","url":null,"abstract":"A novel linearization technique which improves the phase distortion and gain compression of a power amplifier is proposed in this paper. Moreover, a low distortion and high efficiency AlGaAs/GaAs HBT MMIC power amplifier for the 1.9 GHz PHS system has been demonstrated using the novel linearization technique. The HBT MMIC power amplifier exhibits an output power of 21 dBm and a power added efficiency as high as 37% at an operation voltage of 2.7 V with linearity well within the PHS standard.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115610949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-15DOI: 10.1109/GAAS.1997.628288
M. Kim, B. Fujiwara, D. Humphrey, S. Martin, R.P. Smith, P. Siegel
A novel all-planar quasi-optical Schottky varactor diode frequency doubler has been fabricated and has produced more than 1 mW of output power at 600 GHz with an approximately 2 percent conversion efficiency. This simple-to-assemble all-planar diode multiplier could replace complicated waveguide blocks commonly used at submillimeter-wave frequencies to provide local oscillator power for terahertz receiver components.
{"title":"A 600 GHz planar frequency multiplier feed on a silicon dielectric-filled parabola","authors":"M. Kim, B. Fujiwara, D. Humphrey, S. Martin, R.P. Smith, P. Siegel","doi":"10.1109/GAAS.1997.628288","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628288","url":null,"abstract":"A novel all-planar quasi-optical Schottky varactor diode frequency doubler has been fabricated and has produced more than 1 mW of output power at 600 GHz with an approximately 2 percent conversion efficiency. This simple-to-assemble all-planar diode multiplier could replace complicated waveguide blocks commonly used at submillimeter-wave frequencies to provide local oscillator power for terahertz receiver components.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131982843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628280
C. Diorio, T. Humes, H. Notthoff, G. Chao, A. Lai, J. Hyde, M. Kintis, A. Oki
We report a GaAs-AlGaAs fractional frequency-synthesizer IC with a 5.5 GHz feedback divider, 2 GHz reference divider, 500 MHz phase-frequency detector, 1 ns charge-pump pulses, gain-normalized output current, and 18 pA/sub rms///spl radic/Hz in-band phase noise. The feedback divider allows continuously selectable divide ratios from 12 to 16383, and supports dual-modulus pulse-swallowing fractional synthesis with single-bit control. The reference divider allows continuously selectable divide ratios from 1 to 4095; an optional divide-by-four/five input prescaler extends the divide ratios to 20475. The chip consumes 1 W from +5 V and -5.2 V supplies.
{"title":"A 5.5 GHz fractional frequency-synthesizer IC","authors":"C. Diorio, T. Humes, H. Notthoff, G. Chao, A. Lai, J. Hyde, M. Kintis, A. Oki","doi":"10.1109/GAAS.1997.628280","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628280","url":null,"abstract":"We report a GaAs-AlGaAs fractional frequency-synthesizer IC with a 5.5 GHz feedback divider, 2 GHz reference divider, 500 MHz phase-frequency detector, 1 ns charge-pump pulses, gain-normalized output current, and 18 pA/sub rms///spl radic/Hz in-band phase noise. The feedback divider allows continuously selectable divide ratios from 12 to 16383, and supports dual-modulus pulse-swallowing fractional synthesis with single-bit control. The reference divider allows continuously selectable divide ratios from 1 to 4095; an optional divide-by-four/five input prescaler extends the divide ratios to 20475. The chip consumes 1 W from +5 V and -5.2 V supplies.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"80 3-4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123430510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628261
Y. Chou, G. Li, D. Leung, Z. Wang, Y.C. Chen, R. Lai, C. Wu, R. Kono, P. Liu, J. Scarpulla, D. Streit
Degradation effects by hot carrier (HCID) and high channel temperature (HCT) are investigated for millimeter wave power HEMT's with a gate length of 0.1 /spl mu/m and 0.15 /spl mu/m. While both HCID and HCT induce drain current reduction, they post distinct failure mechanisms. Our hypothesis is that carrier density reduction under the gate contact which results in I/sub ds/ decrease might account for HCID and gate metal sinking is caused by HCT.
{"title":"Degradation effects induced by hot carrier and high channel temperature in pseudomorphic GaAs millimeter wave power HEMT's","authors":"Y. Chou, G. Li, D. Leung, Z. Wang, Y.C. Chen, R. Lai, C. Wu, R. Kono, P. Liu, J. Scarpulla, D. Streit","doi":"10.1109/GAAS.1997.628261","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628261","url":null,"abstract":"Degradation effects by hot carrier (HCID) and high channel temperature (HCT) are investigated for millimeter wave power HEMT's with a gate length of 0.1 /spl mu/m and 0.15 /spl mu/m. While both HCID and HCT induce drain current reduction, they post distinct failure mechanisms. Our hypothesis is that carrier density reduction under the gate contact which results in I/sub ds/ decrease might account for HCID and gate metal sinking is caused by HCT.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125508486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628260
J. Bao, X. Du, M. Shirokov, R. Leoni, J.C.M. Hwang
Gate lag in ion-implanted GaAs MESFETs has been investigated by using a novel pulsed S-parameter/waveform measurement technique. The results indicate that, for the present devices, gate lag is mainly caused by substrate-trap-induced threshold-voltage shift. Since these traps are required to ensure the substrate is semi-insulating, effective channel/substrate isolation is crucial for minimizing gate lag of these devices. The same technique can be used to assess the relative importance of surface vs. substrate traps to other types of devices and to help optimize their structures.
{"title":"Substrate-induced gate lag in ion-implanted GaAs MESFETs","authors":"J. Bao, X. Du, M. Shirokov, R. Leoni, J.C.M. Hwang","doi":"10.1109/GAAS.1997.628260","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628260","url":null,"abstract":"Gate lag in ion-implanted GaAs MESFETs has been investigated by using a novel pulsed S-parameter/waveform measurement technique. The results indicate that, for the present devices, gate lag is mainly caused by substrate-trap-induced threshold-voltage shift. Since these traps are required to ensure the substrate is semi-insulating, effective channel/substrate isolation is crucial for minimizing gate lag of these devices. The same technique can be used to assess the relative importance of surface vs. substrate traps to other types of devices and to help optimize their structures.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122796755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628250
N. Yoshida, M. Fujii, T. Atsumo, K. Numata, S. Asai, M. Kohno, H. Oikawa, H. Tsutsui, T. Maeda
An ECL-compatible 10-Gbps GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) has been developed. To decrease power consumption and to maximize phase margin, the clock-generating circuit employs source-coupled FET logic (SCFL) circuits. Also, cascade-connected source-follower circuits are used in the clock buffer. These circuits can reduce the power consumption when the fan-out number is large. Direct coupled FET logic (DCFL) circuits are employed for the 2:1 MUX/1:2 DEMUX circuits operating below 5 Gbps. The ICs, which are mounted on ceramic packages, operate at up to 10 Gbps with a power consumption of 1.2 W for the MUX and 1.0 W for the DEMUX at ECL-compatible supply voltages. These power-consumption values are one-third of the previously reported values.
{"title":"Low-power-consumption 10-Gbps GaAs 8:1 multiplexer/1:8 demultiplexer","authors":"N. Yoshida, M. Fujii, T. Atsumo, K. Numata, S. Asai, M. Kohno, H. Oikawa, H. Tsutsui, T. Maeda","doi":"10.1109/GAAS.1997.628250","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628250","url":null,"abstract":"An ECL-compatible 10-Gbps GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) has been developed. To decrease power consumption and to maximize phase margin, the clock-generating circuit employs source-coupled FET logic (SCFL) circuits. Also, cascade-connected source-follower circuits are used in the clock buffer. These circuits can reduce the power consumption when the fan-out number is large. Direct coupled FET logic (DCFL) circuits are employed for the 2:1 MUX/1:2 DEMUX circuits operating below 5 Gbps. The ICs, which are mounted on ceramic packages, operate at up to 10 Gbps with a power consumption of 1.2 W for the MUX and 1.0 W for the DEMUX at ECL-compatible supply voltages. These power-consumption values are one-third of the previously reported values.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131373234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628244
R. Yu, N. Sheng, K. Cheng, G. Gutiérrez, K. Wang, M. Chang
A track-and-hold amplifier for use in high-speed ADCs was implemented in a production AlGaAs/GaAs HBT process. Under Nyquist conditions, the fabricated ICs showed 11 effective number of bits (ENOBs) at 1 GS/s and >12 ENOBs at 800 MS/s. The large signal gain loss of these ICs was measured to be below 0.1 dB.
{"title":"A 1 GS/s, 11-b track-and-hold amplifier with <0.1 dB gain loss","authors":"R. Yu, N. Sheng, K. Cheng, G. Gutiérrez, K. Wang, M. Chang","doi":"10.1109/GAAS.1997.628244","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628244","url":null,"abstract":"A track-and-hold amplifier for use in high-speed ADCs was implemented in a production AlGaAs/GaAs HBT process. Under Nyquist conditions, the fabricated ICs showed 11 effective number of bits (ENOBs) at 1 GS/s and >12 ENOBs at 800 MS/s. The large signal gain loss of these ICs was measured to be below 0.1 dB.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131836481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628249
A. Metzger, C.E. Chang, P. Asbeck, K. Wang, K. Pedrotti, A. Price, A. Campana, D. Wu, J. Liu, S. Beccue
A 12x12 cross-point switch is reported which operates with data rate per channel of 10 Gb/s. The aggregate data rate for the switch, 120 Gb/s, is one of the highest of any reported IC. The circuit is based on AlGaAs/GaAs HBT technology and employs a double switching architecture to minimize jitter. An rms jitter below 4 psec has been demonstrated.
{"title":"A 10 Gb/s 12x12 cross-point switch implemented with AlGaAs/GaAs heterojunction bipolar transistors","authors":"A. Metzger, C.E. Chang, P. Asbeck, K. Wang, K. Pedrotti, A. Price, A. Campana, D. Wu, J. Liu, S. Beccue","doi":"10.1109/GAAS.1997.628249","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628249","url":null,"abstract":"A 12x12 cross-point switch is reported which operates with data rate per channel of 10 Gb/s. The aggregate data rate for the switch, 120 Gb/s, is one of the highest of any reported IC. The circuit is based on AlGaAs/GaAs HBT technology and employs a double switching architecture to minimize jitter. An rms jitter below 4 psec has been demonstrated.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"220 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132276855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628286
J. Mondal, G. Dietz, K. Peterson, R. Haubenstricker, K. McReynolds, P. Laux, S. Moghe, P. Rice, L. Aina
A variety of Ka- and W-Band MMICs have been developed on common sets of Microwave and Millimeter-wave Device Arrays (MMDA) using a 0.1 /spl mu/m T-gate process. The MMDA approach, similar to digital gate array techniques, has the potential to reduce the cost and cycle time (CCT) of high performance MMIC insertions in low-to-medium volume systems. Various types of MMICs, designed on the same sets of MMDA, have a wide performance range; LO power of 18-19 dBm in Ka-band, oscillator power of 16-18 dBm in Ka band, mixer conversion loss of 10-12 dB in Ka- and W-bands, doubler of 46 to 92 GHz with 9 dBm power at 92 GHz.
{"title":"Ka- and W-band MMICs on microwave and millimeterwave device arrays (MMDA) using 0.1 /spl mu/m T-gate PHEMT","authors":"J. Mondal, G. Dietz, K. Peterson, R. Haubenstricker, K. McReynolds, P. Laux, S. Moghe, P. Rice, L. Aina","doi":"10.1109/GAAS.1997.628286","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628286","url":null,"abstract":"A variety of Ka- and W-Band MMICs have been developed on common sets of Microwave and Millimeter-wave Device Arrays (MMDA) using a 0.1 /spl mu/m T-gate process. The MMDA approach, similar to digital gate array techniques, has the potential to reduce the cost and cycle time (CCT) of high performance MMIC insertions in low-to-medium volume systems. Various types of MMICs, designed on the same sets of MMDA, have a wide performance range; LO power of 18-19 dBm in Ka-band, oscillator power of 16-18 dBm in Ka band, mixer conversion loss of 10-12 dB in Ka- and W-bands, doubler of 46 to 92 GHz with 9 dBm power at 92 GHz.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127317602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-10-12DOI: 10.1109/GAAS.1997.628254
T. Nakatsuka, J. Itoh, T. Yoshida, M. Nishitsuji, T. Uda, O. Ishikawa
Super-small and low-power receiver front-end hybrid IC(HIC) using Micro Bump Bonding (MBB) technology for 1.9 GHz bands has been newly developed. By using the MBB, the HIC was miniaturized to 3.5/spl times/4.0/spl times/1.0 mm, which is more than 60% of reduction as compared with the conventional one. Conversion gain of 16.0 dB, IP3 out of 0 dBm, image rejection ratio over 20 dBc were obtained for the HIC at 1.9 GHz, 3.0 V and 4.5 mA of power supply.
{"title":"Super-small and low-power front-end HIC using MBB technology for 1.9 GHz bands","authors":"T. Nakatsuka, J. Itoh, T. Yoshida, M. Nishitsuji, T. Uda, O. Ishikawa","doi":"10.1109/GAAS.1997.628254","DOIUrl":"https://doi.org/10.1109/GAAS.1997.628254","url":null,"abstract":"Super-small and low-power receiver front-end hybrid IC(HIC) using Micro Bump Bonding (MBB) technology for 1.9 GHz bands has been newly developed. By using the MBB, the HIC was miniaturized to 3.5/spl times/4.0/spl times/1.0 mm, which is more than 60% of reduction as compared with the conventional one. Conversion gain of 16.0 dB, IP3 out of 0 dBm, image rejection ratio over 20 dBc were obtained for the HIC at 1.9 GHz, 3.0 V and 4.5 mA of power supply.","PeriodicalId":299287,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 19th Annual Technical Digest 1997","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131049589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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