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2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)最新文献

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Low noise, and high gain wideband amplifier using SiGe HBT technology 采用SiGe HBT技术的低噪声、高增益宽带放大器
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1335786
R. Chan, M. Feng
A low noise wideband amplifier using SiGe HBT technology for the receiver system-on-a-chip application is reported. The fabricated amplifier chip has a gain of 15 dB across 22 GHz bandwidth, noise figure of 5 dB, and output third-order intermodulation product (OIP3) of 16.5 dBm, while dissipating a dc power of 72 mW for the operation. Measured high frequency, noise and linearity performances are compared with Cadence's Spectre's simulation with layout parasitics. Excellent agreement is observed for ultra-low power amplifier's measured and simulated results.
报道了一种采用SiGe HBT技术的低噪声宽带放大器,用于接收机片上系统。制作的放大器芯片在22 GHz带宽上的增益为15 dB,噪声系数为5 dB,输出三阶互调积(OIP3)为16.5 dBm,同时耗散72 mW的直流功率。并与Cadence's Spectre的布局寄生仿真进行了高频、噪声和线性性能的比较。超低功率放大器的测量结果与仿真结果非常吻合。
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引用次数: 4
A 20-50 GHz reconfigurable matching network for power amplifier applications 用于功率放大器应用的20-50 GHz可重构匹配网络
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1339059
T. Vaha-Heikkila, Gabriel M. Rebeiz
A reconfigurable matching network has been developed and it is based on loaded line techniques. It consists of 8 switched MEMS capacitors producing 256 (2/sup 8/) different impedances and is only 1/spl times/2.5 mm in size on a glass substrate. The network is ideally suited to match power amplifiers with 10-20 /spl Omega/ output impedance to 50-60 /spl Omega/ systems at 20-50 GHz. The estimated loss of the network is only 1-1.5 dB at 40 GHz while matching a 10-20 /spl Omega/ load to a 50 /spl Omega/ load. The reconfigurable network can also be used as an impedance tuner in noise parameter and load-pull measurements of active devices at 30-65 GHz.
提出了一种基于负载线技术的可重构匹配网络。它由8个开关MEMS电容器组成,产生256个(2/sup 8/)不同的阻抗,在玻璃基板上的尺寸仅为1/spl倍/2.5 mm。该网络非常适合将输出阻抗为10-20 /spl ω /的功率放大器匹配到20-50 GHz的50-60 /spl ω /系统。当将10-20 /spl ω /负载匹配到50 /spl ω /负载时,网络的估计损耗仅为1-1.5 dB。该可重构网络还可作为阻抗调谐器用于30-65 GHz有源器件的噪声参数和负载-拉力测量。
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引用次数: 58
Filter approximation by RBF-NN and segmentation method 采用RBF-NN滤波逼近和分割方法
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1338877
F. Nunez, A. Skrivervik
In this paper, radial basis function neural networks (RBF-NN) are used to approximate microwave filters. The method used is based on the segmentation of the structure in small units and the approximation of their scattering parameters. The approximated transmission matrices of each unit are multiplied to reproduce the whole filter response. This method is applied to a genetic algorithm in order to obtain a 13 sections microwave step filter, with a specified response. The RBF-NN response of the resulting filter is compared with its full-wave method of moments analysis showing a considerable save of computation time and increased accuracy in the results.
本文采用径向基函数神经网络(RBF-NN)逼近微波滤波器。该方法是基于小单元结构的分割和散射参数的近似。将每个单元的近似传输矩阵相乘以再现整个滤波器响应。将该方法应用于遗传算法,得到了具有特定响应的13段微波阶跃滤波器。将所得滤波器的RBF-NN响应与其全波矩分析方法进行了比较,结果显示计算时间大大节省,结果精度提高。
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引用次数: 8
Noise performance of 90 nm CMOS technology 90纳米CMOS技术的噪声性能
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1335785
D. Becher, G. Banerjee, R. Basco, C. Hung, K. Kuhn, W. Shih
This work describes the noise figure performance of CMOS transistors at the 90 nm technology node. Noise parameters are measured from 2-18 GHz, resulting in a minimum noise figure less than 2 dB across the range of measured frequencies for both NMOS and PMOS. Data is presented showing the effect of total gate width, gate length, and bias on the noise parameters.
本文描述了CMOS晶体管在90nm工艺节点上的噪声系数性能。噪声参数测量范围为2-18 GHz,因此在NMOS和PMOS的测量频率范围内,最小噪声系数小于2 dB。数据显示了总栅极宽度、栅极长度和偏置对噪声参数的影响。
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引用次数: 8
An X-band CMOS quadrature balanced VCO 一种x波段CMOS正交平衡压控振荡器
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1339005
Sangsoo Ko, Hui-Dong Lee, Dong‐Woo Kang, Songcheol Hong
A new quadrature balanced voltage controlled oscillator (B-VCO) is presented. The quadrature and single B-VCO with identical components are implemented in 0.18 /spl mu/m CMOS technology. The quadrature B-VCO has lower phase noise, higher oscillation frequency and higher figure of merit (FOM) than the single B-VCO. The measured phase noise values of the single and quadrature VCO are -114.83 and -116.67 dBc/Hz at the offset frequencies of 1 MHz at the center frequency of 10.21 and 10.81 GHz, respectively. Both VCO cores consume about 8.8 mA from a 1.8 V supply. The FOM of 183 and 185 dB are achieved in the quadrature and single VCO respectively.
提出了一种新的正交平衡压控振荡器(B-VCO)。采用0.18 /spl mu/m CMOS技术实现具有相同元件的正交和单B-VCO。正交B-VCO具有较低的相位噪声、较高的振荡频率和较高的优值系数(FOM)。在中心频率为10.21和10.81 GHz的偏移频率为1 MHz时,单、正交压控振荡器的相位噪声测量值分别为-114.83和-116.67 dBc/Hz。两个VCO核心从1.8 V电源消耗约8.8 mA。在正交压控振荡器和单压控振荡器中分别实现了183db和185db的FOM。
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引用次数: 12
High-Q integrated 3-D inductors and transformers for high frequency applications 用于高频应用的高q集成三维电感和变压器
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1339109
Dae-Hee Weon, Jong-Hyeok Jeon, Jeong-Il Kim, S. Mohammadi, L. Katehi
Using a novel 3-D fabrication technology, we have demonstrated, for the first time, very high frequency and high quality factor (Q) inductors and transformers on Si substrate. On high resistivity Si, this technology achieves a quality factor of Q>60 for 1nH inductor at frequencies of 3 to 7 GHz. High efficiency high-Q transformers with coupling factors 0.6
利用一种新颖的三维制造技术,我们首次在Si衬底上展示了非常高频和高质量因数(Q)的电感和变压器。在高电阻率Si上,该技术在3至7 GHz频率下实现了1nH电感的质量因子Q>60。耦合系数0.6
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引用次数: 23
Design of ferroelectric phase shifters for minimum performance variation over temperature 温度变化最小的铁电移相器设计
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1335861
Dongsu Kim, Sang-Soo Je, J. Kenney, P. Marry
This paper investigates design techniques for continuously variable ferroelectric phase shifters to minimize their performance variations over temperature. Various compositions of barium strontium titanate (BST) thin films on sapphire substrates were characterized in the temperature range of 0/spl deg/C-80/spl deg/C to assess their change in capacitance and tenability. It was found that a minimum capacitance variation (C/sub max//C/sub min/) of around 1.17 could be obtained using a Ba/Sr ratio of 1.2 and (Ba+Sr)/Ti ratio of 0.8. Based on this composition, all-pass network phase shifters were designed using 2 /spl mu/m- and 4 /spl mu/m-spaced interdigital capacitors (IDCs). In the case of the phase shifter with 2 /spl mu/m-spaced IDC, a phase shift of more than 100/spl deg/ was obtained over a 40 V bias range at 2.4 GHz. The loss figure-of-merit (FOM) of the phase shifter was held to 62.5/spl deg//dB /spl plusmn/ 2.5/spl deg//dB from 10/spl deg/C to 75/spl deg/C. The variation of a phase shift was held to only 4/spl deg/ in the temperature range of 10/spl deg/C-50/spl deg/C.
本文研究了连续可变铁电移相器的设计技术,以尽量减少其性能随温度的变化。在0/spl℃~ 80/spl℃的温度范围内,对蓝宝石衬底上不同成分的钛酸锶钡(BST)薄膜进行了表征,以评估其电容和可持续性的变化。当Ba/Sr比为1.2,(Ba+Sr)/Ti比为0.8时,电容变化最小(C/sub max//C/sub min/)约为1.17。在此基础上,采用2 /spl mu/m和4 /spl mu/m间距的数字间电容(idc)设计了全通网络移相器。对于具有2 /spl μ /m间距IDC的移相器,在2.4 GHz的40 V偏置范围内获得了超过100/spl度/的相移。相移器的损耗值(FOM)在10/spl°C到75/spl°C范围内保持在62.5/spl°//dB /spl plusmn/ 2.5/spl°//dB。在10/spl°C-50/spl°C的温度范围内,相移的变化仅为4/spl°C。
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引用次数: 11
A third order in-line pseudo-elliptic filter with a transmission zero extracted at its center 在其中心提取传输零点的三阶直线伪椭圆滤波器
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1336010
S. Amari, U. Rosenberg
The paper presents a new approach to implement a real transmission zero in a third order in-line pseudo-elliptic filter. The transmission zero is extracted at an internal node in the in-line structure and not at the input or the output as in the well-known extracted pole technique. It is shown that the coupling coefficient that is directly responsible for the real transmission zero becomes too large and physically unrealizable if the extraction is performed at the input or the output as in the extracted pole technique. On the other hand, all coupling coefficient remain realizable if the extraction is performed at internal nodes. Furthermore, internal "impedance zones" can be independently scaled without affecting the overall response of the filter. Example filters are designed to demonstrate the validity of the approach.
提出了一种在三阶直线伪椭圆滤波器中实现实传输零的新方法。传输零点在直列结构的内部节点提取,而不是像众所周知的提取极点技术那样在输入或输出节点提取。结果表明,如果像提取极点技术那样在输入端或输出端进行提取,则直接导致实际传输零点的耦合系数会变得太大,并且在物理上无法实现。另一方面,如果在内部节点执行提取,则所有耦合系数仍然是可实现的。此外,内部“阻抗区”可以在不影响滤波器整体响应的情况下独立缩放。设计了示例过滤器来证明该方法的有效性。
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引用次数: 14
Design and analysis of a W-band multiplier chipset w波段乘法器芯片组的设计与分析
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1335852
J. Lynch, E. Entchev, B. Lyons, A. Tessman, H. Massler, A. Leuther, M. Schlechtweg
The design and analysis of a multiplier chipset with an output at W-band is presented. The MMIC designs have been fabricated on a 0.13 /spl mu/m AlGaAs/InGaAs/GaAs pHEMT process. Particular emphasis has been placed on EM analysis of key components and the optimization of models suitable for use in circuit simulators based on the EM simulations. The results show a first iteration design with an on-wafer saturated output power of 20.2 dBm at 92 GHz and greater than 18 dBm over a 9% bandwidth from 87.5-95.5 GHz.
介绍了一种w波段输出的乘法器芯片组的设计与分析。MMIC设计采用0.13 /spl mu/m的AlGaAs/InGaAs/GaAs pHEMT工艺制作。特别强调了关键元件的电磁分析和基于电磁仿真的电路模拟器中适合使用的模型的优化。结果表明,第一次迭代设计在92 GHz时片上饱和输出功率为20.2 dBm,在87.5-95.5 GHz的9%带宽上大于18 dBm。
{"title":"Design and analysis of a W-band multiplier chipset","authors":"J. Lynch, E. Entchev, B. Lyons, A. Tessman, H. Massler, A. Leuther, M. Schlechtweg","doi":"10.1109/MWSYM.2004.1335852","DOIUrl":"https://doi.org/10.1109/MWSYM.2004.1335852","url":null,"abstract":"The design and analysis of a multiplier chipset with an output at W-band is presented. The MMIC designs have been fabricated on a 0.13 /spl mu/m AlGaAs/InGaAs/GaAs pHEMT process. Particular emphasis has been placed on EM analysis of key components and the optimization of models suitable for use in circuit simulators based on the EM simulations. The results show a first iteration design with an on-wafer saturated output power of 20.2 dBm at 92 GHz and greater than 18 dBm over a 9% bandwidth from 87.5-95.5 GHz.","PeriodicalId":334675,"journal":{"name":"2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122735901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A digital leakage cancellation scheme for monostatic FMCW radar 单站FMCW雷达的数字泄漏抵消方案
Pub Date : 2004-06-06 DOI: 10.1109/MWSYM.2004.1339068
K. Lin, R.H. Messerian, Y. Wang
A novel heterodyne scheme based on real-time digital signal processing is proposed for leakage cancellation in monostatic frequency modulated continuous wave (FMCW) radars. Compared to conventional analog implementation, the advantages of the proposed scheme include that the DC offset existing in analog mixers affecting the cancellation performance are eliminated. A radar test bed at 26 GHz has been built. The measurement results show more than 40 dB suppression in transmitter leakage, which proves the effectiveness of the proposed approach.
提出了一种基于实时数字信号处理的单稳态调频连续波(FMCW)雷达泄漏消除外差方案。与传统的模拟实现相比,该方案的优点包括消除了模拟混频器中存在的影响对消性能的直流偏移。已建成26 GHz雷达试验台。测量结果表明,该方法对发射机泄漏的抑制作用可达40 dB以上,证明了该方法的有效性。
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引用次数: 25
期刊
2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)
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