Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718238
G. Engel, B. J. Mirowsky
Keeping up and finding the way to keep up is an almost insurmountable challenge for the engineer, industry and academia in today's environment. The timely finding, sifting through and determination of required knowledge, as well as the conveyance of that knowledge from the industrial needer to the educator to the professional doer defies the inertia and resources of industrial and academic institutions and the engineer. IEEE has developed a system with "short circuit" paths for passing s and knowledge, requirements between industry, academia and the engineer. The system provides for self assessment guidance, in and out of the field, and is a viable means channeling in lifelong learning. The name of the system is ESAP, or THE ENGINEERING SKILLS ASSESSMENT PROGRAM. The price of this system is the time of the volunteers who are needed to produce the compendiums of duties, tasks, skills and knowledge, along with a minimal amount of travel and meeting costs.
{"title":"The Engineering Skills Assessment Program (ESAP) A Professional Development Tool","authors":"G. Engel, B. J. Mirowsky","doi":"10.1109/ELECTR.1991.718238","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718238","url":null,"abstract":"Keeping up and finding the way to keep up is an almost insurmountable challenge for the engineer, industry and academia in today's environment. The timely finding, sifting through and determination of required knowledge, as well as the conveyance of that knowledge from the industrial needer to the educator to the professional doer defies the inertia and resources of industrial and academic institutions and the engineer. IEEE has developed a system with \"short circuit\" paths for passing s and knowledge, requirements between industry, academia and the engineer. The system provides for self assessment guidance, in and out of the field, and is a viable means channeling in lifelong learning. The name of the system is ESAP, or THE ENGINEERING SKILLS ASSESSMENT PROGRAM. The price of this system is the time of the volunteers who are needed to produce the compendiums of duties, tasks, skills and knowledge, along with a minimal amount of travel and meeting costs.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129490729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718653
Z. Amitai, D. Wyland
Burst mode memories improve cache design by improving refill time on cache misses. Burst mode RAMs allow refill of a four word cache line in five clock cycles at 50 mHz rather than the eight clock cycles that would be required for a conventional SRAM. Burst mode RAMs also have clock synchronous interfaces which make them easier to design into systems, particularly at clock rates of 25 mHz and above.
{"title":"Burst Mode Memories Improve Cache Design","authors":"Z. Amitai, D. Wyland","doi":"10.1109/ELECTR.1991.718653","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718653","url":null,"abstract":"Burst mode memories improve cache design by improving refill time on cache misses. Burst mode RAMs allow refill of a four word cache line in five clock cycles at 50 mHz rather than the eight clock cycles that would be required for a conventional SRAM. Burst mode RAMs also have clock synchronous interfaces which make them easier to design into systems, particularly at clock rates of 25 mHz and above.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115967985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718270
J. Brown
The IEEE Std. 1149.1 Standard Test Access Port and Boundary-Scan Architecture [1] as well as other scan path methodologies use a serial interface for transmitting data to and from the circuit under test. This serial communication presents an efficiency problem in transferring data between a processor and the scan ring. This paper describes the architecture and features of a device that interfaces a parallel host bus to a serial test bus. The Parallel/Serial (P/S) Converter integrates several features to simplify board test and offers a way to make scan operations more efficient by managing shift operations directly in hardware.
{"title":"Design Of A Parallel Bus-to-Scan Test Port Converter","authors":"J. Brown","doi":"10.1109/ELECTR.1991.718270","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718270","url":null,"abstract":"The IEEE Std. 1149.1 Standard Test Access Port and Boundary-Scan Architecture [1] as well as other scan path methodologies use a serial interface for transmitting data to and from the circuit under test. This serial communication presents an efficiency problem in transferring data between a processor and the scan ring. This paper describes the architecture and features of a device that interfaces a parallel host bus to a serial test bus. The Parallel/Serial (P/S) Converter integrates several features to simplify board test and offers a way to make scan operations more efficient by managing shift operations directly in hardware.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125661938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718204
W. Gutschick
Advances in programmable logic are moving these devices from the category of "specialty devices" to "standard devices" that are used in almost every digital design. As the devices have become more complex, the design software needed to design with them has become more complex, the design software needed to design with them has become more sophisticated. In fact, in many cases choosing the right design software is as important as choosing the devices themselves. Many engineers would even argue that choosing the right software is more important than the silicon since the software can be the factor which limits the usefulness of the silicon and quality of the design.
{"title":"Choosing The Software Is As Important As Choosing The Silicon","authors":"W. Gutschick","doi":"10.1109/ELECTR.1991.718204","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718204","url":null,"abstract":"Advances in programmable logic are moving these devices from the category of \"specialty devices\" to \"standard devices\" that are used in almost every digital design. As the devices have become more complex, the design software needed to design with them has become more complex, the design software needed to design with them has become more sophisticated. In fact, in many cases choosing the right design software is as important as choosing the devices themselves. Many engineers would even argue that choosing the right software is more important than the silicon since the software can be the factor which limits the usefulness of the silicon and quality of the design.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131866141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718229
D.D. Lynch
The '90's look bright for automotive microwave sub-systems. There are a large number of emerging automotive microwave applications. Microwaves offer significant advantages in weather and road grime, range, target insensitivity and safety. Cost is the major challenge which must be worked. There are many interesting technical challenges which can be overcome by careful analysis and design as well as modern signal processing. There are numerous development programs underway.
{"title":"Automotive Microwave Technology","authors":"D.D. Lynch","doi":"10.1109/ELECTR.1991.718229","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718229","url":null,"abstract":"The '90's look bright for automotive microwave sub-systems. There are a large number of emerging automotive microwave applications. Microwaves offer significant advantages in weather and road grime, range, target insensitivity and safety. Cost is the major challenge which must be worked. There are many interesting technical challenges which can be overcome by careful analysis and design as well as modern signal processing. There are numerous development programs underway.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115881105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718191
B.G. Wenniger
This paper describes how to interface to the 'third generation FlF0s;" the clocked FIFOs, in order to achieve reliable operation at 70 MHz. A brief history of integrated circuit FlFOs is presented, followed by a discussion of the advantages and disadvantages of each. The features of the Cypress clocked FIFOs are described and their benefits to the designers of high performance systems are explained. A design is presented that illustrates how to achieve maximum performance.
{"title":"Using the CY7C44X and CY7C45X FIFOs at 70 MHz","authors":"B.G. Wenniger","doi":"10.1109/ELECTR.1991.718191","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718191","url":null,"abstract":"This paper describes how to interface to the 'third generation FlF0s;\" the clocked FIFOs, in order to achieve reliable operation at 70 MHz. A brief history of integrated circuit FlFOs is presented, followed by a discussion of the advantages and disadvantages of each. The features of the Cypress clocked FIFOs are described and their benefits to the designers of high performance systems are explained. A design is presented that illustrates how to achieve maximum performance.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115533416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718216
L. S. Buchoff
The number of soldered joints per circuit is rapidly increasing, especially on surface mounted boards. As a result, defective solder joints are becoming the dominant cause of board failures. Also, there is a move to closer spacing of connections which leads to solder bridging and difficulty of flux removal and joint inspection. These, coupled with other solder disadvantages, have led the military and industrial companies to look for alternative component connection methods. Because of the high cost of components and the circuit substrates it is mandatory to be able to replace defective parts easily.
{"title":"Advanced Non-Soldering Interconnection","authors":"L. S. Buchoff","doi":"10.1109/ELECTR.1991.718216","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718216","url":null,"abstract":"The number of soldered joints per circuit is rapidly increasing, especially on surface mounted boards. As a result, defective solder joints are becoming the dominant cause of board failures. Also, there is a move to closer spacing of connections which leads to solder bridging and difficulty of flux removal and joint inspection. These, coupled with other solder disadvantages, have led the military and industrial companies to look for alternative component connection methods. Because of the high cost of components and the circuit substrates it is mandatory to be able to replace defective parts easily.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115224767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718234
K. Owyang
Actel Corporation's ACT 2 family of Field Programmable Gate Arrays (FPGA) is a significant advancement in density and performance for programmable logic devices. This latest generation of FPGAs provides design solutions for system-level integration that have not been previously available in the FPGA marketplace. Upon introduction, the A1280, the first and largest member of the ACT 2 family, found system-level applications in the consumer electronics industry at Videonics Corporation. The application of the A1280 in the Videonics Video Equalizer is described in this paper.
{"title":"Next Generation FPGA's Provide New System-Level Integration Solutions","authors":"K. Owyang","doi":"10.1109/ELECTR.1991.718234","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718234","url":null,"abstract":"Actel Corporation's ACT 2 family of Field Programmable Gate Arrays (FPGA) is a significant advancement in density and performance for programmable logic devices. This latest generation of FPGAs provides design solutions for system-level integration that have not been previously available in the FPGA marketplace. Upon introduction, the A1280, the first and largest member of the ACT 2 family, found system-level applications in the consumer electronics industry at Videonics Corporation. The application of the A1280 in the Videonics Video Equalizer is described in this paper.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123750553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-04-16DOI: 10.1109/ELECTR.1991.718203
J. Jahns
Micro-optics is an emerging field of technology that is interesting for optical interconnections in electronic or optical computers. We discuss the fabrication of diffractive micro-optical elements and the integration of three-dimensional photonic systems on single substrates using planarized structures.
{"title":"Integrated Micro-Optics For Optical Computing","authors":"J. Jahns","doi":"10.1109/ELECTR.1991.718203","DOIUrl":"https://doi.org/10.1109/ELECTR.1991.718203","url":null,"abstract":"Micro-optics is an emerging field of technology that is interesting for optical interconnections in electronic or optical computers. We discuss the fabrication of diffractive micro-optical elements and the integration of three-dimensional photonic systems on single substrates using planarized structures.","PeriodicalId":339281,"journal":{"name":"Electro International, 1991","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123167869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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