Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927809
Renzhe Zhao, Yun Zhang, R.W. Johnson, D. Harris
Simulation of flip chip solder joints in an underfill environment was performed to evaluate the effect of underfill volume and material properties on concurrent underfill and solder reflow manufacturing technique. Forces during solder reflow, fillet shape and collapsed solder ball geometry after reflow are reported. A multiple ball model was created based on single ball model and underfill fillet studies, to predict die stand-off in the presence of a pre-dispensed, fluxing underfill. The predictions agree with experimental results within 1.5 percent. Modeling allows the prediction of self-centering forces, gap height, and die floating as a function of underfill volume and properties in a no-flow, fluxing underfill assembly process.
{"title":"A study of normal, restoring, and fillet forces and solder bump geometry during reflow in concurrent underfill/reflow flip chip assembly","authors":"Renzhe Zhao, Yun Zhang, R.W. Johnson, D. Harris","doi":"10.1109/ECTC.2001.927809","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927809","url":null,"abstract":"Simulation of flip chip solder joints in an underfill environment was performed to evaluate the effect of underfill volume and material properties on concurrent underfill and solder reflow manufacturing technique. Forces during solder reflow, fillet shape and collapsed solder ball geometry after reflow are reported. A multiple ball model was created based on single ball model and underfill fillet studies, to predict die stand-off in the presence of a pre-dispensed, fluxing underfill. The predictions agree with experimental results within 1.5 percent. Modeling allows the prediction of self-centering forces, gap height, and die floating as a function of underfill volume and properties in a no-flow, fluxing underfill assembly process.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116012897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.928005
S. Sattiraju, B. Dang, R.W. Johnson, Y. Li, J.S. Smith, M. Bozack
For a successful transition to Pb-free manufacturing in electronics assembly, it is critical to understand the behavior of Pb-free solders (in bulk and paste form) and their interaction with the Pb-free Printed Wiring Board (PWB) finishes. This paper presents the results obtained from the spread tests of several Pb-free solder pastes when reflowed on Pb-free PWB finishes. The solder alloys considered were Sn3.4Ag4.8Bi, Sn4.0Ag0.5Cu, Sn3.5Ag and Sn0.7Cu. Eutectic Sn 37 Pb was used as a reference. The PWB surface finishes considered were Sn, Ag, Pd, Ni/Au and OSP. The solder pastes were reflowed in air and nitrogen to understand the effect of reflow atmosphere on the spreading. The surface finishes (as received) were characterized by Auger Electron Spectroscopy (AES) and X-ray Photoelectron Spectroscopy (XPS). Sequential Electrochemical Reduction Analysis (SERA) was also performed on the as-received PWB test coupons. The effect of multiple reflow cycles on the wetting performance and the surface composition of the Sn PWB finish was also studied.
{"title":"Wetting characteristics of Pb-free solder pastes and Pb-free PWB finishes","authors":"S. Sattiraju, B. Dang, R.W. Johnson, Y. Li, J.S. Smith, M. Bozack","doi":"10.1109/ECTC.2001.928005","DOIUrl":"https://doi.org/10.1109/ECTC.2001.928005","url":null,"abstract":"For a successful transition to Pb-free manufacturing in electronics assembly, it is critical to understand the behavior of Pb-free solders (in bulk and paste form) and their interaction with the Pb-free Printed Wiring Board (PWB) finishes. This paper presents the results obtained from the spread tests of several Pb-free solder pastes when reflowed on Pb-free PWB finishes. The solder alloys considered were Sn3.4Ag4.8Bi, Sn4.0Ag0.5Cu, Sn3.5Ag and Sn0.7Cu. Eutectic Sn 37 Pb was used as a reference. The PWB surface finishes considered were Sn, Ag, Pd, Ni/Au and OSP. The solder pastes were reflowed in air and nitrogen to understand the effect of reflow atmosphere on the spreading. The surface finishes (as received) were characterized by Auger Electron Spectroscopy (AES) and X-ray Photoelectron Spectroscopy (XPS). Sequential Electrochemical Reduction Analysis (SERA) was also performed on the as-received PWB test coupons. The effect of multiple reflow cycles on the wetting performance and the surface composition of the Sn PWB finish was also studied.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122495522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927715
N. Hannan, P. Viswanadham
Filling the interspace between package and the printed wiring board (PWB), namely underfilling, was demonstrated to yield dramatic reliability improvement in mechanical shock and bending (flexing) stresses of most chip scale package (CSP) assemblies in mobile phone applications. However, rework of defective CSPs cannot be performed after the underfill operation. The need for the ability to rework underfills has, in recent years, resulted in developmental efforts to formulate materials that can easily be reworked as well as provide requisite product reliability. The implementation of reworkable underfills involves: choice of proper material, development of an acceptable process, and a verification of reliability. In this paper are discussed some of the critical issues that need to be considered in the evaluation of reworkable underfill materials and their application in portable communication products.
{"title":"Critical aspects of reworkable underfills for portable consumer products","authors":"N. Hannan, P. Viswanadham","doi":"10.1109/ECTC.2001.927715","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927715","url":null,"abstract":"Filling the interspace between package and the printed wiring board (PWB), namely underfilling, was demonstrated to yield dramatic reliability improvement in mechanical shock and bending (flexing) stresses of most chip scale package (CSP) assemblies in mobile phone applications. However, rework of defective CSPs cannot be performed after the underfill operation. The need for the ability to rework underfills has, in recent years, resulted in developmental efforts to formulate materials that can easily be reworked as well as provide requisite product reliability. The implementation of reworkable underfills involves: choice of proper material, development of an acceptable process, and a verification of reliability. In this paper are discussed some of the critical issues that need to be considered in the evaluation of reworkable underfill materials and their application in portable communication products.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122476562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927808
K. Zeng, V. Vuorinen, J. Kivilahti
Due to its toxicity, Pb is likely to be eliminated eventually from electronic products and, therefore, it is important to understand and control the compatibility of the Sn-Ag-Cu solder alloys with Ni(P)/Au metallizations. Transmission electron microscopy and scanning electron microscopy were employed to analyze the interfacial microstructure. The intermetallic compound Cu/sub 6/Sn/sub 5/, containing a small amount of dissolved Ni, was found to form preferentially on the Ni coating. This compound layer served as a barrier for the reaction of Sn with the Ni coating. On the Ni(P) side, a nickel phosphide was identified. Thermodynamic evaluation of the Cu-Ni-Sn system was carried out to rationalize the enrichment of Cu at the solder/finish interface. Effects of the interfacial reactions on joint reliability are discussed.
由于其毒性，Pb很可能最终从电子产品中被消除，因此，了解和控制Sn-Ag-Cu钎料合金与Ni(P)/Au金属化的相容性非常重要。采用透射电镜和扫描电镜对界面微观结构进行了分析。金属间化合物Cu/sub 6/Sn/sub 5/优先在Ni涂层上形成，其中含有少量溶解的Ni。该复合层为锡与Ni镀层的反应提供了屏障。在Ni(P)侧，发现了一个磷化镍。对Cu- ni - sn体系进行了热力学评价，以使Cu在焊料/抛光界面的富集合理化。讨论了界面反应对节理可靠性的影响。
{"title":"Intermetallic reactions between lead-free SnAgCu solder and Ni(P)/Au surface finish on PWBs","authors":"K. Zeng, V. Vuorinen, J. Kivilahti","doi":"10.1109/ECTC.2001.927808","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927808","url":null,"abstract":"Due to its toxicity, Pb is likely to be eliminated eventually from electronic products and, therefore, it is important to understand and control the compatibility of the Sn-Ag-Cu solder alloys with Ni(P)/Au metallizations. Transmission electron microscopy and scanning electron microscopy were employed to analyze the interfacial microstructure. The intermetallic compound Cu/sub 6/Sn/sub 5/, containing a small amount of dissolved Ni, was found to form preferentially on the Ni coating. This compound layer served as a barrier for the reaction of Sn with the Ni coating. On the Ni(P) side, a nickel phosphide was identified. Thermodynamic evaluation of the Cu-Ni-Sn system was carried out to rationalize the enrichment of Cu at the solder/finish interface. Effects of the interfacial reactions on joint reliability are discussed.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114180843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.928032
G.Q. Zhang, A. Tay, L. Ernst, S. Liu, Z. Qian, H. Bressers, J. Janssen
This paper presents the strategy, methodology and results of virtual prototyping-based thermo-mechanical design and qualification methods, developed by Philips together with its technology partners. The results of virtual thermomechanical prototyping can be used to predict, evaluate and optimise the thermal and mechanical behavior of electronic packages against the actual packaging requirements prior to major physical prototyping and manufacturing investments. The presented results show that the development and application of the virtual prototyping method can make substantial contribution to the sustainable business profitability of the electronics industry. The industrial feasibility and added values of virtual prototyping-based thermo-mechanical design and qualification methods largely depend on, among other aspects, the advanced methodologies and technologies used to characterize and model the process dependent thermomechanical properties of packaging materials. Process dependencies are related to the production history as well as to the subsequent thermo-mechanical loading (time, temperature, stress level, geometry, damage evolution, etc.). Therefore, the present paper presents our investigation results on the state of the art, the bottlenecks and the innovative solutions for material characterization and modeling, focusing on solder and polymer materials and taking into account the needs for future electronic packages. The experimental and modeling results presented in this paper demonstrate that by integrating the proposed innovative solutions for material characterization and modeling with the virtual thermo-mechanical prototyping methods, competitive packaging development can be achieved.
{"title":"Virtual thermo-mechanical prototyping of electronic packaging challenges in material characterization and modeling","authors":"G.Q. Zhang, A. Tay, L. Ernst, S. Liu, Z. Qian, H. Bressers, J. Janssen","doi":"10.1109/ECTC.2001.928032","DOIUrl":"https://doi.org/10.1109/ECTC.2001.928032","url":null,"abstract":"This paper presents the strategy, methodology and results of virtual prototyping-based thermo-mechanical design and qualification methods, developed by Philips together with its technology partners. The results of virtual thermomechanical prototyping can be used to predict, evaluate and optimise the thermal and mechanical behavior of electronic packages against the actual packaging requirements prior to major physical prototyping and manufacturing investments. The presented results show that the development and application of the virtual prototyping method can make substantial contribution to the sustainable business profitability of the electronics industry. The industrial feasibility and added values of virtual prototyping-based thermo-mechanical design and qualification methods largely depend on, among other aspects, the advanced methodologies and technologies used to characterize and model the process dependent thermomechanical properties of packaging materials. Process dependencies are related to the production history as well as to the subsequent thermo-mechanical loading (time, temperature, stress level, geometry, damage evolution, etc.). Therefore, the present paper presents our investigation results on the state of the art, the bottlenecks and the innovative solutions for material characterization and modeling, focusing on solder and polymer materials and taking into account the needs for future electronic packages. The experimental and modeling results presented in this paper demonstrate that by integrating the proposed innovative solutions for material characterization and modeling with the virtual thermo-mechanical prototyping methods, competitive packaging development can be achieved.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128280514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927760
J. A. Walker
The rate at which bandwidth demand in communications networks has grown has caused service providers to move rapidly to dense wavelength-division-multiplexed networks. This has in turn spawned a number of new application areas in which there is no clear technological winner, leaving room for new technologies such as MEMS to create inroads. In this paper, these applications are discussed and examples of several MEMS devices being developed for use in wavelength-division-multiplexed networks optical transport systems are presented.
{"title":"MEMS technology in optical layer networks","authors":"J. A. Walker","doi":"10.1109/ECTC.2001.927760","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927760","url":null,"abstract":"The rate at which bandwidth demand in communications networks has grown has caused service providers to move rapidly to dense wavelength-division-multiplexed networks. This has in turn spawned a number of new application areas in which there is no clear technological winner, leaving room for new technologies such as MEMS to create inroads. In this paper, these applications are discussed and examples of several MEMS devices being developed for use in wavelength-division-multiplexed networks optical transport systems are presented.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129256926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927925
K. Nakagawa, S. Baba, M. Watanabe, H. Matsushima, K. Harada, E. Hayashi, Q. Wu, A. Maeda, M. Nakanishi, N. Ueda
High performance logic devices have rapidly advanced in network system. In order to reply the demand of high pin count and high speed, Flip-chip BGA (FC-BGA) package applied high-density organic substrate has been developed. This package has the superior possibility of flexible bump locations by virtue of high via densities and fine line capabilities of the substrate. The feature of substrate is adopting the stacked method of finer via pitch layers. Utilizing the density, it is possible to either minimize the LSI die size or maximize the number of bumps on the die. Also at the high performance devices, the high current density through the bump is strongly demanded. In order to satisfy the demand and realize the high pin counts devices, thermo-electromigration phenomenon of solder bump is one of the key reliability items. The thermo-electromigration phenomenon of solder bump was investigated to be consisting of three steps as below. At 1/sup st/ step, the lead (Pb) migrates as electron flow under high-density current, and at 2/sup nd/ step, the Under Bump Metals (UBM) migrates and disappears. Finally at 3/sup rd/ step, Aluminum (Al) routing metal migrates and it results in open failure, and from the High Temperature Operating Life (HTOL) results, the life time of solder bump on current density has been estimated theoretically based on Black's equation. The lifetime was predicted more than 20 years with the current being 160 mA/bump in 220 /spl mu/m pitch cases.
{"title":"Thermo-electromigration phenomenon of solder bump, leading to flip-chip devices with 5,000 bumps","authors":"K. Nakagawa, S. Baba, M. Watanabe, H. Matsushima, K. Harada, E. Hayashi, Q. Wu, A. Maeda, M. Nakanishi, N. Ueda","doi":"10.1109/ECTC.2001.927925","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927925","url":null,"abstract":"High performance logic devices have rapidly advanced in network system. In order to reply the demand of high pin count and high speed, Flip-chip BGA (FC-BGA) package applied high-density organic substrate has been developed. This package has the superior possibility of flexible bump locations by virtue of high via densities and fine line capabilities of the substrate. The feature of substrate is adopting the stacked method of finer via pitch layers. Utilizing the density, it is possible to either minimize the LSI die size or maximize the number of bumps on the die. Also at the high performance devices, the high current density through the bump is strongly demanded. In order to satisfy the demand and realize the high pin counts devices, thermo-electromigration phenomenon of solder bump is one of the key reliability items. The thermo-electromigration phenomenon of solder bump was investigated to be consisting of three steps as below. At 1/sup st/ step, the lead (Pb) migrates as electron flow under high-density current, and at 2/sup nd/ step, the Under Bump Metals (UBM) migrates and disappears. Finally at 3/sup rd/ step, Aluminum (Al) routing metal migrates and it results in open failure, and from the High Temperature Operating Life (HTOL) results, the life time of solder bump on current density has been estimated theoretically based on Black's equation. The lifetime was predicted more than 20 years with the current being 160 mA/bump in 220 /spl mu/m pitch cases.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124572471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927997
K. Wolter, T. Zerna, R. Deltschew, H. Neumann
The application of plasma treatment for fluxless soldering is known in the field of wave soldering. Plasma treatment of printed circuit boards (PCBs) with solid solder deposits (SSDs) makes it possible to eliminate the application of conventional flux in reflow soldering process. However, the main problem is the need of storing PCBs between plasma treatment and reflow soldering without reoxidation of surfaces. Therefore it is necessary to fund ways to realize the known plasma soldering process with formation of protective film on the top of the SSDs during the plasma treatment. This work deals with the dependence of surface modification of eutectic SnPb solder materials on process parameters. After plasma treatment is detected both metal fluoride and polymer formation. The reflow soldering influences the amount of polymer layers on the solder surface.
{"title":"Plasma treatment process for fluxless reflow soldering","authors":"K. Wolter, T. Zerna, R. Deltschew, H. Neumann","doi":"10.1109/ECTC.2001.927997","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927997","url":null,"abstract":"The application of plasma treatment for fluxless soldering is known in the field of wave soldering. Plasma treatment of printed circuit boards (PCBs) with solid solder deposits (SSDs) makes it possible to eliminate the application of conventional flux in reflow soldering process. However, the main problem is the need of storing PCBs between plasma treatment and reflow soldering without reoxidation of surfaces. Therefore it is necessary to fund ways to realize the known plasma soldering process with formation of protective film on the top of the SSDs during the plasma treatment. This work deals with the dependence of surface modification of eutectic SnPb solder materials on process parameters. After plasma treatment is detected both metal fluoride and polymer formation. The reflow soldering influences the amount of polymer layers on the solder surface.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123985052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927807
A. Zribi, L. Zavalij, P. Borgesen, A. Primavera, G. Westby, E. Cotts
A simple model of the formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ in Pb-Sn solder/Ni interconnects is examined by numerical simulation. Previous experimental observation has shown that after reflow the interface consists of the Ni/sub 3/Sn/sub 4/ alloy between Pb-Sn solder and Ni, with Au distributed through the PbSn solder ball. Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ was observed to form at the Pb-Sn solder/Ni/sub 3/Sn/sub 4/ interface during annealing at 150/spl deg/C in a number of studies. The numerical simulation was used to calculate the maximum flux of Au to the interface, and with the assumption that this Au was immediately incorporated in to Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ a maximum rate of formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ was calculated. This rate was found to be similar to measured rates of formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ from two different studies. The formation of(CuNi)6SnS in Sn-Ag-Cu/Ni solder interconnects was discussed within the context of these observations.
{"title":"The kinetics of formation of ternary intermetallic alloys in Pb-Sn and Cu-Ag-Sn Pb-free electronic joints","authors":"A. Zribi, L. Zavalij, P. Borgesen, A. Primavera, G. Westby, E. Cotts","doi":"10.1109/ECTC.2001.927807","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927807","url":null,"abstract":"A simple model of the formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ in Pb-Sn solder/Ni interconnects is examined by numerical simulation. Previous experimental observation has shown that after reflow the interface consists of the Ni/sub 3/Sn/sub 4/ alloy between Pb-Sn solder and Ni, with Au distributed through the PbSn solder ball. Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ was observed to form at the Pb-Sn solder/Ni/sub 3/Sn/sub 4/ interface during annealing at 150/spl deg/C in a number of studies. The numerical simulation was used to calculate the maximum flux of Au to the interface, and with the assumption that this Au was immediately incorporated in to Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ a maximum rate of formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ was calculated. This rate was found to be similar to measured rates of formation of Au/sub 0.1/Ni/sub 0.1/Sn/sub 0.8/ from two different studies. The formation of(CuNi)6SnS in Sn-Ag-Cu/Ni solder interconnects was discussed within the context of these observations.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"466 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124493611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-29DOI: 10.1109/ECTC.2001.927977
E. Perfecto, Kang-Wook Lee, H. Hamel, T. Wassick, C. Cline, M. Oonk, C. Feger, D. Mcherron
Among the 3 types of polyimide (PI) systems, pre-imidized, polyamic ester and polyamic acid, the latter has been shown to react with Cu surfaces when it is spun coated. This paper reviews Cu-polyimide adhesion and diffusion data and present various wet process alternatives to minimize Cu diffusion into poly(biphenyl dianhydride-p-phenylene diamine) (BPDA-PDA) polyamic acid precursor. Two different process options were investigated: a precoat or adhesion promoters (A1100, AP420 and benzotriazole) prior to the polyamic acid apply, and an additive (Tetrazole or BTA) formulated in the PAA solution. The 5 processes were compared with respect to adhesion, capacitance, dielectric constant and reliability. Only the BTA formulation had adhesion problems which were attributed to the A1100 precoat used. A1100 as a precoat was further evaluated on various copper surfaces and curing environments. All proposed solutions performed well when used on a MCM-D/C module which was used to extract electrical parametrics and was further subjected to reliability testing.
{"title":"Evaluation of Cu capping alternatives for polyimide-Cu MCM-D","authors":"E. Perfecto, Kang-Wook Lee, H. Hamel, T. Wassick, C. Cline, M. Oonk, C. Feger, D. Mcherron","doi":"10.1109/ECTC.2001.927977","DOIUrl":"https://doi.org/10.1109/ECTC.2001.927977","url":null,"abstract":"Among the 3 types of polyimide (PI) systems, pre-imidized, polyamic ester and polyamic acid, the latter has been shown to react with Cu surfaces when it is spun coated. This paper reviews Cu-polyimide adhesion and diffusion data and present various wet process alternatives to minimize Cu diffusion into poly(biphenyl dianhydride-p-phenylene diamine) (BPDA-PDA) polyamic acid precursor. Two different process options were investigated: a precoat or adhesion promoters (A1100, AP420 and benzotriazole) prior to the polyamic acid apply, and an additive (Tetrazole or BTA) formulated in the PAA solution. The 5 processes were compared with respect to adhesion, capacitance, dielectric constant and reliability. Only the BTA formulation had adhesion problems which were attributed to the A1100 precoat used. A1100 as a precoat was further evaluated on various copper surfaces and curing environments. All proposed solutions performed well when used on a MCM-D/C module which was used to extract electrical parametrics and was further subjected to reliability testing.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124018242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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