Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.729993
S. Mori, K. Kuhara, T. Morisawa, N. Matsuzawa, Y. Kalmoto, M. Endo, T. Matsuo, M. Sasago
1. I n t r o d u c t i o n ArF excimer laser lithography is expected to produce the highest resolution in optical lithography, a n d its applicabhty to 0.13 pm device fabrication has been sufficiently demonstratedl*Z. For the fabrication of sub 0.10-pm devices, it w a s believed that the mix and match process using optical lithography and other types of lithography would be indispensable. One reason for this is the difficulty in fabricating contact holes with a larger process margin. The top surface imaging (TSI) process, which uses a silylated resist, is one approach for 193 nm lithography t h a t is currently being targeted for the sub-0.1-pm design rule. We demonstrate that TSI can be used to produce sub-0.1-pm device patterns. This paper presents a n overview of 0.1-pm pattern fabrication. We discuss the process margins for binary, isolated line, isolated space, and contact hole patterns. 2. E x p e r i m e n t We used the chemically amplified resist, NTS-4, from Sumitomo Chemical Co., Ltd. Silylation was done by using dimethylsilyldimethylamine (DMSDMA) in the vapor phase. And then, a silylated resist was developed in 0 2 S 0 ? plasma. The exposure tool was a n IS1 stepper (1OX reduction and 0.6-NA). 3. R e s u l t s and D i s c u s s i o n Good pattern profiles were obtained, for the 0.09-pm contact hole, 0.04-pn isolated line, and 0.06-pm space (Fig. 1). High sensitivities were achieved, 20 mJ/cm’ for the contact hole, 5 mJ/cm‘ for t he isolated line, and 7 mJ/cm‘ for the isolated space. The TSI process produces excellent lithographic patterns, for the isolated patterns. We etched a 1.0-pm thick Si02 film using a resist pattern as a mask. The vertical contact hole pattern (aspect ratio 12) in Fig. 2 (a) was obtained. After dry etching, the resist was successfully removed by O2 ashing without residue, Fig. 2 (b). An exposure latitude of +/10% was obtained with a 0.10-pm contact hole (Fig. 3(a)). The focus latitude was narrow for the Cr mask(Fig. 3(b)(c)). However, we can obtain a sufficient depth of focus (DOF) by using a n attenuated phase-shifting-mask (PSICI). This result is suitable for dynamic planarized substrates such as CMP process. Next, we evaluated the line and space binary pattern. We resolved the 0.085 pm line and space pattern, using a n alternative phase shifting mask (Fig. 4). We obtained a 0.7-pm DOF for 0.09 pm line a n d space pattern, using a n alternative phase shifting mask (Fig. 5). It is necessary to use a n alternative phase shifting mask for sub 0.10 pm line and space binary pattern fabrication. 4. S u m m a r y We have developed a 193-nm TSI process for the sub 0.10 pm device rule. We demonstrated that TSI is the advantages for isolated pattern fabrication. And w e demonstrated sub-0.10-pm line and space binary pattern fabrication. Sub-0.10-pm patterns were shown to produce by using the TSI process for 193 nm lithography. This work was performed under the management of ASET in MITT’S R&D program supported by the N
{"title":"Sub 0.1-/spl mu/m Pattern Fabrication Using a 193-nm TSI Process","authors":"S. Mori, K. Kuhara, T. Morisawa, N. Matsuzawa, Y. Kalmoto, M. Endo, T. Matsuo, M. Sasago","doi":"10.1109/IMNC.1998.729993","DOIUrl":"https://doi.org/10.1109/IMNC.1998.729993","url":null,"abstract":"1. I n t r o d u c t i o n ArF excimer laser lithography is expected to produce the highest resolution in optical lithography, a n d its applicabhty to 0.13 pm device fabrication has been sufficiently demonstratedl*Z. For the fabrication of sub 0.10-pm devices, it w a s believed that the mix and match process using optical lithography and other types of lithography would be indispensable. One reason for this is the difficulty in fabricating contact holes with a larger process margin. The top surface imaging (TSI) process, which uses a silylated resist, is one approach for 193 nm lithography t h a t is currently being targeted for the sub-0.1-pm design rule. We demonstrate that TSI can be used to produce sub-0.1-pm device patterns. This paper presents a n overview of 0.1-pm pattern fabrication. We discuss the process margins for binary, isolated line, isolated space, and contact hole patterns. 2. E x p e r i m e n t We used the chemically amplified resist, NTS-4, from Sumitomo Chemical Co., Ltd. Silylation was done by using dimethylsilyldimethylamine (DMSDMA) in the vapor phase. And then, a silylated resist was developed in 0 2 S 0 ? plasma. The exposure tool was a n IS1 stepper (1OX reduction and 0.6-NA). 3. R e s u l t s and D i s c u s s i o n Good pattern profiles were obtained, for the 0.09-pm contact hole, 0.04-pn isolated line, and 0.06-pm space (Fig. 1). High sensitivities were achieved, 20 mJ/cm’ for the contact hole, 5 mJ/cm‘ for t he isolated line, and 7 mJ/cm‘ for the isolated space. The TSI process produces excellent lithographic patterns, for the isolated patterns. We etched a 1.0-pm thick Si02 film using a resist pattern as a mask. The vertical contact hole pattern (aspect ratio 12) in Fig. 2 (a) was obtained. After dry etching, the resist was successfully removed by O2 ashing without residue, Fig. 2 (b). An exposure latitude of +/10% was obtained with a 0.10-pm contact hole (Fig. 3(a)). The focus latitude was narrow for the Cr mask(Fig. 3(b)(c)). However, we can obtain a sufficient depth of focus (DOF) by using a n attenuated phase-shifting-mask (PSICI). This result is suitable for dynamic planarized substrates such as CMP process. Next, we evaluated the line and space binary pattern. We resolved the 0.085 pm line and space pattern, using a n alternative phase shifting mask (Fig. 4). We obtained a 0.7-pm DOF for 0.09 pm line a n d space pattern, using a n alternative phase shifting mask (Fig. 5). It is necessary to use a n alternative phase shifting mask for sub 0.10 pm line and space binary pattern fabrication. 4. S u m m a r y We have developed a 193-nm TSI process for the sub 0.10 pm device rule. We demonstrated that TSI is the advantages for isolated pattern fabrication. And w e demonstrated sub-0.10-pm line and space binary pattern fabrication. Sub-0.10-pm patterns were shown to produce by using the TSI process for 193 nm lithography. This work was performed under the management of ASET in MITT’S R&D program supported by the N","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125864016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730041
M.B. Lee, K. Tsutsui, M. Ohtsu, N. Atoda
Ln conventional optical memory, the areal recording density is ultimately limited by diffraction of light since the recorded pit size depends on that of the focused laser beam spot. On the other hand, near-field optical memory currently receives a great attention as a means to increase the recording density drastically without limitation by diffraction since the pit is iiormed by a localized light on the apex of probe. The near-field optical memory of recording iknsity as high as 45 Gb/in2 was demonstrated [l], where tapered optical fiber probe with a tsubwavelength aperture on its end was employed. The near-field optical memory employing the fiber-type probe, however, lacks in high ta transmission rate, as is the case with other high-density memory based on scanning probe technique. This is mainly because it is impossible to scan the probe by a piezoelectric actuator at high enough speed while maintaining the tip-medium separation as close as order of ten nanometers. To overcome this problem, we have proposed a novel apertured probe array [2], as illustrated in Fig. 1, fabricated by Si planar process. It has concave pyramidal shaped grooves with nanometric apertures on their bottom ends. By combining the probe array with near-contact flying head technology of hard disk, e.g., we can realize high read-out rate in ultrahigh density near-field optical memory. In this paper, we describe the fabrication of the probe array by using the micromachining technique of Si. Our special concern is how to establish the fabrication method of nanometric-sized apertures with high reproducibility. The probe array was fabricated by lithography and anisotropic wet etching. As a block layer for further etching, we used the buried oxide of a silicon-on-insulator (SOI) wafer. A wafer with SO1 thickness of 9 pm was thermally oxidized to form 1.5 pm-thick S O , film. Large window regions with several square millimeters area were photolithographically defined the back side of the wafer to remove the sustaining bulk Si. The back side was anisotropically etched with a KOH aqueous solution (10wt.%, 80°C) until the etching stopped to expose the buried oxide layer. The thin upper Si layer on the front side was patterned in a 10 pm X 10 pm square array with photolithography, followed by the anisotropic etching. After the formation of the concave pyramidal grooves which are faceted with (111) planes of Si constrained by the oxide mask, the grooves slowly expand in the (111) direction. The etching was stopped at the instant the buried oxide appeared. The whole oxide was stripped away with BHF to form small apertures in the bottom of grooves, and a gold film was sputter-deposited from the front side to block the far-field light transmission. Finally, edge part of the Si bulk was removed by cutting off. Figure 2 shows the typical scanning electron micrographs (SEM) of the fabricated aperture array. The lateral aperture size of the probe array was 200 nm after 50-nm thick gold film
{"title":"Fabrication Of Nanometric Aperture Arrays By Wet Anisotropic Etching For Near-Field Optical Memory Application","authors":"M.B. Lee, K. Tsutsui, M. Ohtsu, N. Atoda","doi":"10.1109/IMNC.1998.730041","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730041","url":null,"abstract":"Ln conventional optical memory, the areal recording density is ultimately limited by diffraction of light since the recorded pit size depends on that of the focused laser beam spot. On the other hand, near-field optical memory currently receives a great attention as a means to increase the recording density drastically without limitation by diffraction since the pit is iiormed by a localized light on the apex of probe. The near-field optical memory of recording iknsity as high as 45 Gb/in2 was demonstrated [l], where tapered optical fiber probe with a tsubwavelength aperture on its end was employed. The near-field optical memory employing the fiber-type probe, however, lacks in high ta transmission rate, as is the case with other high-density memory based on scanning probe technique. This is mainly because it is impossible to scan the probe by a piezoelectric actuator at high enough speed while maintaining the tip-medium separation as close as order of ten nanometers. To overcome this problem, we have proposed a novel apertured probe array [2], as illustrated in Fig. 1, fabricated by Si planar process. It has concave pyramidal shaped grooves with nanometric apertures on their bottom ends. By combining the probe array with near-contact flying head technology of hard disk, e.g., we can realize high read-out rate in ultrahigh density near-field optical memory. In this paper, we describe the fabrication of the probe array by using the micromachining technique of Si. Our special concern is how to establish the fabrication method of nanometric-sized apertures with high reproducibility. The probe array was fabricated by lithography and anisotropic wet etching. As a block layer for further etching, we used the buried oxide of a silicon-on-insulator (SOI) wafer. A wafer with SO1 thickness of 9 pm was thermally oxidized to form 1.5 pm-thick S O , film. Large window regions with several square millimeters area were photolithographically defined the back side of the wafer to remove the sustaining bulk Si. The back side was anisotropically etched with a KOH aqueous solution (10wt.%, 80°C) until the etching stopped to expose the buried oxide layer. The thin upper Si layer on the front side was patterned in a 10 pm X 10 pm square array with photolithography, followed by the anisotropic etching. After the formation of the concave pyramidal grooves which are faceted with (111) planes of Si constrained by the oxide mask, the grooves slowly expand in the (111) direction. The etching was stopped at the instant the buried oxide appeared. The whole oxide was stripped away with BHF to form small apertures in the bottom of grooves, and a gold film was sputter-deposited from the front side to block the far-field light transmission. Finally, edge part of the Si bulk was removed by cutting off. Figure 2 shows the typical scanning electron micrographs (SEM) of the fabricated aperture array. The lateral aperture size of the probe array was 200 nm after 50-nm thick gold film ","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128942981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730097
H. Hasegawa
The so-called nanotechnology has recently made a great progress. Thus, the possibilities of constructing novel quantum electronic devices consisting artificial quantum structures such as quantum wells, wires, dots and single and multiple tunneling barriers, have become realistic. In this talk, the present status and key issues of research on the formation and device applications of compound semiconductor quantum nanostructures are presented and discussed, introducing recent results obtained by the author's group at RCIQE. Use of a UHV-based growth and processing system with suitable non-destructive characterization capabilities is a promising approach for formation of high-density arrays of defect free quantum nanostructures. An MBE based system of such a nature schematically shown in Fig. 1, which is installed at RCIQE, is described and its features are discussed. In spite of the superiority of the Si -based technology in the present and near-future ULSIs, 111-V materials seem to be more promising for high-density integration of quantum nanodevices, because, unlike Si, only 111-V materials allow formation of uniform, high density arrays of position-controlled, defect-free quantum wires and dots by combination of the EB-lithography and the selective MBE or MOVPE epitaxy on patterned or masked substrates. At RCIQE, the authors's group is engaged in formation of high density quantum wires and dots of InGaAs by selective MBE growth on pattered InP substrates. As an example, the preparation sequence and SEM and CL images of a wire-dot coupled structure for fabrication of single electron transistors (SETS) are shown in Fig.2. Status and future prospects of such a technology are discussed. Surface passivation becomes also a critical issue for quantum nanostructures. A unique Si interface control layer based structure, schematically shown in Fig.3, is being investigated at RCIQE for formation of high quality insulator-semiconductor interfaces on 111-V materials. Its formation and characterization using the UHV-based system in Fig. 1 are discussed. As for device applications, one can think of two lunds of electronic devices in the quantum regime, i.e., "quantum wave devices" and "single electron devices", since electrons manifest predominantly either wave-nature or particle-nature depending on their environments. In Japan, a multi-university national project dedicated to single electron devices ("SED" Project) is currently going (Head Investigator: H. Hasegawa, RCIQE, Period: April 1996 March 2000). Latest results of this "SED" project are briefly mentioned in the talk. At RCIQE, we were interested in both of quantum wave devices and single electron devices. To provide stronger electron confinement than that in previous split gate devices, we have proposed and tested two kinds of new Schottky gate structures which provide stronger electron confinement. They are Schottky in-plane gate (IPG) and Schottky wrap gate (WPG) structures, shown in Fig.4(a). Using
{"title":"Formation And Device Applications Of Compound Semiconductor Quantum Nanostructures","authors":"H. Hasegawa","doi":"10.1109/IMNC.1998.730097","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730097","url":null,"abstract":"The so-called nanotechnology has recently made a great progress. Thus, the possibilities of constructing novel quantum electronic devices consisting artificial quantum structures such as quantum wells, wires, dots and single and multiple tunneling barriers, have become realistic. In this talk, the present status and key issues of research on the formation and device applications of compound semiconductor quantum nanostructures are presented and discussed, introducing recent results obtained by the author's group at RCIQE. Use of a UHV-based growth and processing system with suitable non-destructive characterization capabilities is a promising approach for formation of high-density arrays of defect free quantum nanostructures. An MBE based system of such a nature schematically shown in Fig. 1, which is installed at RCIQE, is described and its features are discussed. In spite of the superiority of the Si -based technology in the present and near-future ULSIs, 111-V materials seem to be more promising for high-density integration of quantum nanodevices, because, unlike Si, only 111-V materials allow formation of uniform, high density arrays of position-controlled, defect-free quantum wires and dots by combination of the EB-lithography and the selective MBE or MOVPE epitaxy on patterned or masked substrates. At RCIQE, the authors's group is engaged in formation of high density quantum wires and dots of InGaAs by selective MBE growth on pattered InP substrates. As an example, the preparation sequence and SEM and CL images of a wire-dot coupled structure for fabrication of single electron transistors (SETS) are shown in Fig.2. Status and future prospects of such a technology are discussed. Surface passivation becomes also a critical issue for quantum nanostructures. A unique Si interface control layer based structure, schematically shown in Fig.3, is being investigated at RCIQE for formation of high quality insulator-semiconductor interfaces on 111-V materials. Its formation and characterization using the UHV-based system in Fig. 1 are discussed. As for device applications, one can think of two lunds of electronic devices in the quantum regime, i.e., \"quantum wave devices\" and \"single electron devices\", since electrons manifest predominantly either wave-nature or particle-nature depending on their environments. In Japan, a multi-university national project dedicated to single electron devices (\"SED\" Project) is currently going (Head Investigator: H. Hasegawa, RCIQE, Period: April 1996 March 2000). Latest results of this \"SED\" project are briefly mentioned in the talk. At RCIQE, we were interested in both of quantum wave devices and single electron devices. To provide stronger electron confinement than that in previous split gate devices, we have proposed and tested two kinds of new Schottky gate structures which provide stronger electron confinement. They are Schottky in-plane gate (IPG) and Schottky wrap gate (WPG) structures, shown in Fig.4(a). Using","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117199174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730109
B. Arnold, B. Koek, G. de Zwart, P. Luehrmann, P. Jenkins
{"title":"Step & Scan Lithography For Mass Production Applications","authors":"B. Arnold, B. Koek, G. de Zwart, P. Luehrmann, P. Jenkins","doi":"10.1109/IMNC.1998.730109","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730109","url":null,"abstract":"","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128931900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730067
T. Shinada, T. Matsukawa, I. Ohdornari
In the single ion implantation(SII), which enables us to implant dopant ions one by one in order for suppressing fluctuation in dopant number in a fine semiconductor region, extraction of single ions by chopping a focused ion beam and detection of secondary electrons(SEs) emitted from the target upon each ion incidence are the key technology for the precise control of the ion number. There are at least three factors which deteriorate the advantage of the SII. They are the less than one probability of SE detection, smaller number of ions which actually stay in a fine semiconductor region due to range straggling, and insufficient electrical activation of the implanted ions. Since the latter two factors are common to the conventional ion implantation, we have investigated the influence of SE detection efficiency in this work. 2. Definition of quantities used in this work First , we define the quantities used in this work as schematically shown in fig. 1. Nion is the number of ions to be implanted, NSE the number of pulses counted in a PMT by detecting SEs emitted upon each ion incidence, NT total number of ions actually implanted due to the less than one efficiency ( t ) of SE detection, NI the number of ions which stay in the top-Si region and n the number of ions electrically activated after annealing. SE detection efficiency t is defined as NSE/Nion, ratio of ions implanted in top-Si region as Nl/NT, and electrical activation ratio rj as n/NI, respectively. By using these quantities, n is expressed as n= rj N,=Q 5 NT=( v 5 15 INIon. 3. Experimental 60 keV P2+ single ions were implanted into test specimens. The number of ions to be implanted was set to be 990 and 19180 u.m2. The detection efficiency 5 was chosen to be 56 and 91% in order to investigate the influence of ,E on the controllability of ion number. 91% is the highest value of t obtained for SiO, in our system. The lower & can be easily achieved by decreasing the gain of a PMT. After single ion implantation and the subsequent annealing, the sheet electron concentration was evaluated by Hall measurement at room temperaturie. 4. Results and discussion The results are summarized in table 1. For the number of ions to be implanted, 990 and 1980 [ m2], the sheet electron concentration is estimated to be 770-809 and 2423-2555, respectively, by taking all the factors as shown in fig. 1 into account. NI was calculated by using the process simulator "SUPREM-IV". The value of 92-97'3, had been obtained for v beforehand by comparing the electron concentration in a bulk-Si implanted with P and the P concentration measured with SIMS. The sheet electron concentration was 798 and 2530 for the Nion of 990 and 1980, respectively. Although there is small discrepancy between Ni, and nmeas., the latter coincide quite well with the estimated values. This verifies the advantage of SI1 in controlling the number of dopant atoms in a laterally confined fine semiconductor region. We previously assessed the relatio
{"title":"Controllability Of Dopant Ion Number In Single Ion Implantation","authors":"T. Shinada, T. Matsukawa, I. Ohdornari","doi":"10.1109/IMNC.1998.730067","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730067","url":null,"abstract":"In the single ion implantation(SII), which enables us to implant dopant ions one by one in order for suppressing fluctuation in dopant number in a fine semiconductor region, extraction of single ions by chopping a focused ion beam and detection of secondary electrons(SEs) emitted from the target upon each ion incidence are the key technology for the precise control of the ion number. There are at least three factors which deteriorate the advantage of the SII. They are the less than one probability of SE detection, smaller number of ions which actually stay in a fine semiconductor region due to range straggling, and insufficient electrical activation of the implanted ions. Since the latter two factors are common to the conventional ion implantation, we have investigated the influence of SE detection efficiency in this work. 2. Definition of quantities used in this work First , we define the quantities used in this work as schematically shown in fig. 1. Nion is the number of ions to be implanted, NSE the number of pulses counted in a PMT by detecting SEs emitted upon each ion incidence, NT total number of ions actually implanted due to the less than one efficiency ( t ) of SE detection, NI the number of ions which stay in the top-Si region and n the number of ions electrically activated after annealing. SE detection efficiency t is defined as NSE/Nion, ratio of ions implanted in top-Si region as Nl/NT, and electrical activation ratio rj as n/NI, respectively. By using these quantities, n is expressed as n= rj N,=Q 5 NT=( v 5 15 INIon. 3. Experimental 60 keV P2+ single ions were implanted into test specimens. The number of ions to be implanted was set to be 990 and 19180 u.m2. The detection efficiency 5 was chosen to be 56 and 91% in order to investigate the influence of ,E on the controllability of ion number. 91% is the highest value of t obtained for SiO, in our system. The lower & can be easily achieved by decreasing the gain of a PMT. After single ion implantation and the subsequent annealing, the sheet electron concentration was evaluated by Hall measurement at room temperaturie. 4. Results and discussion The results are summarized in table 1. For the number of ions to be implanted, 990 and 1980 [ m2], the sheet electron concentration is estimated to be 770-809 and 2423-2555, respectively, by taking all the factors as shown in fig. 1 into account. NI was calculated by using the process simulator \"SUPREM-IV\". The value of 92-97'3, had been obtained for v beforehand by comparing the electron concentration in a bulk-Si implanted with P and the P concentration measured with SIMS. The sheet electron concentration was 798 and 2530 for the Nion of 990 and 1980, respectively. Although there is small discrepancy between Ni, and nmeas., the latter coincide quite well with the estimated values. This verifies the advantage of SI1 in controlling the number of dopant atoms in a laterally confined fine semiconductor region. We previously assessed the relatio","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129373799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730016
H. Ko, S. Fujita
Fabrication of semiconductor nanostructures such as quantum wires and quantum dots is very important for realization of new functional quantum devices. Among the various methods, a self-organization technique using the Stranski-Krastanow (S-K) growth mode in strained system has received great interest because high quality nano-scaled islands can be easily formed by epitaxial growth without any minute lithographic processes. However, since the spatial distributions of these islands are random, it is difficult to obtain a precise control of characteristics of the device. Several groups have attempted to control the islands to be linearly ordered. However, only irregular short-range arrays (less than 1 pm) were obtained [1,2].
{"title":"Self-Organizing Process Of Moderately Strained Zn/sub 1-x/CdxSe Layer Grown On GaAs","authors":"H. Ko, S. Fujita","doi":"10.1109/IMNC.1998.730016","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730016","url":null,"abstract":"Fabrication of semiconductor nanostructures such as quantum wires and quantum dots is very important for realization of new functional quantum devices. Among the various methods, a self-organization technique using the Stranski-Krastanow (S-K) growth mode in strained system has received great interest because high quality nano-scaled islands can be easily formed by epitaxial growth without any minute lithographic processes. However, since the spatial distributions of these islands are random, it is difficult to obtain a precise control of characteristics of the device. Several groups have attempted to control the islands to be linearly ordered. However, only irregular short-range arrays (less than 1 pm) were obtained [1,2].","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115393887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730062
Hongmin Kim, Hyung‐Ho Park
The basic technological trend in ultra large-scaled integration is the realization of a higher device speed with closer packing density, which results in multilevel interconnection structure. Interconnection delay, generally termed resistance-capacitance (RC) time delay, which is mainly dominated by parasitic capacitance between metal interconnections, has received a great deal of attention over the basic gate delay in the deep submicron devices. Therefore, low K (i.e., low dielectric constant) materials, which substitute for conventional intermetal dielectric (IMD), have become imperative for the reduction of parasitic capacitance between multi-level layers. Sol-gel derived SiO, aerogel film can be one of the prospective candidates for IMD material, because a very low dielectric constant can be achieved from its inherent high porosity. But from the characteristics of sol-gel derived process, skeletal network of SiO, aerogel film contains a number of Si-OR (R=alkoxyl group) and Si-OH bonds and absorbed water as internal species. And degradation of the electrical properties such as dielectric constant and leakage current density was observed due to the above polarizable species. A possible application of 0, plasma treatment using inductively coupled plasma (ICP) to SO, aerogel film at room temperature was introduced for the control of internal surface chemical species in the film. SiO, aerogel films were synthesized on a p-Si substrate by the supercritical drying method. After the supercritical drying process, the films were subjected to an 0, plasma treatment at room temperature. The chemical composition and film porosity were determined by Rutherford backscattering spectroscopy (RBS). The surface morphology and thickness of films were observed using scanning electron microscopy (SEM). To investigate the change of chemical species and surface chemical bonding state, X-ray photoelectron spectroscopy (XPS) was used. Leakage current behavior was evaluated. The composition of films, e.g., ratios of O/Si and C/Si, was measured to be 1:2.5.1.0 for as-prepared SO, aerogel film and 1:2.1:0.03 for oxygen plasma treated film using RBS The carbon content in the films decreased drastically after the oxygen plasma treatment. It was caused by the reduction of internal surface organics in SiO, aerogel film The widescan XPS results of SiO, aerogel films before and after the oxygen plasma treatment are given in Fig. 1. Even though Si, 0, and C peaks can be found in both films, the intensity of C I s peak remarkably decreased in oxygen plasma treated film. This result is in agreement with RBS analysis. The variation of surface morphology and thickness in SiO, aerogel film by oxygen plasma treatment is given in Fig. 2. 600 W of ICP power brought about the growth of particle size only at uppermost surface layer. Also, the thickness of the film decreased remarkably, however the porosity of the film decreased by only 5 Yo. Leakage current characteristics of SiO, aerog
{"title":"Structural And Compositional Evolution Of SiO/sub 2/ Aerogel Film By Oxygen Plasma Treatment","authors":"Hongmin Kim, Hyung‐Ho Park","doi":"10.1109/IMNC.1998.730062","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730062","url":null,"abstract":"The basic technological trend in ultra large-scaled integration is the realization of a higher device speed with closer packing density, which results in multilevel interconnection structure. Interconnection delay, generally termed resistance-capacitance (RC) time delay, which is mainly dominated by parasitic capacitance between metal interconnections, has received a great deal of attention over the basic gate delay in the deep submicron devices. Therefore, low K (i.e., low dielectric constant) materials, which substitute for conventional intermetal dielectric (IMD), have become imperative for the reduction of parasitic capacitance between multi-level layers. Sol-gel derived SiO, aerogel film can be one of the prospective candidates for IMD material, because a very low dielectric constant can be achieved from its inherent high porosity. But from the characteristics of sol-gel derived process, skeletal network of SiO, aerogel film contains a number of Si-OR (R=alkoxyl group) and Si-OH bonds and absorbed water as internal species. And degradation of the electrical properties such as dielectric constant and leakage current density was observed due to the above polarizable species. A possible application of 0, plasma treatment using inductively coupled plasma (ICP) to SO, aerogel film at room temperature was introduced for the control of internal surface chemical species in the film. SiO, aerogel films were synthesized on a p-Si substrate by the supercritical drying method. After the supercritical drying process, the films were subjected to an 0, plasma treatment at room temperature. The chemical composition and film porosity were determined by Rutherford backscattering spectroscopy (RBS). The surface morphology and thickness of films were observed using scanning electron microscopy (SEM). To investigate the change of chemical species and surface chemical bonding state, X-ray photoelectron spectroscopy (XPS) was used. Leakage current behavior was evaluated. The composition of films, e.g., ratios of O/Si and C/Si, was measured to be 1:2.5.1.0 for as-prepared SO, aerogel film and 1:2.1:0.03 for oxygen plasma treated film using RBS The carbon content in the films decreased drastically after the oxygen plasma treatment. It was caused by the reduction of internal surface organics in SiO, aerogel film The widescan XPS results of SiO, aerogel films before and after the oxygen plasma treatment are given in Fig. 1. Even though Si, 0, and C peaks can be found in both films, the intensity of C I s peak remarkably decreased in oxygen plasma treated film. This result is in agreement with RBS analysis. The variation of surface morphology and thickness in SiO, aerogel film by oxygen plasma treatment is given in Fig. 2. 600 W of ICP power brought about the growth of particle size only at uppermost surface layer. Also, the thickness of the film decreased remarkably, however the porosity of the film decreased by only 5 Yo. Leakage current characteristics of SiO, aerog","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"63 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127408030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Positive-Tone E-Beam Lithography With Surface Silylation Of Negative-Tone Commercial Photoresists Sal 601 And AZPN 114","authors":"E. Tegou, E. Gogolides, P. Argitis, Z. Cui","doi":"10.1109/IMNC.1998.730074","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730074","url":null,"abstract":"POSITIVE-TONE E-BEAM LITHOGRAPHY WITH SURFACE SILYLATION OF NEGATIVE-Tom COMMERCIAL PHOTORESISTS SAL 601. AND AZPN 1 14. Evangelia Tegou, Evangelos Gogolides, Panagiotis Argitis and Zheng Cui” Institute of Microelectronics IMEL, NCSR “Demokritos”, PO Box 60228, Aghia Paraskevi, Attiki Greece 153 10 aCentral Microstructure Facility, Rutherford Appleton Laboratory, Chilton Didcot, Oxon, OX1 1 OQX, UK","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126935697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Tanaka, M. Nakao, Y. Hatamura, M. Komuro, H. Hiroshima, M. Hatakeyama
In this paper, a near-field photolithographic method which can realize ultra high resolution beyond the diffraction limit of light is described. Evanescent light generated on a transparent mold with a micro-relief illuminated on the condition of total internal reflection is used to expose a photoresist in contact with the mold. The plastic replica mold is flexible to eliminate the difficulty of close contact with the photoresist, and the replica mold damaged by the contact with the photoresist is disposable to maintain a high yield rate. We printed sub-100 nm features on a commercially available photoresist using 442-nm-wavelength light.
{"title":"Printing Sub-100 Nanometer Features Near-Field Photolithography","authors":"S. Tanaka, M. Nakao, Y. Hatamura, M. Komuro, H. Hiroshima, M. Hatakeyama","doi":"10.1143/JJAP.37.6739","DOIUrl":"https://doi.org/10.1143/JJAP.37.6739","url":null,"abstract":"In this paper, a near-field photolithographic method which can realize ultra high resolution beyond the diffraction limit of light is described. Evanescent light generated on a transparent mold with a micro-relief illuminated on the condition of total internal reflection is used to expose a photoresist in contact with the mold. The plastic replica mold is flexible to eliminate the difficulty of close contact with the photoresist, and the replica mold damaged by the contact with the photoresist is disposable to maintain a high yield rate. We printed sub-100 nm features on a commercially available photoresist using 442-nm-wavelength light.","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"224 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132367742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-07-13DOI: 10.1109/IMNC.1998.730021
Dong-il Park, S. Hahm, Jong-Hyun Lee, Jung-Hee Lee
I . I n t r o d u c t i o n For many applications u l t r a f i n e s t ructures have been fabricated by opt ical lithography, dry etching, AFM machining tool and electron beam lithography. However these methods need high cos t and complicated process for la rge scale process. I n t h e past we have reported on nanometer scale formation with 20 nm gap based on polysilicon layer"'. Now we w i l l present a simple nanometer scale formation technique with s i l i c o n layer and w i l l e lucidate the formation mechanism. 11. Experiment A schematic diagram of the key fabrication process f o r wedge type nanostructure is presented i n Figure l ( a ) . A Si3N4 layer of 1600 A was deposited by LPCM a t 700 -C on SIMOX wafer with 4000 A-thick-SiOz. After photolithography pat terning of the electrodes, which were i n i t i a l l y merged, the Si& and Si layers were etched by dry etching The bottom Si02 layer was p a r t i a l l y etched under control, and the samples were annealed i n N2 ambient with the various temperature and t h e time. Figure l (b) shows the schematic view of fabr icated wedge type s t ruc ture with gap. The gap was formed a t the minimum cross sect ion area of the patterned wedge by stress which had been generated during annealing and cooling. Figure 2 shows the qua l i ta t ive dis t r ibut ion of the s t r e s s i n each layer formed during the annealing process"'. The compressive stress formed i n each layers f i n a l l y a c t a s a tens i le stress a t the minimum cross sect ion area of s t ructure . If the t e n s i l e thermal stress was large, the merged area was s p l i t t e d i n t o two par t and formed a gap between them, Figure 3 shows the gap spacing with annealing time evolution a t 1100 "C a f t e r l a t e r a l l y 2 pm and 11 pm Si02 etching. The gap was saturated about 250 nm and a b u t 190 nm f o r 2 ,um and 11 pm Si02 etching respectively. The gap width of 30 samples measured was within *lox of average saturation value. I t was thought tha t the difference of the gaps between the two l a t e r a l Si02 etching conditions was caused by the f a c t tha t the Si02 layer act a s repulsive force for tensi le thermal stress a t minimum cross section area. Figure 4 shows the scanning electron microscopy (SEMI photography of typical fabr icated nanostructure with about 250 nm gap which was formed a f t e r annealing a t 1100 'C for 1 hour Conclusion We fabricated the s i l i con nanostructure wi th nanometer sca le gap using thin film s t r e s s The gap width which was formed i n the layers during thermal annealing a t high temperature could be controlled by annealing temperature and annealing time.
我。在光学光刻、干式蚀刻、AFM加工工具和电子束光刻等技术的广泛应用中，制备了大量的光学光刻、干式蚀刻、电子束光刻等技术。但这些方法成本高，工艺复杂，适用于大规模工艺。在过去，我们已经报道了基于多晶硅层的20纳米间隙的纳米级形成。现在，我们将提出一种简单的纳米尺度的形成技术，将纳米尺度的形成技术与纳米层相结合，并阐明形成机理。11. 图1 (A)给出了楔形纳米结构的关键制备工艺示意图。在厚度为4000 A- sioz的SIMOX晶片上，用LPCM法在厚度为700 -C的SIMOX晶片上沉积了1600 A的Si3N4层。在光刻成片后，将硅和硅两层进行干燥蚀刻，底部的二氧化硅层在控制下蚀刻，并在不同温度和时间的N2环境下进行退火。图1 (b)为带间隙的预制楔型结构示意图。该间隙是由退火和冷却过程中产生的应力在图案楔的最小横截面积处形成的。图2显示了在退火过程中形成的每一层中所含的金属的分布情况。我n层形成的压应力f i n y l l c t年代十我勒强调一个t的最小横教派离子面积s t生成。如果热应力较大，则合并面积为1 / 2，并形成间隙，图3显示了在1 / 1100℃下，在2 pm和11 pm Si02刻蚀时，两者之间的间隙随退火时间的演变。在2 μ m和11 μ m的sio2蚀刻下，间隙分别饱和在250 nm和190 nm左右。所测30个样品的间隙宽度均在平均饱和值的*lox以内。本文认为，在不同的sio2刻蚀条件下，两者之间的间隙差异是由于sio2层对拉伸热应力的排斥力小于最小横截面面积造成的。图4显示了典型的扫描电镜(半摄影fabr icated纳米结构差距约250海里,是形成了一个f t e r退火1100 C 1小时的结论我们捏造的年代我l con纳米结构将纳米sca le差距使用薄膜t r e s年代形成的间隙宽度我n层在高温热退火t可以控制退火温度和退火时间。
{"title":"Fabrication Of Nanometer Scale Structure Using Thin Film Stress","authors":"Dong-il Park, S. Hahm, Jong-Hyun Lee, Jung-Hee Lee","doi":"10.1109/IMNC.1998.730021","DOIUrl":"https://doi.org/10.1109/IMNC.1998.730021","url":null,"abstract":"I . I n t r o d u c t i o n For many applications u l t r a f i n e s t ructures have been fabricated by opt ical lithography, dry etching, AFM machining tool and electron beam lithography. However these methods need high cos t and complicated process for la rge scale process. I n t h e past we have reported on nanometer scale formation with 20 nm gap based on polysilicon layer\"'. Now we w i l l present a simple nanometer scale formation technique with s i l i c o n layer and w i l l e lucidate the formation mechanism. 11. Experiment A schematic diagram of the key fabrication process f o r wedge type nanostructure is presented i n Figure l ( a ) . A Si3N4 layer of 1600 A was deposited by LPCM a t 700 -C on SIMOX wafer with 4000 A-thick-SiOz. After photolithography pat terning of the electrodes, which were i n i t i a l l y merged, the Si& and Si layers were etched by dry etching The bottom Si02 layer was p a r t i a l l y etched under control, and the samples were annealed i n N2 ambient with the various temperature and t h e time. Figure l (b) shows the schematic view of fabr icated wedge type s t ruc ture with gap. The gap was formed a t the minimum cross sect ion area of the patterned wedge by stress which had been generated during annealing and cooling. Figure 2 shows the qua l i ta t ive dis t r ibut ion of the s t r e s s i n each layer formed during the annealing process\"'. The compressive stress formed i n each layers f i n a l l y a c t a s a tens i le stress a t the minimum cross sect ion area of s t ructure . If the t e n s i l e thermal stress was large, the merged area was s p l i t t e d i n t o two par t and formed a gap between them, Figure 3 shows the gap spacing with annealing time evolution a t 1100 \"C a f t e r l a t e r a l l y 2 pm and 11 pm Si02 etching. The gap was saturated about 250 nm and a b u t 190 nm f o r 2 ,um and 11 pm Si02 etching respectively. The gap width of 30 samples measured was within *lox of average saturation value. I t was thought tha t the difference of the gaps between the two l a t e r a l Si02 etching conditions was caused by the f a c t tha t the Si02 layer act a s repulsive force for tensi le thermal stress a t minimum cross section area. Figure 4 shows the scanning electron microscopy (SEMI photography of typical fabr icated nanostructure with about 250 nm gap which was formed a f t e r annealing a t 1100 'C for 1 hour Conclusion We fabricated the s i l i con nanostructure wi th nanometer sca le gap using thin film s t r e s s The gap width which was formed i n the layers during thermal annealing a t high temperature could be controlled by annealing temperature and annealing time.","PeriodicalId":356908,"journal":{"name":"Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114575772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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