Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807659
V. Hahanov, E. Litvinova, S. Chumachenko, M. Liubarskyi
Qubit models for defining the structures and functionalities are developed to improve the performance of the analysis of digital devices by increasing the dimension of the data and memory structures. The basic concepts, terminology, definitions, necessary for the implementation of quantum computation in the practice of modeling computer structures, are introduced. The examples proving the efficiency of qubit data structures for parallel operations on the data are represented.
{"title":"Qubit description of the functions and structures for computing","authors":"V. Hahanov, E. Litvinova, S. Chumachenko, M. Liubarskyi","doi":"10.1109/EWDTS.2016.7807659","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807659","url":null,"abstract":"Qubit models for defining the structures and functionalities are developed to improve the performance of the analysis of digital devices by increasing the dimension of the data and memory structures. The basic concepts, terminology, definitions, necessary for the implementation of quantum computation in the practice of modeling computer structures, are introduced. The examples proving the efficiency of qubit data structures for parallel operations on the data are represented.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133310991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807645
V. Lesnikov, T. Naumovich, A. Chastikov
In this paper for implementation of IIR digital filters, it is offered to use structures, which have a number of degrees of freedom significantly more than a number of degrees of freedom of transfer function. Such redundancy allows reducing a length of a fractional part of the filter coefficients without loss of accuracy of transfer function implementation.
{"title":"The use of redundancy in the structural synthesis of IIR digital filters","authors":"V. Lesnikov, T. Naumovich, A. Chastikov","doi":"10.1109/EWDTS.2016.7807645","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807645","url":null,"abstract":"In this paper for implementation of IIR digital filters, it is offered to use structures, which have a number of degrees of freedom significantly more than a number of degrees of freedom of transfer function. Such redundancy allows reducing a length of a fractional part of the filter coefficients without loss of accuracy of transfer function implementation.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133453777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807730
D. Bezuglov, M. Zvezdina, L. Cherckesova, Yulia A. Shokova, N. Prokopenko, G. N. Shalamov, G. Sinyavsky, O. Manaenkova
In the paper composite media based on chiral elements with various periodic inclusions are considered. These media are artificial crystals, in which structural resonances are observed. Under certain conditions particles of these crystals have resonance-frequency behavior, manifesting in a rapid change of media parameters at certain frequency ranges. Composite media based on resonant particles, into which a defect is introduced (by removing an element out of crystal lattice) can be used as high quality (high-Q) resonator. If the defect introduction is continued, it is possible to make a waveguide channel and, thus, to create a wide range of functional elements, as well as devices of new generation based on these elements, - a new class of perspective devices of microwave and THz-ranges. In the course of investigations electrodynamic characteristics of chiral media are estimated, constitutive equations are found, and the influence of ferromagnetic materials on propagation conditions of electromagnetic waves is researched.
{"title":"Composite media based on chiral elements and their combinations with ferromagnetic structures","authors":"D. Bezuglov, M. Zvezdina, L. Cherckesova, Yulia A. Shokova, N. Prokopenko, G. N. Shalamov, G. Sinyavsky, O. Manaenkova","doi":"10.1109/EWDTS.2016.7807730","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807730","url":null,"abstract":"In the paper composite media based on chiral elements with various periodic inclusions are considered. These media are artificial crystals, in which structural resonances are observed. Under certain conditions particles of these crystals have resonance-frequency behavior, manifesting in a rapid change of media parameters at certain frequency ranges. Composite media based on resonant particles, into which a defect is introduced (by removing an element out of crystal lattice) can be used as high quality (high-Q) resonator. If the defect introduction is continued, it is possible to make a waveguide channel and, thus, to create a wide range of functional elements, as well as devices of new generation based on these elements, - a new class of perspective devices of microwave and THz-ranges. In the course of investigations electrodynamic characteristics of chiral media are estimated, constitutive equations are found, and the influence of ferromagnetic materials on propagation conditions of electromagnetic waves is researched.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125420616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807636
Forostyanova Mariya, Dongak Barkhas
The paper is devoted to the mutation testing technique that is widely used when testing different software tools. This paper presents a comparative analysis of two mutation testing tools for Java programs, namely Pitest and /Java. They both allow automatically introducing faults into a software code. The analysis has revealed their pros and cons, as well as specific features of their launch and application. Such comparison can help to select the choose the most appropriate mutation tool or the combination of these tools when testing Java programs. We further discuss how these two tools might be combined and which of the two tools better for the mutation generation.
{"title":"A comparative analysis of mutation testing tools for Java","authors":"Forostyanova Mariya, Dongak Barkhas","doi":"10.1109/EWDTS.2016.7807636","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807636","url":null,"abstract":"The paper is devoted to the mutation testing technique that is widely used when testing different software tools. This paper presents a comparative analysis of two mutation testing tools for Java programs, namely Pitest and /Java. They both allow automatically introducing faults into a software code. The analysis has revealed their pros and cons, as well as specific features of their launch and application. Such comparison can help to select the choose the most appropriate mutation tool or the combination of these tools when testing Java programs. We further discuss how these two tools might be combined and which of the two tools better for the mutation generation.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131544611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807696
Grigor Tshagharyan, Gurgen Harutunyan, S. Shoukourian, Y. Zorian
The rapid development in the modern technology and its widespread utilization in number of applications brings in new challenges that need to be addressed. Security is one of such challenges that has grown into a major concern over the years. Periodically new incidents of data and system breaches are reported. For this purpose, usually different side channels in the system are being exploited by the attackers to bypass the protection mechanisms. Especially vulnerable with this regard is the traditional test and debug infrastructure placed on the System on Chips (SoC) which provides an alternative path into the chip internal structure. The aim of this paper is to present a comprehensive overview of various security aspects of SoCs including the known threat models, classification of attackers and existing techniques as well as present the solution concept for secure SoC Test Infrastructure with the focus on embedded cores testing.
{"title":"Securing test infrastructure of system-on-chips","authors":"Grigor Tshagharyan, Gurgen Harutunyan, S. Shoukourian, Y. Zorian","doi":"10.1109/EWDTS.2016.7807696","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807696","url":null,"abstract":"The rapid development in the modern technology and its widespread utilization in number of applications brings in new challenges that need to be addressed. Security is one of such challenges that has grown into a major concern over the years. Periodically new incidents of data and system breaches are reported. For this purpose, usually different side channels in the system are being exploited by the attackers to bypass the protection mechanisms. Especially vulnerable with this regard is the traditional test and debug infrastructure placed on the System on Chips (SoC) which provides an alternative path into the chip internal structure. The aim of this paper is to present a comprehensive overview of various security aspects of SoCs including the known threat models, classification of attackers and existing techniques as well as present the solution concept for secure SoC Test Infrastructure with the focus on embedded cores testing.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133658642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807739
L. Martirosyan
For System-on-Chips (SoCs) one of the most critical design constraints are gate count and power consumption. This paper presents a quality characteristics estimation methodology for STAR Memory System (SMS) network. Our proposed methodology is based on linear and polynomial approximation. The obtained approximate functions are embedded in scripts that were developed for automated estimation of gate count and power consumption. The mentioned methodology enables to perform area and power-aware SMS network design at early stages of SoC design.
{"title":"A quality characteristics estimation methodology for the hierarchy of RTL compilers","authors":"L. Martirosyan","doi":"10.1109/EWDTS.2016.7807739","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807739","url":null,"abstract":"For System-on-Chips (SoCs) one of the most critical design constraints are gate count and power consumption. This paper presents a quality characteristics estimation methodology for STAR Memory System (SMS) network. Our proposed methodology is based on linear and polynomial approximation. The obtained approximate functions are embedded in scripts that were developed for automated estimation of gate count and power consumption. The mentioned methodology enables to perform area and power-aware SMS network design at early stages of SoC design.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123717863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807750
A. Drozd, J. Drozd, S. Antoshchuk, V. Nikul, M. Al-dhabi
This paper is devoted to the development of objects and methods in on-line testing. Requirements imposed to computer systems and on-line testing of their digital components are analyzed in efficiency of use of resources and in restriction of the hidden processes. The low level of execution of these requirements in the modern computer systems and in circuits of on-line testing because of domination of the array structures relating to the bottom level of resource development is shown. Abbreviation of array structures by conversion of the modern computer systems to multithreaded systems of the bitwise pipelines increasing the level in execution of requirements is offered. The methods of their on-line testing estimating value of result and its error are considered.
{"title":"Objects and methods of on-line testing: Main requirements and perspectives of development","authors":"A. Drozd, J. Drozd, S. Antoshchuk, V. Nikul, M. Al-dhabi","doi":"10.1109/EWDTS.2016.7807750","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807750","url":null,"abstract":"This paper is devoted to the development of objects and methods in on-line testing. Requirements imposed to computer systems and on-line testing of their digital components are analyzed in efficiency of use of resources and in restriction of the hidden processes. The low level of execution of these requirements in the modern computer systems and in circuits of on-line testing because of domination of the array structures relating to the bottom level of resource development is shown. Abbreviation of array structures by conversion of the modern computer systems to multithreaded systems of the bitwise pipelines increasing the level in execution of requirements is offered. The methods of their on-line testing estimating value of result and its error are considered.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123896926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807629
Zaza Davitadze, G. Partenadze, Elza Djincharadze
In this paper, it is presented the Arduino Uno single board microcontroller based system, which measures air condition parameters, and also the developed software for graphical visualization of the measurement results. The results and working principles of some type of Arduino boards are analyzed. The developed software for Arduino data parameter visualization is described. An experimental prototype is produced. The DHT-11 sensors for temperature and moisture measurements, as well as the WSP1110 Nitrogen Dioxide NO2 sensors are used in the project. Software for Arduino measurement parameter graphical visualization is developed by using Java, Javascript, Jquery, Html, Css, PhP programming languages. The software execution and the main requirements for the running of this project are analyzed. It was written a software code for Arduino IDE (Sketch), which controls temperature, moisture and Nitrogen Dioxide NO2 sensors.
本文介绍了基于Arduino Uno单板单片机的空调参数测量系统，并开发了测量结果的图形化可视化软件。分析了几种Arduino板的工作原理和测试结果。介绍了开发的Arduino数据参数可视化软件。制作了实验样机。用于温度和湿度测量的DHT-11传感器以及WSP1110二氧化氮NO2传感器在该项目中使用。采用Java、Javascript、Jquery、Html、Css、PhP等编程语言开发了Arduino测量参数图形化可视化软件。分析了本项目的软件执行和运行的主要要求。它是为Arduino IDE (Sketch)编写的软件代码，用于控制温度，湿度和二氧化氮NO2传感器。
{"title":"Graphical visualization of data measurement of programmable microcontroller according to ARDUINO-project example","authors":"Zaza Davitadze, G. Partenadze, Elza Djincharadze","doi":"10.1109/EWDTS.2016.7807629","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807629","url":null,"abstract":"In this paper, it is presented the Arduino Uno single board microcontroller based system, which measures air condition parameters, and also the developed software for graphical visualization of the measurement results. The results and working principles of some type of Arduino boards are analyzed. The developed software for Arduino data parameter visualization is described. An experimental prototype is produced. The DHT-11 sensors for temperature and moisture measurements, as well as the WSP1110 Nitrogen Dioxide NO2 sensors are used in the project. Software for Arduino measurement parameter graphical visualization is developed by using Java, Javascript, Jquery, Html, Css, PhP programming languages. The software execution and the main requirements for the running of this project are analyzed. It was written a software code for Arduino IDE (Sketch), which controls temperature, moisture and Nitrogen Dioxide NO2 sensors.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124783364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807701
A. I. Smekalov, V. Djigan
This paper presents a digital frequency translation by the CORDIC rotator (COordinate Rotation DIgital Computer) which does not require a complex multiplier and a phase-to-exponent converter. The CORDIC algorithm overview and detailed implementation architecture are presented. The architecture is fitted to implementation in high speed designs and using in Application-Specific Integrated Circuits (ASIC) or Field Programmable Gate Arrays (FPGA). The simulation results demonstrate the performance of proposed frequency translator in terms of Normalized Mean-Square Error (NMSE) and spectral purity. The proposed architecture requires about 79 times less resources compared to the conventional approach with a complex multiplier and Numerically Controlled Oscillator (NCO) at the same level 98 dB of Spurious Free Dynamic Range (SFDR).
本文提出了一种利用坐标旋转数字计算机(CORDIC rotator, COordinate Rotation digital Computer)进行数字频率转换的方法，该方法不需要复乘法器和相位指数转换器。给出了CORDIC算法概述和详细的实现体系结构。该体系结构适用于高速设计和专用集成电路(ASIC)或现场可编程门阵列(FPGA)。仿真结果证明了该频率转换器在归一化均方误差(NMSE)和频谱纯度方面的性能。在相同的无杂散动态范围(SFDR)为98 dB的水平上，与传统的复杂乘子和数控振荡器(NCO)相比，该架构所需的资源减少了约79倍。
{"title":"CORDIC rotator for frequency translation","authors":"A. I. Smekalov, V. Djigan","doi":"10.1109/EWDTS.2016.7807701","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807701","url":null,"abstract":"This paper presents a digital frequency translation by the CORDIC rotator (COordinate Rotation DIgital Computer) which does not require a complex multiplier and a phase-to-exponent converter. The CORDIC algorithm overview and detailed implementation architecture are presented. The architecture is fitted to implementation in high speed designs and using in Application-Specific Integrated Circuits (ASIC) or Field Programmable Gate Arrays (FPGA). The simulation results demonstrate the performance of proposed frequency translator in terms of Normalized Mean-Square Error (NMSE) and spectral purity. The proposed architecture requires about 79 times less resources compared to the conventional approach with a complex multiplier and Numerically Controlled Oscillator (NCO) at the same level 98 dB of Spurious Free Dynamic Range (SFDR).","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128272317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-10-01DOI: 10.1109/EWDTS.2016.7807698
Y. Gelozhe, P. Klimenko, A. Maksimov
Measures to reduce the influence of the dead zone of frequency-sensitive phase detector on frequency deviation of the signal generated by the phase-locked loop (PLL) the circuit of which includes the binomial low-pass filter of the fifth order, providing additional ripple suppression of control voltage are defined here. With the help of simulation method of Matlab program it was shown 60°...70° that to reduce the peak frequency deviation it is necessary to ensure the stability margin of the automatic system at phase. Given stability margin from 26° to 80° systematic frequency shift of the generated signal is observed, despite the fact that the system under consideration has astatism of the second order.
{"title":"Research of local dynamics of the phase-locked loop","authors":"Y. Gelozhe, P. Klimenko, A. Maksimov","doi":"10.1109/EWDTS.2016.7807698","DOIUrl":"https://doi.org/10.1109/EWDTS.2016.7807698","url":null,"abstract":"Measures to reduce the influence of the dead zone of frequency-sensitive phase detector on frequency deviation of the signal generated by the phase-locked loop (PLL) the circuit of which includes the binomial low-pass filter of the fifth order, providing additional ripple suppression of control voltage are defined here. With the help of simulation method of Matlab program it was shown 60°...70° that to reduce the peak frequency deviation it is necessary to ensure the stability margin of the automatic system at phase. Given stability margin from 26° to 80° systematic frequency shift of the generated signal is observed, despite the fact that the system under consideration has astatism of the second order.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117093207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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