Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225334
S. Song, K. Moran, S. Lee
Experiments were performed to study contact radius and thermal/electrical resistance across the bolted joints of two unequal thickness plates. Contact radius measurements were obtained for polycarbonate plastic plates of various thickness combinations over a range of contact pressure and washer head radius. Thermal and electrical resistance measurements were also obtained for the bolted joint contact of oxygen free copper plates. Models were developed to predict the contact radius, thermal and electrical resistance across the bolted joint interface. The comparison between the measurements and model predictions showed very good agreement.<>
{"title":"Thermal and electrical resistances of bolted joints between plates of unequal thickness","authors":"S. Song, K. Moran, S. Lee","doi":"10.1109/STHERM.1993.225334","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225334","url":null,"abstract":"Experiments were performed to study contact radius and thermal/electrical resistance across the bolted joints of two unequal thickness plates. Contact radius measurements were obtained for polycarbonate plastic plates of various thickness combinations over a range of contact pressure and washer head radius. Thermal and electrical resistance measurements were also obtained for the bolted joint contact of oxygen free copper plates. Models were developed to predict the contact radius, thermal and electrical resistance across the bolted joint interface. The comparison between the measurements and model predictions showed very good agreement.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115542348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225324
M.Z. Wang, C.Z. Lu, Z. Cheng, Z. Wang, S. Feng, G.Y. Ding, X.X. Li, G. Gao
A method for electrically determining the peak channel temperature of GaAs MESFETs is presented. It is the combination of an electrical technique based on the temperature-sensitive electrical parameter (TSEP) with the numerical simulation approach of A.G. Kokkas's (1974) thermal model. The peak channel temperature, measured electrically, is slightly higher than the maximum temperature obtained by the IR method. The effect of the resolution on the precision of the measurement technique is numerically analyzed. The electrical technique is not only shown to have advantages such as nondestructiveness, low cost, and easy operation, but also exhibits no limitation on the spatial resolution and higher accuracy.<>
{"title":"Electrically measuring the peak channel temperature of power GaAs MESFET","authors":"M.Z. Wang, C.Z. Lu, Z. Cheng, Z. Wang, S. Feng, G.Y. Ding, X.X. Li, G. Gao","doi":"10.1109/STHERM.1993.225324","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225324","url":null,"abstract":"A method for electrically determining the peak channel temperature of GaAs MESFETs is presented. It is the combination of an electrical technique based on the temperature-sensitive electrical parameter (TSEP) with the numerical simulation approach of A.G. Kokkas's (1974) thermal model. The peak channel temperature, measured electrically, is slightly higher than the maximum temperature obtained by the IR method. The effect of the resolution on the precision of the measurement technique is numerically analyzed. The electrical technique is not only shown to have advantages such as nondestructiveness, low cost, and easy operation, but also exhibits no limitation on the spatial resolution and higher accuracy.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115563944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225336
R. D. Nelson, S. Sommerfeldt, A. Barcohen
A multichip module (MCM) package which uses integral immersion cooling to transfer heat from the chips to a final heat transfer medium outside the package was constructed. The package is a miniature immersion-cooled system with a pin-fin condenser which can be operated in either the submerged or vapor-space condensing mode. Sixteen chips were bonded on a 57 mm/sup 2/ alumina substrate carrying copper/polyimide thin film interconnect. Tests of the thermal performance of the system show that it is capable of handling over 160 W power with chip thermal resistances as low as 2 K-cm/sup 2//W provided by the immersion cooled portion of the thermal path. Tests performed with the module fully powered and with subsets of the chips powered indicate that the heat transfer coefficient is similar in all partially powered modes. Data taken with condenser temperatures ranging from 20 to 50 degrees C were used to obtain a performance map delineating the heat transfer regimes in the module and the limits imposed by critical heat flux and condenser performance.<>
{"title":"Thermal performance of an integral immersion cooled multichip module package","authors":"R. D. Nelson, S. Sommerfeldt, A. Barcohen","doi":"10.1109/STHERM.1993.225336","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225336","url":null,"abstract":"A multichip module (MCM) package which uses integral immersion cooling to transfer heat from the chips to a final heat transfer medium outside the package was constructed. The package is a miniature immersion-cooled system with a pin-fin condenser which can be operated in either the submerged or vapor-space condensing mode. Sixteen chips were bonded on a 57 mm/sup 2/ alumina substrate carrying copper/polyimide thin film interconnect. Tests of the thermal performance of the system show that it is capable of handling over 160 W power with chip thermal resistances as low as 2 K-cm/sup 2//W provided by the immersion cooled portion of the thermal path. Tests performed with the module fully powered and with subsets of the chips powered indicate that the heat transfer coefficient is similar in all partially powered modes. Data taken with condenser temperatures ranging from 20 to 50 degrees C were used to obtain a performance map delineating the heat transfer regimes in the module and the limits imposed by critical heat flux and condenser performance.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125484016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225320
H. Kristiansen, A. Bjorneklett
A possible solution for cooling a large silicon detector system is discussed. The idea is to use evaporation cooling from liquid films deposited directly on the VLSI circuits. The intention is to feed liquid to each individual VLSI, using a combination of a liquid pipe line and a wick structure. The liquid which is deposited on the VLSI is then evaporated into an atmosphere consisting of vapor and possibly nitrogen. The heat transfer from liquid films deposited on silicon test chips is reported. Both pure vapor and a mixed vapor and nitrogen atmosphere have been used. The total pressure and thereby the liquid saturation temperature was varied during the different experiments. To increase the heat transfer coefficient at low heat fluxes, different modifications of the silicon surface were introduced in some of the experiments.<>
{"title":"Heat transfer in evaporation in dielectric liquid films in different atmospheres using silicon testchips","authors":"H. Kristiansen, A. Bjorneklett","doi":"10.1109/STHERM.1993.225320","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225320","url":null,"abstract":"A possible solution for cooling a large silicon detector system is discussed. The idea is to use evaporation cooling from liquid films deposited directly on the VLSI circuits. The intention is to feed liquid to each individual VLSI, using a combination of a liquid pipe line and a wick structure. The liquid which is deposited on the VLSI is then evaporated into an atmosphere consisting of vapor and possibly nitrogen. The heat transfer from liquid films deposited on silicon test chips is reported. Both pure vapor and a mixed vapor and nitrogen atmosphere have been used. The total pressure and thereby the liquid saturation temperature was varied during the different experiments. To increase the heat transfer coefficient at low heat fluxes, different modifications of the silicon surface were introduced in some of the experiments.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121803703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225317
S. Mulgaonker, B. Chambers, M. Mahalingam, G. Ganesan, V. Hause, H. Berg
The thermal performance limits of the quad flat package (QFP) family are projected. The metrics chosen are the maximum power dissipated for constraints of junction temperature (<105 degrees C) and board temperatures (<90 degrees C), under natural and forced air convection ( approximately 1.0 m/s) equipment operating conditions. Simulation studies using a finite-difference-based thermal software for IC packages investigated the relative roles of package and equipment parameters towards the thermal performance. Experimental data from the 132 PQFP were used to validate the methodology. The limits are presented from the chip designer's as well as the package/equipment engineer's perspective. The studies allow for the prediction of thermal performance of PQFPs that incorporate enhancements. The study covers plastic as well as ceramic versions of the QFP family.<>
预测了四平面封装(QFP)家族的热性能极限。所选择的指标是结温约束下的最大功率耗散(>
{"title":"Thermal performance limits of the QFP family","authors":"S. Mulgaonker, B. Chambers, M. Mahalingam, G. Ganesan, V. Hause, H. Berg","doi":"10.1109/STHERM.1993.225317","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225317","url":null,"abstract":"The thermal performance limits of the quad flat package (QFP) family are projected. The metrics chosen are the maximum power dissipated for constraints of junction temperature (<105 degrees C) and board temperatures (<90 degrees C), under natural and forced air convection ( approximately 1.0 m/s) equipment operating conditions. Simulation studies using a finite-difference-based thermal software for IC packages investigated the relative roles of package and equipment parameters towards the thermal performance. Experimental data from the 132 PQFP were used to validate the methodology. The limits are presented from the chip designer's as well as the package/equipment engineer's perspective. The studies allow for the prediction of thermal performance of PQFPs that incorporate enhancements. The study covers plastic as well as ceramic versions of the QFP family.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129563797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225322
V. Manno, N. Kurita, K. Azar
A series of experiments assessing the impact of circuit board thermal conductivity on the thermal performance of air-cooled electronic component arrays is described. Simulated low-profile, surface-mount components in the form of small copper pieces with heat dissipating thick film resistors are employed. From one to five of these components are mounted in standardized square pitch arrays on three different circuit board samples: standard glass epoxy (k=0.26 W/m degrees K), three-layer (metal-glass epoxy-metal) board of moderate effective conductivity (k=1.14 W/m degrees K), and a three-layer high conductivity sample (k=35.9 W/M degrees K). These configurations were tested under forced and natural convection conditions. Profiles of board temperature were acquired using simultaneous thermocouple measurements. The data show that while convection accounts for approximately 80% of the component heat removal in forced air-cooling on the glass epoxy board, conduction to the board can carry nearly all (96%) of the heat load in natural convection cooling on a highly metalized board. The use of moderate conductivity boards increases the effective heat transfer area of a component by a factor of three or more.<>
{"title":"Experimental characterization of board conduction sheets","authors":"V. Manno, N. Kurita, K. Azar","doi":"10.1109/STHERM.1993.225322","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225322","url":null,"abstract":"A series of experiments assessing the impact of circuit board thermal conductivity on the thermal performance of air-cooled electronic component arrays is described. Simulated low-profile, surface-mount components in the form of small copper pieces with heat dissipating thick film resistors are employed. From one to five of these components are mounted in standardized square pitch arrays on three different circuit board samples: standard glass epoxy (k=0.26 W/m degrees K), three-layer (metal-glass epoxy-metal) board of moderate effective conductivity (k=1.14 W/m degrees K), and a three-layer high conductivity sample (k=35.9 W/M degrees K). These configurations were tested under forced and natural convection conditions. Profiles of board temperature were acquired using simultaneous thermocouple measurements. The data show that while convection accounts for approximately 80% of the component heat removal in forced air-cooling on the glass epoxy board, conduction to the board can carry nearly all (96%) of the heat load in natural convection cooling on a highly metalized board. The use of moderate conductivity boards increases the effective heat transfer area of a component by a factor of three or more.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115993287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225316
B. Guenin, D. Mahulikar
Experimental and mathematical modeling techniques which were developed to characterize the thermal performance of MQUAD packages are described. The situation characterized is one of natural convection, with the package attached to a test board. The techniques described take advantage of the unique construction of the MQUAD package in order to achieve relative simplicity in their execution. Due to its low internal thermal resistance and efficient thermal coupling to the circuit board, the thermal behavior of the MQUAD package is dominated by the convective heat transfer coefficient and the thermal conductivity of the circuit board.<>
{"title":"Methodology for the thermal characterization of the MQUAD microelectronic package","authors":"B. Guenin, D. Mahulikar","doi":"10.1109/STHERM.1993.225316","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225316","url":null,"abstract":"Experimental and mathematical modeling techniques which were developed to characterize the thermal performance of MQUAD packages are described. The situation characterized is one of natural convection, with the package attached to a test board. The techniques described take advantage of the unique construction of the MQUAD package in order to achieve relative simplicity in their execution. Due to its low internal thermal resistance and efficient thermal coupling to the circuit board, the thermal behavior of the MQUAD package is dominated by the convective heat transfer coefficient and the thermal conductivity of the circuit board.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116438084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225335
K. Azar, C.D. Mandrone, J.M. Segelken
Exploratory work has been carried out to investigate filled epoxy systems for thermal management enhancements for plastic encapsulated integrated circuits. A computational study was conducted to examine the effect of molding compound thermal conductivity on thermal resistance of a molded multi-chip module. Seven different molding thermal conductivities were considered. The air velocity was varied from natural convection to high-velocity forced convection. The results showed that an eight-fold increase in molding compound thermal conductivity reduces the junction-to-ambient thermal resistance by 20% in natural convection and by 54% in high-velocity forced convection.<>
{"title":"Effect of molding compound thermal conductivity on thermal performance of molded multi-chip modules","authors":"K. Azar, C.D. Mandrone, J.M. Segelken","doi":"10.1109/STHERM.1993.225335","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225335","url":null,"abstract":"Exploratory work has been carried out to investigate filled epoxy systems for thermal management enhancements for plastic encapsulated integrated circuits. A computational study was conducted to examine the effect of molding compound thermal conductivity on thermal resistance of a molded multi-chip module. Seven different molding thermal conductivities were considered. The air velocity was varied from natural convection to high-velocity forced convection. The results showed that an eight-fold increase in molding compound thermal conductivity reduces the junction-to-ambient thermal resistance by 20% in natural convection and by 54% in high-velocity forced convection.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134579681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225329
C.C. Lee, D. H. Chien
Thermal and package design is carried out for high power laser diodes. Both junction-up and flip-chip configurations are studied. The flip-chip technique is far superior to the junction-up method. For a 300- mu m(L)*500- mu m(W) GaAs laser diode chip with active region of 300 mu m(L)*5 mu m(W), the flip-chip design gives a thermal resistance of 30.14 degrees C/W using a diamond heat sink, and 41.72 degrees C/W using a copper-tungsten heat sink. Calculated result shows that the temperature along the active region is uniform for uniform heat flux. It is thus recommended that the laser chip be designed with uniform heat flux rather than uniform current density along the active region. A technology is suggested to perform flip-chip bonding of the laser chip without incurring the danger of solder getting onto the laser facets.<>
{"title":"Thermal and package design of high power laser diodes","authors":"C.C. Lee, D. H. Chien","doi":"10.1109/STHERM.1993.225329","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225329","url":null,"abstract":"Thermal and package design is carried out for high power laser diodes. Both junction-up and flip-chip configurations are studied. The flip-chip technique is far superior to the junction-up method. For a 300- mu m(L)*500- mu m(W) GaAs laser diode chip with active region of 300 mu m(L)*5 mu m(W), the flip-chip design gives a thermal resistance of 30.14 degrees C/W using a diamond heat sink, and 41.72 degrees C/W using a copper-tungsten heat sink. Calculated result shows that the temperature along the active region is uniform for uniform heat flux. It is thus recommended that the laser chip be designed with uniform heat flux rather than uniform current density along the active region. A technology is suggested to perform flip-chip bonding of the laser chip without incurring the danger of solder getting onto the laser facets.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134634410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-02-02DOI: 10.1109/STHERM.1993.225330
A. Ortega, S. Ramanathan, J. D. Chicci, J. Prince
Analytical solutions are presented for the temperature field which arises from the application of a source of heat on an adiabatic plate or board when the fluid is represented as a uniform flow with an effective turbulent diffusivity, the so-called UFED flow model. Solutions are summarized for a point source, a one-dimensional strip source, and a rectangular source of heat. The ability to superpose the individual kernel solutions to obtain the temperature field due to multiple sources is demonstrated. The point source solution reveals that the N/sup -1/ law commonly observed for the centerline thermal wake decay for three-dimensional arrays is predicted by the point source solution for the UFED model. The thermal wake approaches the point source behavior downstream from the source, suggesting a new scaling for the far thermal wake that successfully collapses the thermal wake for several sizes of components and provides a fundamental basis for experimental observations previously made for arrays of three-dimensional components. Preliminary experimental results using a thermochromic liquid crystal thermal mapping technique are presented.<>
{"title":"Thermal wake models for forced air cooling of electronic components","authors":"A. Ortega, S. Ramanathan, J. D. Chicci, J. Prince","doi":"10.1109/STHERM.1993.225330","DOIUrl":"https://doi.org/10.1109/STHERM.1993.225330","url":null,"abstract":"Analytical solutions are presented for the temperature field which arises from the application of a source of heat on an adiabatic plate or board when the fluid is represented as a uniform flow with an effective turbulent diffusivity, the so-called UFED flow model. Solutions are summarized for a point source, a one-dimensional strip source, and a rectangular source of heat. The ability to superpose the individual kernel solutions to obtain the temperature field due to multiple sources is demonstrated. The point source solution reveals that the N/sup -1/ law commonly observed for the centerline thermal wake decay for three-dimensional arrays is predicted by the point source solution for the UFED model. The thermal wake approaches the point source behavior downstream from the source, suggesting a new scaling for the far thermal wake that successfully collapses the thermal wake for several sizes of components and provides a fundamental basis for experimental observations previously made for arrays of three-dimensional components. Preliminary experimental results using a thermochromic liquid crystal thermal mapping technique are presented.<<ETX>>","PeriodicalId":369022,"journal":{"name":"[1993 Proceedings] Ninth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134087858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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