Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930362
Jie Zhang, Haochen Zhao, Tuofu Zhama, Yuping Zeng
In this work, effects of gallium incorporation on electrical and material characterization of TiO2 films were investigated. These 15 nm Ga-doped TiO2 films were grown by supercycle atomic layer deposition (ALD) and then annealed at 500 ºC in O2 ambient. The levels of Ga incorporation to TiO2 films were controlled by the ratio of Ga to Ti cycles during ALD growth. Material characterizations show that the Ga incorporation destabilizes the crystallization of TiO2 films, resulting in amorphous films even after 500 ºC O2 annealing. The bandgap of these Ga-doped TiO2 films were found to monotonically increase with the increased Ga content. Metal-oxide semiconductor capacitors (MOSCAPs) based on p-type Si substrate were fabricated to evaluate the electrical properties of the Ga-doped TiO2 films. Both leakage currents and capacitances were reduced as the Ga content increases. These well-behaved dielectrics under 500 ºC process suggest their great promises for back-end-of-line (BEOL) device applications.
{"title":"Effect of gallium incorporation on electrical and material characteristics of TiO2 films for high-permittivity dielectric application","authors":"Jie Zhang, Haochen Zhao, Tuofu Zhama, Yuping Zeng","doi":"10.1109/CSW55288.2022.9930362","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930362","url":null,"abstract":"In this work, effects of gallium incorporation on electrical and material characterization of TiO2 films were investigated. These 15 nm Ga-doped TiO2 films were grown by supercycle atomic layer deposition (ALD) and then annealed at 500 ºC in O2 ambient. The levels of Ga incorporation to TiO2 films were controlled by the ratio of Ga to Ti cycles during ALD growth. Material characterizations show that the Ga incorporation destabilizes the crystallization of TiO2 films, resulting in amorphous films even after 500 ºC O2 annealing. The bandgap of these Ga-doped TiO2 films were found to monotonically increase with the increased Ga content. Metal-oxide semiconductor capacitors (MOSCAPs) based on p-type Si substrate were fabricated to evaluate the electrical properties of the Ga-doped TiO2 films. Both leakage currents and capacitances were reduced as the Ga content increases. These well-behaved dielectrics under 500 ºC process suggest their great promises for back-end-of-line (BEOL) device applications.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"461 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116184114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930401
M. Benjelloun, Tanbir Sodhi, A. Kunti, L. Travers, A. Soltani, D. Morris, H. Maher, N. Gogneau, J. Harmand
In this work, the growth of low-density self-catalyzed n-doped gallium nitride (GaN) nanowires (NWs) on Si(111) substrate has been investigated for power device applications. In the first part of this study, the influence of the growth temperature on the morphology and the density of the NWs has been studied. We have found that the NWs density can be reduced to 1.55×109 NWs/cm2 at low growth temperature. However, under these conditions, a 1560 nm thick parasitic layer is also grown connecting the NWs by their bottom. To minimize this parasitic growth, we have developed a two-step growth procedure allowing us to maintain the NWs density around 1.91×109 NWs/cm2, while minimizing the parasitic layer’s thickness to 158 nm. In the second part, we have optimized the growth conditions to keep the NW characteristics (low density and thin parasitic layer) while inducing their n-type doping using silicon.
{"title":"Growth of Si-doped GaN Nanowires With Low Density For Power Device Applications","authors":"M. Benjelloun, Tanbir Sodhi, A. Kunti, L. Travers, A. Soltani, D. Morris, H. Maher, N. Gogneau, J. Harmand","doi":"10.1109/CSW55288.2022.9930401","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930401","url":null,"abstract":"In this work, the growth of low-density self-catalyzed n-doped gallium nitride (GaN) nanowires (NWs) on Si(111) substrate has been investigated for power device applications. In the first part of this study, the influence of the growth temperature on the morphology and the density of the NWs has been studied. We have found that the NWs density can be reduced to 1.55×109 NWs/cm2 at low growth temperature. However, under these conditions, a 1560 nm thick parasitic layer is also grown connecting the NWs by their bottom. To minimize this parasitic growth, we have developed a two-step growth procedure allowing us to maintain the NWs density around 1.91×109 NWs/cm2, while minimizing the parasitic layer’s thickness to 158 nm. In the second part, we have optimized the growth conditions to keep the NW characteristics (low density and thin parasitic layer) while inducing their n-type doping using silicon.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116303120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930365
Bekari Gabritchidze, Iretomiwa Esho, Kieran A. Cleary, A. Readhead, A. Minnich
We report the on-wafer characterization of S-parameters and microwave noise (T50) of discrete InP HEMTs over a range of physical temperatures, 40 K – 300 K. From these data, we extract a small-signal model and the drain noise temperature (Td) at each bias and temperature. We find that T50 exhibits a temperature dependence that is incompatible with a fixed Td. In contrast, explaining the noise measurements requires Td to change from ~2500 K at room temperature (RT) to ~400 K at cryogenic temperatures. This trend is consistent with the predictions of a theory of drain noise based on real-space transfer of electrons from the channel to the barrier [5].
我们报道了离散InP hemt在40 K - 300 K物理温度范围内的s参数和微波噪声(T50)的片上表征。从这些数据中，我们提取了一个小信号模型和每个偏置和温度下的漏极噪声温度(Td)。我们发现T50表现出与固定Td不相容的温度依赖性。相比之下，解释噪声测量需要Td从室温(RT)的~ 2500k变化到低温下的~ 400k。这种趋势与基于电子从通道到势垒[5]的实空间转移的漏极噪声理论的预测是一致的。
{"title":"Investigation of Drain Noise in Cryogenic InP High Electron Mobility Transistors Using On-wafer S-parameter and Microwave Noise Characterization","authors":"Bekari Gabritchidze, Iretomiwa Esho, Kieran A. Cleary, A. Readhead, A. Minnich","doi":"10.1109/CSW55288.2022.9930365","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930365","url":null,"abstract":"We report the on-wafer characterization of S-parameters and microwave noise (T50) of discrete InP HEMTs over a range of physical temperatures, 40 K – 300 K. From these data, we extract a small-signal model and the drain noise temperature (Td) at each bias and temperature. We find that T50 exhibits a temperature dependence that is incompatible with a fixed Td. In contrast, explaining the noise measurements requires Td to change from ~2500 K at room temperature (RT) to ~400 K at cryogenic temperatures. This trend is consistent with the predictions of a theory of drain noise based on real-space transfer of electrons from the channel to the barrier [5].","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129662837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930349
Ragnar Ferrand-Drake del Castillo, N. Rorsman
With the overarching goal of attaining mm-wave GaN High Electron Mobility Transistors (HEMTs), vertical and lateral downscaling is of essence. Utilizing Passivation first technology (coupled with mini-FP T-gates), Schottky Gate (SG) is formed by Fluorine plasma etching, where the plasma etching allows highly defined nanoscale gate-length (Lg) features. However, it damages the crystalline structure of the top barrier layer and leads to Fluorine implantation with ramifications on the sheet carrier density(ns), mobility (μ) and threshold-voltage (VTH) shift towards enhancement mode. In this study, CF4 or NF3 etching with varying over etch times are implemented, with high temperature annealing (600–800°C) post gate recess etching to repair crystal structure damages caused by the etch process.
{"title":"Considerations in the development of a gate process module for ultra-scaled GaN HEMTs","authors":"Ragnar Ferrand-Drake del Castillo, N. Rorsman","doi":"10.1109/CSW55288.2022.9930349","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930349","url":null,"abstract":"With the overarching goal of attaining mm-wave GaN High Electron Mobility Transistors (HEMTs), vertical and lateral downscaling is of essence. Utilizing Passivation first technology (coupled with mini-FP T-gates), Schottky Gate (SG) is formed by Fluorine plasma etching, where the plasma etching allows highly defined nanoscale gate-length (Lg) features. However, it damages the crystalline structure of the top barrier layer and leads to Fluorine implantation with ramifications on the sheet carrier density(ns), mobility (μ) and threshold-voltage (VTH) shift towards enhancement mode. In this study, CF4 or NF3 etching with varying over etch times are implemented, with high temperature annealing (600–800°C) post gate recess etching to repair crystal structure damages caused by the etch process.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129024950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/csw55288.2022.9930360
A. Roshko, M. Brubaker, G. Burton, Todd Harvey, K. Bertness
The importance of growth conditions for N-polar nitride MBE growth on Si is examined. It is found that metal-rich conditions at the initiation of growth lead to Al-Si eutectic formation. The eutectic can cause holes in the substrate and AlN layer, and floats on the nitride surface but can be incorporated into the nitride if the growth becomes N-rich. The inclusion of Si from the eutectic can cause polarity inversion, with greater levels of Si and inversion found in samples initiated with higher Al levels and, therefore, higher levels of eutectic formation. Evidence of eutectic was not found in samples where growth was started close to stoichiometry. In addition, the eutectic related defects in the nitride buffers typically did not propagate into nanostructures grown on them by selective area growth.
{"title":"Uniform N-Polar III-Nitrides on Si(111) by MBE","authors":"A. Roshko, M. Brubaker, G. Burton, Todd Harvey, K. Bertness","doi":"10.1109/csw55288.2022.9930360","DOIUrl":"https://doi.org/10.1109/csw55288.2022.9930360","url":null,"abstract":"The importance of growth conditions for N-polar nitride MBE growth on Si is examined. It is found that metal-rich conditions at the initiation of growth lead to Al-Si eutectic formation. The eutectic can cause holes in the substrate and AlN layer, and floats on the nitride surface but can be incorporated into the nitride if the growth becomes N-rich. The inclusion of Si from the eutectic can cause polarity inversion, with greater levels of Si and inversion found in samples initiated with higher Al levels and, therefore, higher levels of eutectic formation. Evidence of eutectic was not found in samples where growth was started close to stoichiometry. In addition, the eutectic related defects in the nitride buffers typically did not propagate into nanostructures grown on them by selective area growth.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131066643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930353
Ziyi He, K. Fu, Mingfei Xu, Jingan Zhou, Tao Li, Yuji Zhao
Hexagonal boron nitride (h-BN), a material currently unavailable in the material library of TCAD Silvaco, is manually defined in Silvaco Atlas with the physics properties previously reported. Two h-BN/GaN p-n diodes and a lateral h-BN Schottky barrier diode are simulated, and their thermal and electrical characteristics at forward bias are investigated, which gives a preliminary forecast of the future h-BN electronics devices.
{"title":"Demonstration of Various h-BN Based Diodes with TCAD Simulation","authors":"Ziyi He, K. Fu, Mingfei Xu, Jingan Zhou, Tao Li, Yuji Zhao","doi":"10.1109/CSW55288.2022.9930353","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930353","url":null,"abstract":"Hexagonal boron nitride (h-BN), a material currently unavailable in the material library of TCAD Silvaco, is manually defined in Silvaco Atlas with the physics properties previously reported. Two h-BN/GaN p-n diodes and a lateral h-BN Schottky barrier diode are simulated, and their thermal and electrical characteristics at forward bias are investigated, which gives a preliminary forecast of the future h-BN electronics devices.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114178666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930438
C. Kim, M. Kim, A. Grede, C. Canedy, C. D. Merritt, W. Bewley, S. Tomasulo, I. Vurgaftman, J. R. Meyer
We review novel architectures that have recently enhanced the performance of interband cascade lasers (ICLs), ICL frequency combs, interband cascade LEDs (including ICLEDs grown on silicon), mid-IR resonant cavity detectors (RCIDs), and mid-IR photonic integrated circuits (PICs).
{"title":"Recent Advances of Interband Cascade Lasers and Resonant Cavity Infrared Detectors","authors":"C. Kim, M. Kim, A. Grede, C. Canedy, C. D. Merritt, W. Bewley, S. Tomasulo, I. Vurgaftman, J. R. Meyer","doi":"10.1109/CSW55288.2022.9930438","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930438","url":null,"abstract":"We review novel architectures that have recently enhanced the performance of interband cascade lasers (ICLs), ICL frequency combs, interband cascade LEDs (including ICLEDs grown on silicon), mid-IR resonant cavity detectors (RCIDs), and mid-IR photonic integrated circuits (PICs).","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125191587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930398
H. Gamo, J. Motohisa, K. Tomioka
We demonstrated vertical gate-all-around field-effect transistor using the InGaAs/GaSb core-shell nanowires on Si. This device can operate both p-channel FET and n-channel TFET in the same channel architecture by changing bias polarity. The p-channel FET mode had a minimum subthreshold slope (SS) of 115 mV/decade and Ion/Ioff ratio of around 102 at VDS = −1.00 V. The n-channel TFET mode showed SS of 105 mV/decade at VDS = 0.50 V.
{"title":"Demonstration of dual switching operation of vertical gate-all-around transistor using InGaAs/GaSb core-shell nanowires on Si","authors":"H. Gamo, J. Motohisa, K. Tomioka","doi":"10.1109/CSW55288.2022.9930398","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930398","url":null,"abstract":"We demonstrated vertical gate-all-around field-effect transistor using the InGaAs/GaSb core-shell nanowires on Si. This device can operate both p-channel FET and n-channel TFET in the same channel architecture by changing bias polarity. The p-channel FET mode had a minimum subthreshold slope (SS) of 115 mV/decade and I<inf>on</inf>/I<inf>off</inf> ratio of around 10<sup>2</sup> at V<inf>DS</inf> = −1.00 V. The n-channel TFET mode showed SS of 105 mV/decade at V<inf>DS</inf> = 0.50 V.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131167006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930350
M. Hajdel, M. Chlipała, H. Turski, M. Siekacz, P. Wolny, K. Nowakowski-Szkudlarek, A. Feduniewicz-Żmuda, C. Skierbiszewski, G. Muzioł
The radiative transitions in InGaN-based LEDs grown by plasma assisted molecular beam epitaxy were studied. Electroluminescence spectra were collected for the LEDs with 2.6, 6.5, 7.8, 12 and 15nm thick QW in a broad current regime. The evolution of the emission spectra indicates changes in the nature of carrier recombination. Initially, carriers recombine through ground states, then through mixed transition and lastly only through exited states. Additionally, we modeled operation of the LEDs with self-consistent Schrodinger–Poisson simulations and showed that carrier density and differences in the magnitude of screening of the built-in field inside QWs are causing the change in the light emission.
{"title":"Optical Transitions Involving Excited States in III-nitride LEDs","authors":"M. Hajdel, M. Chlipała, H. Turski, M. Siekacz, P. Wolny, K. Nowakowski-Szkudlarek, A. Feduniewicz-Żmuda, C. Skierbiszewski, G. Muzioł","doi":"10.1109/CSW55288.2022.9930350","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930350","url":null,"abstract":"The radiative transitions in InGaN-based LEDs grown by plasma assisted molecular beam epitaxy were studied. Electroluminescence spectra were collected for the LEDs with 2.6, 6.5, 7.8, 12 and 15nm thick QW in a broad current regime. The evolution of the emission spectra indicates changes in the nature of carrier recombination. Initially, carriers recombine through ground states, then through mixed transition and lastly only through exited states. Additionally, we modeled operation of the LEDs with self-consistent Schrodinger–Poisson simulations and showed that carrier density and differences in the magnitude of screening of the built-in field inside QWs are causing the change in the light emission.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114604372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-01DOI: 10.1109/CSW55288.2022.9930345
F. F. Ince, A. T. Newell, K. Reilly, S. Seth, T. Rotter, A. Mansoori, S. Addamane, D. Shima, L. Miroshnik, B. Rummel, A. Li, T. Sinno, S.M. Han, G. Balakrishnan
We present the growth of In0.53Ga0.47Sb on InP using the interfacial misfit dislocation growth mode. The growth is performed by using an intermediate InGaAs layer and achieving an As for Sb anion exchange. Characterization results show the formation of an interfacial misfit dislocation array, however the epilayer shows significant phase segregation.
{"title":"Growth of high Indium Percentage InGaSb on InP substrates using the interfacial misfit dislocation array growth mode","authors":"F. F. Ince, A. T. Newell, K. Reilly, S. Seth, T. Rotter, A. Mansoori, S. Addamane, D. Shima, L. Miroshnik, B. Rummel, A. Li, T. Sinno, S.M. Han, G. Balakrishnan","doi":"10.1109/CSW55288.2022.9930345","DOIUrl":"https://doi.org/10.1109/CSW55288.2022.9930345","url":null,"abstract":"We present the growth of In0.53Ga0.47Sb on InP using the interfacial misfit dislocation growth mode. The growth is performed by using an intermediate InGaAs layer and achieving an As for Sb anion exchange. Characterization results show the formation of an interfacial misfit dislocation array, however the epilayer shows significant phase segregation.","PeriodicalId":382443,"journal":{"name":"2022 Compound Semiconductor Week (CSW)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117310335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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