Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919297
F. Nascimento, A. Telles, M. M. Rocha, R. C. Teixeira
Manufacturing of small-scale magnetic devices is a subject that is not yet fully consolidated. Then the development process – design, fabrication and characterization – of microtransformers continues as object of studies for several applications. In this work it is presented the development and characterization steps of a four mm diameter toroidal microtransformer built using wire bonding and MultiChip Module (MCM) technologies. The device has a 19:1 turn ratio, with $31 mu mathrm{m}$ diameter aluminum wire bond around the top of a MnZn ferrite core. The wire bonds are connected to thin film gold tracks with $sim 3.5 mu mathrm{m}$ thickness at the bottom in order to complete the windings. The main parameters measured were the inductances and resistances of primary and secondary windings, and also the series-aiding and series-opposing inductances, all of them in the frequency range from 10 kHz to 2 MHz. With the results from those measurements the quality factors, mutual inductance and coupling coefficients were obtained. The inductance values of both windings are in agreement with expected ones. The device shows a good coupling coefficient and acceptable quality factors. The results show that it is feasible to build microtransformers with wire bonding onto an MCM substrate.
小型磁性装置的制造是一门尚未完全巩固的学科。然后，微变压器的开发过程-设计，制造和表征-继续作为几个应用的研究对象。在这项工作中，它提出了利用线键合和多芯片模块(MCM)技术构建的直径为4毫米的环形微变压器的开发和表征步骤。该器件的匝比为19:1，在MnZn铁氧体铁芯的顶部粘接$31 mu mathrm{m}$直径的铝线。导线键连接到底部厚度为$sim 3.5 mu mathrm{m}$的薄膜金轨道上，以完成绕组。测量的主要参数是一次绕组和二次绕组的电感和电阻，以及串联辅助和串联反电感，频率范围为10 kHz至2 MHz。根据这些测量结果，得到了质量系数、互感系数和耦合系数。两个绕组的电感值与预期值一致。该装置具有良好的耦合系数和可接受的质量因数。研究结果表明，在MCM基板上建立导线键合微变压器是可行的。
{"title":"A 4 mm toroidal microtransformer built with wire bonding and MCM technologies","authors":"F. Nascimento, A. Telles, M. M. Rocha, R. C. Teixeira","doi":"10.1109/SBMicro.2019.8919297","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919297","url":null,"abstract":"Manufacturing of small-scale magnetic devices is a subject that is not yet fully consolidated. Then the development process – design, fabrication and characterization – of microtransformers continues as object of studies for several applications. In this work it is presented the development and characterization steps of a four mm diameter toroidal microtransformer built using wire bonding and MultiChip Module (MCM) technologies. The device has a 19:1 turn ratio, with $31 mu mathrm{m}$ diameter aluminum wire bond around the top of a MnZn ferrite core. The wire bonds are connected to thin film gold tracks with $sim 3.5 mu mathrm{m}$ thickness at the bottom in order to complete the windings. The main parameters measured were the inductances and resistances of primary and secondary windings, and also the series-aiding and series-opposing inductances, all of them in the frequency range from 10 kHz to 2 MHz. With the results from those measurements the quality factors, mutual inductance and coupling coefficients were obtained. The inductance values of both windings are in agreement with expected ones. The device shows a good coupling coefficient and acceptable quality factors. The results show that it is feasible to build microtransformers with wire bonding onto an MCM substrate.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114554201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919314
F. A. da Silva, R. Doria, M. G. C. de Andrade
In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.
{"title":"Multi-layers Lateral SOI PIN Photodiodes for Solar Cells Applications","authors":"F. A. da Silva, R. Doria, M. G. C. de Andrade","doi":"10.1109/SBMicro.2019.8919314","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919314","url":null,"abstract":"In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133375122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919305
F. Costa, R. Trevisoli, R. Doria
The goal of this work is to present the behavior of the substrate effect in Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs with the application of a selected set of back gate biases (VSUB) through DC and AC simulations. A set of different ground planes (GP) arrangements has been considered. It has been shown that the degradation due to the substrate effects increases as the substrate bias is reduced. According to the analysis, it could be observed the GP type influences the capacitive coupling of the structure as the back gate bias is varied. Additionally, it has been shown that the presence of the GP below the source and drain regions contributes significantly to the overall capacitive coupling of the device.
这项工作的目的是通过直流和交流模拟，在一组选定的后极偏置(VSUB)的应用下，展示超薄体和埋藏氧化物(UTBB) SOI mosfet中衬底效应的行为。考虑了一组不同的地平面(GP)布置。研究表明，随着衬底偏压的减小，由衬底效应引起的降解会增加。通过分析可以看出，随着后门偏压的变化，GP类型对结构的电容耦合有影响。此外，已经表明，源极和漏极区域下方GP的存在对器件的整体电容耦合有重要贡献。
{"title":"Analysis of the substrate effect by the capacitive coupling in SOI UTBB Transistors","authors":"F. Costa, R. Trevisoli, R. Doria","doi":"10.1109/SBMicro.2019.8919305","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919305","url":null,"abstract":"The goal of this work is to present the behavior of the substrate effect in Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs with the application of a selected set of back gate biases (VSUB) through DC and AC simulations. A set of different ground planes (GP) arrangements has been considered. It has been shown that the degradation due to the substrate effects increases as the substrate bias is reduced. According to the analysis, it could be observed the GP type influences the capacitive coupling of the structure as the back gate bias is varied. Additionally, it has been shown that the presence of the GP below the source and drain regions contributes significantly to the overall capacitive coupling of the device.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115328064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919327
L. Gomes, Serrano Ariana L. C., P. Ferrari, G. Rehder
This paper presents and validate the concept of a suspended, slow-wave microstrip transmission line that uses air as a substrate. The lines are fabricated on a low-cost interposer technology, the metallic nanowire membrane (MnM), that allows selective growth of copper nanowires, enabling transmission lines with a wide range of Zc. Lines with widths of $35 mu mathrm{m}, 25mu mathrm{m}$ and $15mu mathrm{m}$ were designed and fabricated with 1, 2 or 4 suspended segments of $250mu mathrm{m}$ or $500mu mathrm{m}$ of length. Parametric extraction from the measured S-parameters showed $varepsilon_{eff}$ ranging from 5 to 7.5, $alpha$ smaller than 0.8 dB/mm at 70 GHz and Q as high as 55. Z c varied between $65 Omega$ and $90 Omega$.
{"title":"Suspended Slow-Wave transmission lines for mm-wave applications","authors":"L. Gomes, Serrano Ariana L. C., P. Ferrari, G. Rehder","doi":"10.1109/SBMicro.2019.8919327","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919327","url":null,"abstract":"This paper presents and validate the concept of a suspended, slow-wave microstrip transmission line that uses air as a substrate. The lines are fabricated on a low-cost interposer technology, the metallic nanowire membrane (MnM), that allows selective growth of copper nanowires, enabling transmission lines with a wide range of Zc. Lines with widths of $35 mu mathrm{m}, 25mu mathrm{m}$ and $15mu mathrm{m}$ were designed and fabricated with 1, 2 or 4 suspended segments of $250mu mathrm{m}$ or $500mu mathrm{m}$ of length. Parametric extraction from the measured S-parameters showed $varepsilon_{eff}$ ranging from 5 to 7.5, $alpha$ smaller than 0.8 dB/mm at 70 GHz and Q as high as 55. Z c varied between $65 Omega$ and $90 Omega$.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126576433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919262
Kaique F. Sanches, Selva Jéssica S. G., D. D. Purificação, M. Bertotti, Carreño Marcelo N. P.
Many studies have been conducted in order to better understand the role of the pH in muscle fatigue. However, measuring in vivo pH concentration, in the muscular environment during anaerobic exercise, cannot be conducted through regular methods. Thus, in this work, we design and fabricate a siliconbased implantable microelectrode array (MEA) utilizing microelectronics and MEMS techniques. The probe consists of a microneedle with three pairs of electrodes, each containing one Ag-AgCl reference electrode and one Au-IrOx working electrode. The Au and Au/IrOx electrodes were tested in a potassium ferricyanide solution and, in order to verify the device sensitivity to pH, open circuit potential (OCP) measurements were carried out in 0.1 mol L-1 phosphate buffer solution (PBS) with different pH values. The results show a linear response to the solution pH in the studied range, proving that the probe is a promising sensor.
{"title":"Development of MEMS microsensors, aiming at the application in the study of muscle fatigue in vivo","authors":"Kaique F. Sanches, Selva Jéssica S. G., D. D. Purificação, M. Bertotti, Carreño Marcelo N. P.","doi":"10.1109/SBMicro.2019.8919262","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919262","url":null,"abstract":"Many studies have been conducted in order to better understand the role of the pH in muscle fatigue. However, measuring in vivo pH concentration, in the muscular environment during anaerobic exercise, cannot be conducted through regular methods. Thus, in this work, we design and fabricate a siliconbased implantable microelectrode array (MEA) utilizing microelectronics and MEMS techniques. The probe consists of a microneedle with three pairs of electrodes, each containing one Ag-AgCl reference electrode and one Au-IrOx working electrode. The Au and Au/IrOx electrodes were tested in a potassium ferricyanide solution and, in order to verify the device sensitivity to pH, open circuit potential (OCP) measurements were carried out in 0.1 mol L-1 phosphate buffer solution (PBS) with different pH values. The results show a linear response to the solution pH in the studied range, proving that the probe is a promising sensor.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114997113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919253
R.A.R. Oliveira, I. Pereyra, M. Carreño
In this work a new approach for deposition of new materials is proposed. In this approach, a CVD (Chemical Vapor Deposition) process is implemented in a micro heater fabricated by MEMS technology, which presents as main appeals (a) short heating and cooling times, (b) the possibility of grown spatially localized films, in well defined regions of a substrate, and (c) to allow the growth of different materials in a single deposition process. Due to its conception, this approach also allows to grow the materials in a device integrated way, in structures where they can be characterized or in the final devices where they are going to be used. As it will be shown, a wide range of temperatures is attainable, from room temperature to well over 1000°C. The microCVD deposition is obtained when the MEMS micro heater is placed inside a vacuum chamber with the precursor gases and the micro heater is electrically polarized to attain the desire temperature. Computer simulation in Ansys Software was performed to estimate the final temperature of the heaters and the fabricated microCVD devices were tested in CH4 atmosphere, to obtain carbon and graphene films.
{"title":"Development of MEMS based microCVD technique for new materials thin films deposition","authors":"R.A.R. Oliveira, I. Pereyra, M. Carreño","doi":"10.1109/SBMicro.2019.8919253","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919253","url":null,"abstract":"In this work a new approach for deposition of new materials is proposed. In this approach, a CVD (Chemical Vapor Deposition) process is implemented in a micro heater fabricated by MEMS technology, which presents as main appeals (a) short heating and cooling times, (b) the possibility of grown spatially localized films, in well defined regions of a substrate, and (c) to allow the growth of different materials in a single deposition process. Due to its conception, this approach also allows to grow the materials in a device integrated way, in structures where they can be characterized or in the final devices where they are going to be used. As it will be shown, a wide range of temperatures is attainable, from room temperature to well over 1000°C. The microCVD deposition is obtained when the MEMS micro heater is placed inside a vacuum chamber with the precursor gases and the micro heater is electrically polarized to attain the desire temperature. Computer simulation in Ansys Software was performed to estimate the final temperature of the heaters and the fabricated microCVD devices were tested in CH4 atmosphere, to obtain carbon and graphene films.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115156241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919344
V. V. Peruzzi, W. Cruz, Gabriel Augusto da Silva, R. C. Teixeira, Luis Eduardo Seixas Junior, S. Gimenez
There are a lot of initiatives to improve the devices matching (dog bone layout, common centroid layout, dummy devices, etc.). Another layout technique, not yet used by integrated circuits (ICs) companies, is the utilization of non-conventional layout styles (hexagonal, octagonal, ellipsoidal, etc.) for MOSFETs, thanks to the Longitudinal Corner Effect (LCE), Parallel Connection of MOSFETs with different channel Lengths Effect (PAMDLE) and Deactivation of Parasitic MOSFETs in Bird’s Beaks Regions (DEMPAMBBRE). In this context, this paper describes an experimental comparative study of the devices matching of Metal-Oxide-Semiconductor Field Effect Transistors (130 nm Silicon-Germanium Bulk), n-type (nMOSFETs) implemented with Diamond (hexagonal) and standard rectangular layout styles, regarding a sample of 189 transistors which were exposure to different X-rays ionizing radiations. Considering some relevant electrical parameters considered in this work, the results indicate that the Diamond layout style with $alpha$ angle equal to 90° is capable of boosting by at least 40% the device matching in relation to one observed with standard (rectangular) MOSFET counterparts in irradiation environment, considering they present the same gate areas, channel widths and bias conditions. Therefore, the Diamond layout style can be considered another hardness-by-design (HBD) layout strategy to boost the electrical performance and ionizing radiation tolerance of MOSFETs.
{"title":"Boosting the Ionizing Radiation Tolerance in the Mosfets Matching by Using Diamond Layout Style","authors":"V. V. Peruzzi, W. Cruz, Gabriel Augusto da Silva, R. C. Teixeira, Luis Eduardo Seixas Junior, S. Gimenez","doi":"10.1109/SBMicro.2019.8919344","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919344","url":null,"abstract":"There are a lot of initiatives to improve the devices matching (dog bone layout, common centroid layout, dummy devices, etc.). Another layout technique, not yet used by integrated circuits (ICs) companies, is the utilization of non-conventional layout styles (hexagonal, octagonal, ellipsoidal, etc.) for MOSFETs, thanks to the Longitudinal Corner Effect (LCE), Parallel Connection of MOSFETs with different channel Lengths Effect (PAMDLE) and Deactivation of Parasitic MOSFETs in Bird’s Beaks Regions (DEMPAMBBRE). In this context, this paper describes an experimental comparative study of the devices matching of Metal-Oxide-Semiconductor Field Effect Transistors (130 nm Silicon-Germanium Bulk), n-type (nMOSFETs) implemented with Diamond (hexagonal) and standard rectangular layout styles, regarding a sample of 189 transistors which were exposure to different X-rays ionizing radiations. Considering some relevant electrical parameters considered in this work, the results indicate that the Diamond layout style with $alpha$ angle equal to 90° is capable of boosting by at least 40% the device matching in relation to one observed with standard (rectangular) MOSFET counterparts in irradiation environment, considering they present the same gate areas, channel widths and bias conditions. Therefore, the Diamond layout style can be considered another hardness-by-design (HBD) layout strategy to boost the electrical performance and ionizing radiation tolerance of MOSFETs.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124195087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919428
T. A. Ribeiro, M. Pavanello
This work studies the effects of high temperature on the scattering mechanisms of Junctionless Nanowire Transistors with several fin width from nanowire to quasi-planar devices. With the variation of the temperature it was possible to analyze the impact of the scattering mechanisms on the devices. For nanowire devices at room temperature a degradation of up to 19% was seen from the maximum mobility to the mobility at higher gate bias to around 15% at 500K, while quasi-planar devices show a degradation of around 12% for all temperatures. Further analysis shows that the impact of the surface roughness for nanowires increase the degradation of these devices, where a reduction of its degradation at higher temperature shows the phonon scattering as the main scattering mechanism.
{"title":"Analysis of the Scattering Mechanisms in the Accumulation Layer of Junctionless Nanowire Transistors at High Temperature","authors":"T. A. Ribeiro, M. Pavanello","doi":"10.1109/SBMicro.2019.8919428","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919428","url":null,"abstract":"This work studies the effects of high temperature on the scattering mechanisms of Junctionless Nanowire Transistors with several fin width from nanowire to quasi-planar devices. With the variation of the temperature it was possible to analyze the impact of the scattering mechanisms on the devices. For nanowire devices at room temperature a degradation of up to 19% was seen from the maximum mobility to the mobility at higher gate bias to around 15% at 500K, while quasi-planar devices show a degradation of around 12% for all temperatures. Further analysis shows that the impact of the surface roughness for nanowires increase the degradation of these devices, where a reduction of its degradation at higher temperature shows the phonon scattering as the main scattering mechanism.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"166 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130340095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-08-01DOI: 10.1109/SBMicro.2019.8919412
T. Borrely, A. Quivy
Numerical simulations were used to assess the relevance of the parameters involved in producing GaAs solar cells (SCs). Optical characteristics of SCs were calculated via OpenFilters software, while device performances were calculated via SCAPS software. Junction thickness, doping level, surface-field layer composition and anti-reflective coating thickness were found to be extremely important parameters, meaning that a small variation of their values may lead to a substantial efficiency reduction. These results indicate that researchers must be very careful when comparing different new-concepts SCs, because small lapses or fluctuations in production processes may enshroud the new-concept related changes.
{"title":"Realistic Simulations and Design of GaAs Solar Cells produced by Molecular Beam Epitaxy","authors":"T. Borrely, A. Quivy","doi":"10.1109/SBMicro.2019.8919412","DOIUrl":"https://doi.org/10.1109/SBMicro.2019.8919412","url":null,"abstract":"Numerical simulations were used to assess the relevance of the parameters involved in producing GaAs solar cells (SCs). Optical characteristics of SCs were calculated via OpenFilters software, while device performances were calculated via SCAPS software. Junction thickness, doping level, surface-field layer composition and anti-reflective coating thickness were found to be extremely important parameters, meaning that a small variation of their values may lead to a substantial efficiency reduction. These results indicate that researchers must be very careful when comparing different new-concepts SCs, because small lapses or fluctuations in production processes may enshroud the new-concept related changes.","PeriodicalId":403446,"journal":{"name":"2019 34th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123800449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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