Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490919
Sanming Hu, Lei Wang, Y. Xiong, Jinglin Shi, Bolun Zhang, Dan Zhao, T. Lim, X. Yuan
The 3-D integration using through silicon vias (TSVs) is expected to realize compact circuits and systems with high performance and multi-functionality. Based on the TSV technology, a hairpin bandpass filter and a microstrip patch antenna for millimeter-wave (mmW)/terahertz (THz) application are designed and presented in this paper. Additionally, a novel TSV-based solution for the integration of antennas with front-end circuits is proposed. The TSV-based hairpin bandpass filter has the insertion loss of 6.9 dB at 120 GHz with 20 GHz passband from 110 to 130 GHz, whereas the filter size is only 300 × 250 × 50 µm. The designed antenna is with 10-dB impedance bandwidth of 137 to 146 GHz, the boresight directivity and antenna gain is 3.49 dBi and −3.16 dBi, respectively, and the radiation efficiency is 21.6% which is around twice than that of many conventional on-chip antennas. The TSV-based integration solution is expected to reduce not only the total chip size but also the electromagnetic interference (EMI) effect, which are major concerns in the mmW/THz systems.
{"title":"Millimeter-wave/THz passive components design using through silicon via (TSV) technology","authors":"Sanming Hu, Lei Wang, Y. Xiong, Jinglin Shi, Bolun Zhang, Dan Zhao, T. Lim, X. Yuan","doi":"10.1109/ECTC.2010.5490919","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490919","url":null,"abstract":"The 3-D integration using through silicon vias (TSVs) is expected to realize compact circuits and systems with high performance and multi-functionality. Based on the TSV technology, a hairpin bandpass filter and a microstrip patch antenna for millimeter-wave (mmW)/terahertz (THz) application are designed and presented in this paper. Additionally, a novel TSV-based solution for the integration of antennas with front-end circuits is proposed. The TSV-based hairpin bandpass filter has the insertion loss of 6.9 dB at 120 GHz with 20 GHz passband from 110 to 130 GHz, whereas the filter size is only 300 × 250 × 50 µm. The designed antenna is with 10-dB impedance bandwidth of 137 to 146 GHz, the boresight directivity and antenna gain is 3.49 dBi and −3.16 dBi, respectively, and the radiation efficiency is 21.6% which is around twice than that of many conventional on-chip antennas. The TSV-based integration solution is expected to reduce not only the total chip size but also the electromagnetic interference (EMI) effect, which are major concerns in the mmW/THz systems.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114634007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490686
N. Khan, D. Wee, O. S. Chiew, Cheryl Sharmani, L. Lim, Hong Yu Li, Shekar Vasarala
Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch microjoints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm × 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.
{"title":"Three chips stacking with low volume solder using single re-flow process","authors":"N. Khan, D. Wee, O. S. Chiew, Cheryl Sharmani, L. Lim, Hong Yu Li, Shekar Vasarala","doi":"10.1109/ECTC.2010.5490686","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490686","url":null,"abstract":"Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch microjoints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm × 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116281956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490671
Wei Gao, Zhihua Li, Jian Song, Xu Zhang, Feng Chen, Fengman Liu, Yunyan Zhou, Jun Li, H. Xiang, Jing Zhou, Shuhua Liu, Yu Wang, Qidong Wang, Baoxia Li, Zhan Shi, Liqiang Cao, L. Wan
This paper presents an electrical design of a 6.25Gbps×12-channel parallel optical transceiver with SiP packaging technology. Considering such high speed, a low impedance and low noise power distribution network (PDN) is designed to suppress simultaneous switching noise (SSN) and a novel embedded capacitor filter is used to replace the conventional power supply filter. To minimize the impedance discontinuity of electrical channels, a signal integrity (SI) design flow based on Electromagnetic Analysis Method and Circuit Analysis Method is proposed. Following this design flow, the high speed link performs on a large bandwidth. With the electrical design, the optical transceiver is fabricated and tested.
{"title":"An electrical design and fabrication of a 12-channel optical transceiver with SiP packaging technology","authors":"Wei Gao, Zhihua Li, Jian Song, Xu Zhang, Feng Chen, Fengman Liu, Yunyan Zhou, Jun Li, H. Xiang, Jing Zhou, Shuhua Liu, Yu Wang, Qidong Wang, Baoxia Li, Zhan Shi, Liqiang Cao, L. Wan","doi":"10.1109/ECTC.2010.5490671","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490671","url":null,"abstract":"This paper presents an electrical design of a 6.25Gbps×12-channel parallel optical transceiver with SiP packaging technology. Considering such high speed, a low impedance and low noise power distribution network (PDN) is designed to suppress simultaneous switching noise (SSN) and a novel embedded capacitor filter is used to replace the conventional power supply filter. To minimize the impedance discontinuity of electrical channels, a signal integrity (SI) design flow based on Electromagnetic Analysis Method and Circuit Analysis Method is proposed. Following this design flow, the high speed link performs on a large bandwidth. With the electrical design, the optical transceiver is fabricated and tested.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124086073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490742
J. Agar, Katy J. Lin, Rongwei Zhang, J. Durden, K. Lawrence, K. Moon, C. Wong
The modern emphasis on green technologies has caused the electronics industry to seek alternative solutions to lead-based interconnections. Electrically conductive adhesive (ECAs) composed of metallic fillers within a polymer matrix have received the majority of the interest in lead-free interconnect technology. However, ECAs are still unable to meet the demands of high performance consumer electronics. Previous research recognized a critical filler concentration where there is a dramatic increase in conductivity, followed by a plateau. Researchers have labeled this transition as evidence of a percolation, implying a continuous interconnected metallic network. Our work comprised of a series of "proof of concept" type experiments deconstructs the myth of percolation and emphasize the functional role of the polymer matrix. From a theoretical standpoint direct metal to metal contact is not feasible since silver particles coated with short chain acids are easily wet by the polymer matrix. Assembly conducted under low mechanical stresses is unable to displace the adsorbed surfactant to form metallic contact. Moreover, preparation of a high K epoxy (Dielectric Constant ~5.5), Co(III) acetylacetonates (Co(III) AcAcs) doped diglycidyl ether of bisphenol F had unstable conductivities orders of magnitude lower than the control samples; under similar applied DC. Dielectric constant has a minimal effect if metal to metal contact is the dominant charge transport mechanism. However, tunneling through materials with high dielectric constant impedes the tunneling efficiency. We clearly demonstrate that charge transport at the interface occurs via secondary conductivity pathways, dominated by thermally assisted tunneling mechanisms. The importance of these secondary conductivity mechanisms is highly dependent on the particle-thin film dielectric interaction. This revolutionary discovery provides a new approach for scientists and engineers to improve the performance of electrically conductive adhesives through the incorporation of electrically functional matrix materials.
{"title":"Deconstructing the myth of percolation in electrically conductive adhesives and its implications","authors":"J. Agar, Katy J. Lin, Rongwei Zhang, J. Durden, K. Lawrence, K. Moon, C. Wong","doi":"10.1109/ECTC.2010.5490742","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490742","url":null,"abstract":"The modern emphasis on green technologies has caused the electronics industry to seek alternative solutions to lead-based interconnections. Electrically conductive adhesive (ECAs) composed of metallic fillers within a polymer matrix have received the majority of the interest in lead-free interconnect technology. However, ECAs are still unable to meet the demands of high performance consumer electronics. Previous research recognized a critical filler concentration where there is a dramatic increase in conductivity, followed by a plateau. Researchers have labeled this transition as evidence of a percolation, implying a continuous interconnected metallic network. Our work comprised of a series of \"proof of concept\" type experiments deconstructs the myth of percolation and emphasize the functional role of the polymer matrix. From a theoretical standpoint direct metal to metal contact is not feasible since silver particles coated with short chain acids are easily wet by the polymer matrix. Assembly conducted under low mechanical stresses is unable to displace the adsorbed surfactant to form metallic contact. Moreover, preparation of a high K epoxy (Dielectric Constant ~5.5), Co(III) acetylacetonates (Co(III) AcAcs) doped diglycidyl ether of bisphenol F had unstable conductivities orders of magnitude lower than the control samples; under similar applied DC. Dielectric constant has a minimal effect if metal to metal contact is the dominant charge transport mechanism. However, tunneling through materials with high dielectric constant impedes the tunneling efficiency. We clearly demonstrate that charge transport at the interface occurs via secondary conductivity pathways, dominated by thermally assisted tunneling mechanisms. The importance of these secondary conductivity mechanisms is highly dependent on the particle-thin film dielectric interaction. This revolutionary discovery provides a new approach for scientists and engineers to improve the performance of electrically conductive adhesives through the incorporation of electrically functional matrix materials.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"PP 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126450357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490761
Bolun Zhang, Y. Xiong, Lei Wang, Sanming Hu, Jinglin Shi, Yi-qi Zhuang, Le-Wei Li, X. Yuan
This paper presents a new concept of 3D transformer structure realized by through silicon via (TSV) technology. A set of different turn ratio transformers have been designed and analyzed. The results show that the proposed 3D TSV transformer possesses good performance with small size. Finally, an AC to DC converter circuit which based on proposed transformer has been designed. The result demonstrates that proposed 3D TSV transformer is suitable for AC to DC converter design.
{"title":"3D TSV transformer design for DC-DC/AC-DC converter","authors":"Bolun Zhang, Y. Xiong, Lei Wang, Sanming Hu, Jinglin Shi, Yi-qi Zhuang, Le-Wei Li, X. Yuan","doi":"10.1109/ECTC.2010.5490761","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490761","url":null,"abstract":"This paper presents a new concept of 3D transformer structure realized by through silicon via (TSV) technology. A set of different turn ratio transformers have been designed and analyzed. The results show that the proposed 3D TSV transformer possesses good performance with small size. Finally, an AC to DC converter circuit which based on proposed transformer has been designed. The result demonstrates that proposed 3D TSV transformer is suitable for AC to DC converter design.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127942146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490795
Linlin Yang, L. Yin, B. Roggeman, P. Borgesen
The wear out of lead-free solder joints under realistic loading conditions has been shown to deviate strongly from predictions based on current damage accumulation models. We argue that the deviation must be due to the simultaneous evolution of solder properties and damage. In general, solder properties and fatigue behaviors are determined by microstructure and damage accumulation mechanisms. Literature has reported on effects of precipitate coarsening and recrystallization of SnAgCu solders. However, we show these cannot account for critical trends in isothermal cycling such as repeated drops, bending and vibration. The present paper addresses an additional microstructure evolution path. Thermal aging and room temperature shear fatigue test on SnAgCu solder joints both demonstrated continuous hardness decrease. But precipitate coarsening was not observed in the shear fatigue test. Specially designed sample sectioning allowed the observation of slip bands formation and correlation with cyclic softening in shear fatigue test. In addition, the pattern of slip band formation was shown to be load-dependent, indicating the difference in damage accumulation. The consequences for the prediction of fatigue life under combined loading are discussed.
{"title":"Effects of microstructure evolution on damage accumulation in lead-free solder joints","authors":"Linlin Yang, L. Yin, B. Roggeman, P. Borgesen","doi":"10.1109/ECTC.2010.5490795","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490795","url":null,"abstract":"The wear out of lead-free solder joints under realistic loading conditions has been shown to deviate strongly from predictions based on current damage accumulation models. We argue that the deviation must be due to the simultaneous evolution of solder properties and damage. In general, solder properties and fatigue behaviors are determined by microstructure and damage accumulation mechanisms. Literature has reported on effects of precipitate coarsening and recrystallization of SnAgCu solders. However, we show these cannot account for critical trends in isothermal cycling such as repeated drops, bending and vibration. The present paper addresses an additional microstructure evolution path. Thermal aging and room temperature shear fatigue test on SnAgCu solder joints both demonstrated continuous hardness decrease. But precipitate coarsening was not observed in the shear fatigue test. Specially designed sample sectioning allowed the observation of slip bands formation and correlation with cyclic softening in shear fatigue test. In addition, the pattern of slip band formation was shown to be load-dependent, indicating the difference in damage accumulation. The consequences for the prediction of fatigue life under combined loading are discussed.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131427497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490932
V. Raghavan, B. Roggeman, M. Meilunas, P. Borgesen
The present work addresses a significant risk generally overlooked in the design and accelerated testing of high reliability electronics. Manufacturers of servers and other expensive high reliability electronics equipment are becoming increasingly concerned with the risk of solder pad cratering. Their focus is, however, on cratering in testing, handling or transport, while the risk of premature wear-out due to thermal excursions (cycling) in service is completely ignored. This is a result of reliability testing that almost invariably addresses individual loading conditions separately. Under such conditions it is for example extremely rare for electrical failures in thermal cycling or high-cycle vibration testing to be associated with pad cratering. The present paper shows how manufacturers of high reliability equipment intended for mechanically protected or benign service conditions may be missing a significant risk of invisible damage induced in testing, handling or transport which may change the failure mode in service. We present first results of a systematic effort aimed at redefining currently proposed pad cratering test protocols.
{"title":"Effects of pre-stressing on solder joint failure by pad cratering","authors":"V. Raghavan, B. Roggeman, M. Meilunas, P. Borgesen","doi":"10.1109/ECTC.2010.5490932","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490932","url":null,"abstract":"The present work addresses a significant risk generally overlooked in the design and accelerated testing of high reliability electronics. Manufacturers of servers and other expensive high reliability electronics equipment are becoming increasingly concerned with the risk of solder pad cratering. Their focus is, however, on cratering in testing, handling or transport, while the risk of premature wear-out due to thermal excursions (cycling) in service is completely ignored. This is a result of reliability testing that almost invariably addresses individual loading conditions separately. Under such conditions it is for example extremely rare for electrical failures in thermal cycling or high-cycle vibration testing to be associated with pad cratering. The present paper shows how manufacturers of high reliability equipment intended for mechanically protected or benign service conditions may be missing a significant risk of invisible damage induced in testing, handling or transport which may change the failure mode in service. We present first results of a systematic effort aimed at redefining currently proposed pad cratering test protocols.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134301804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490640
Xin Li, Xu Chen, G. Lu
Heat dissipation for packaging high-power light-emitting diodes is critically important to performance and reliability of LED lighting modules. The first thermal interface encountered by the heat flow is a die-attach material between the diode chip and its substrate. In this study, three different types of die-attach materials were used to construct 1-Watt GaN LED single-chip modules: a silver epoxy processed by curing; a lead-free solder paste by reflowing; and a nanosilver paste by low-temperature sintering. The modules were aged in an 85°C/85% relative humidity chamber and temperature-cycled between −40°C and 150°C. Luminous fluxes of the aged and cycled modules were measured to determine the effect of die-attach material. Results showed that the LED modules with chips joined by the low-temperature sintered nanosilver paste gave the best performance and long-term stability. This is attributed to high thermal conductivity of the sintered silver joint for improved heat dissipation.
{"title":"Effect of die-attach material on performance and reliability of high-power light-emitting diode modules","authors":"Xin Li, Xu Chen, G. Lu","doi":"10.1109/ECTC.2010.5490640","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490640","url":null,"abstract":"Heat dissipation for packaging high-power light-emitting diodes is critically important to performance and reliability of LED lighting modules. The first thermal interface encountered by the heat flow is a die-attach material between the diode chip and its substrate. In this study, three different types of die-attach materials were used to construct 1-Watt GaN LED single-chip modules: a silver epoxy processed by curing; a lead-free solder paste by reflowing; and a nanosilver paste by low-temperature sintering. The modules were aged in an 85°C/85% relative humidity chamber and temperature-cycled between −40°C and 150°C. Luminous fluxes of the aged and cycled modules were measured to determine the effect of die-attach material. Results showed that the LED modules with chips joined by the low-temperature sintered nanosilver paste gave the best performance and long-term stability. This is attributed to high thermal conductivity of the sintered silver joint for improved heat dissipation.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132958335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490894
Hae-Young Cho, Tae-Jin Kim, Young Min Kim, Sun-Chul Kim, Jin-young Park, Young-Ho Kim
We developed an Au/Ni-Zn/Ti under bump metallurgy (UBM) for Pb-free solders. Au/Ni-Zn/Ti and Au/Ni/Ti UBM stacks were deposited on SiO2/Si wafer using conventional magnetron sputtering and Sn solder was electroplated on UBM stacks. Then, Sn solder on UBM were reflowed at 260°C for 15 s and aged at 150°C up to 1000 h. The measurement of film stress using a curvature method showed Ni-Zn films having the very low tensile stress could be obtained by controlling the Ar pressure. Ni3Sn4 intermetallic compound (IMC) was formed on both Ni-Zn UBM and Ni UBM after reflow and IMC thickness increased with aging time. Other IMCs besides Ni3Sn4 were not observed after aging. IMC growth of Ni-Zn UBM was slower than that of Ni. UBM consumption rate of Ni-Zn UBM was also lower than that of Ni UBM. These beneficial results were ascribed to the effect of Zn, which played a role of interdiffusion barrier between Sn and Ni. Our results revealed that Ni-Zn layer is a promising UBM for Pb free solders.
{"title":"A new Ni-Zn under bump metallurgy for Pb-free solder bump flip chip application","authors":"Hae-Young Cho, Tae-Jin Kim, Young Min Kim, Sun-Chul Kim, Jin-young Park, Young-Ho Kim","doi":"10.1109/ECTC.2010.5490894","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490894","url":null,"abstract":"We developed an Au/Ni-Zn/Ti under bump metallurgy (UBM) for Pb-free solders. Au/Ni-Zn/Ti and Au/Ni/Ti UBM stacks were deposited on SiO2/Si wafer using conventional magnetron sputtering and Sn solder was electroplated on UBM stacks. Then, Sn solder on UBM were reflowed at 260°C for 15 s and aged at 150°C up to 1000 h. The measurement of film stress using a curvature method showed Ni-Zn films having the very low tensile stress could be obtained by controlling the Ar pressure. Ni3Sn4 intermetallic compound (IMC) was formed on both Ni-Zn UBM and Ni UBM after reflow and IMC thickness increased with aging time. Other IMCs besides Ni3Sn4 were not observed after aging. IMC growth of Ni-Zn UBM was slower than that of Ni. UBM consumption rate of Ni-Zn UBM was also lower than that of Ni UBM. These beneficial results were ascribed to the effect of Zn, which played a role of interdiffusion barrier between Sn and Ni. Our results revealed that Ni-Zn layer is a promising UBM for Pb free solders.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117318028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490946
S. Aono, M. Unno, H. Asai
In this paper, we propose a new FDTD (Finite-Difference Time-Domain) method using the alternating-direction explicit (ADE) method for the efficient electromagnetic field simulation. This method is based on the ADE method which has been used as the explicit-type finite-difference algorithm for solving diffusion equations. Our approach is the first application of the ADE method to the 3D-FDTD method. Furthermore, we introduce an absorbing boundary condition suitable for the 3D ADE-FDTD method which has been modified from the PML (perfectly matched layer). Finally, the efficiency of the ADE-FDTD method is evaluated by computer simulations.
{"title":"Alternating-direction explicit FDTD method for three-dimensional full-wave simulation","authors":"S. Aono, M. Unno, H. Asai","doi":"10.1109/ECTC.2010.5490946","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490946","url":null,"abstract":"In this paper, we propose a new FDTD (Finite-Difference Time-Domain) method using the alternating-direction explicit (ADE) method for the efficient electromagnetic field simulation. This method is based on the ADE method which has been used as the explicit-type finite-difference algorithm for solving diffusion equations. Our approach is the first application of the ADE method to the 3D-FDTD method. Furthermore, we introduce an absorbing boundary condition suitable for the 3D ADE-FDTD method which has been modified from the PML (perfectly matched layer). Finally, the efficiency of the ADE-FDTD method is evaluated by computer simulations.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"794 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131238941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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