Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490802
Hui Liu, Hong Shi, J. Xie
This paper analyzes high-speed interface simultaneous switching jitter (SSJ) and mathematically describes methods for reducing SSJ in number, spatial, time, and frequency dimensions. Quantitative relationships between SSJ and its major sources — SSO crosstalk, driver PDN SSN, and pre-driver PDN SSN — are discussed. Firmware and hardware methods for SSJ reduction on die, on package, and on PCB from system co-design point of view are described. The effectiveness of SSJ reduction through data encoding is proved mathematically. New concepts, such as effective density of simultaneous switching bits, two-stage selective fixed-length encoding, three-path PDN co-design, are introduced for SSJ reduction in different dimensions. A new PDN design method based on noise to jitter transfer function and jitter sensitivity profiles is described as well. Concepts and methods are validated through system level simulations and measurements.
{"title":"Reduce simultaneous switching jitter in number, spatial, time, and frequency dimensions","authors":"Hui Liu, Hong Shi, J. Xie","doi":"10.1109/ECTC.2010.5490802","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490802","url":null,"abstract":"This paper analyzes high-speed interface simultaneous switching jitter (SSJ) and mathematically describes methods for reducing SSJ in number, spatial, time, and frequency dimensions. Quantitative relationships between SSJ and its major sources — SSO crosstalk, driver PDN SSN, and pre-driver PDN SSN — are discussed. Firmware and hardware methods for SSJ reduction on die, on package, and on PCB from system co-design point of view are described. The effectiveness of SSJ reduction through data encoding is proved mathematically. New concepts, such as effective density of simultaneous switching bits, two-stage selective fixed-length encoding, three-path PDN co-design, are introduced for SSJ reduction in different dimensions. A new PDN design method based on noise to jitter transfer function and jitter sensitivity profiles is described as well. Concepts and methods are validated through system level simulations and measurements.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127771288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490841
D. V. Campbell
Assemblies produced by 3D Integration, whether fabricated at die or wafer level, involve a large number of post fab processing steps. Performing the prove-in of these operations on high value product has many limitations. This work uses simple surrogate process characterization vehicles, which workaround limitations of cost, timeliness of piecparts, ability to consider multiple processing options, and insufficient volumes for adequately exercising flows to collect specific process data for characterization. The test structures easily adapt to specific product in terms of die dimensions, aspect ratios, pitch and number of interconnects, and etc. This results in good fidelity in exercising product-specific processing. The discussed Cyclops vehicle implements a mirrored layout suitable for stacking to itself by wafer-to-wafer, die-to-wafer, or die-to-die. A standardized 2×10 pad test interface allows characterization of any of the integration methods with a single simple setup. This design offers the utility of comparison study of the various methods all using the same basis.
{"title":"Process characterization vehicles for 3D Integration","authors":"D. V. Campbell","doi":"10.1109/ECTC.2010.5490841","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490841","url":null,"abstract":"Assemblies produced by 3D Integration, whether fabricated at die or wafer level, involve a large number of post fab processing steps. Performing the prove-in of these operations on high value product has many limitations. This work uses simple surrogate process characterization vehicles, which workaround limitations of cost, timeliness of piecparts, ability to consider multiple processing options, and insufficient volumes for adequately exercising flows to collect specific process data for characterization. The test structures easily adapt to specific product in terms of die dimensions, aspect ratios, pitch and number of interconnects, and etc. This results in good fidelity in exercising product-specific processing. The discussed Cyclops vehicle implements a mirrored layout suitable for stacking to itself by wafer-to-wafer, die-to-wafer, or die-to-die. A standardized 2×10 pad test interface allows characterization of any of the integration methods with a single simple setup. This design offers the utility of comparison study of the various methods all using the same basis.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134623020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490824
A. Ohlander, Christof Strohhöfer, Karlheinz Bock, S. Scott, Zulfiqur Ali, P. Musil, J. Kyselovič
This paper reports the development and characterisation of an assembly technology for a polymer lab-on-chip. The system consists of a 150 μm deep hot embossed microfluidic channel in polycarbonate and Au electrodes fabricated separately by photolithography on polyethylenenaphthalate. The system is designed for impedimetric immunoassay detection in whole blood. Electrode layer and microfluidic substrate are joined by means of a 50 μm thick double-sided medical grade adhesive tape, adjusted with an optical alignment system. The bond proved to be liquid tight at room temperature. An alignment accuracy of 34 μm (+/- 19 μm) evaluated over a set of 23 samples, was achieved. The effect of alignment accuracy of the intermediate adhesive film on whole blood flow properties in the device is studied. Already an alignment error of 70 μm increases the flushing out time of whole blood by approximately 20%.
{"title":"Assembly of a polymer lab-on-chip device for impedimetric measurements of D-dimers in whole blood","authors":"A. Ohlander, Christof Strohhöfer, Karlheinz Bock, S. Scott, Zulfiqur Ali, P. Musil, J. Kyselovič","doi":"10.1109/ECTC.2010.5490824","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490824","url":null,"abstract":"This paper reports the development and characterisation of an assembly technology for a polymer lab-on-chip. The system consists of a 150 μm deep hot embossed microfluidic channel in polycarbonate and Au electrodes fabricated separately by photolithography on polyethylenenaphthalate. The system is designed for impedimetric immunoassay detection in whole blood. Electrode layer and microfluidic substrate are joined by means of a 50 μm thick double-sided medical grade adhesive tape, adjusted with an optical alignment system. The bond proved to be liquid tight at room temperature. An alignment accuracy of 34 μm (+/- 19 μm) evaluated over a set of 23 samples, was achieved. The effect of alignment accuracy of the intermediate adhesive film on whole blood flow properties in the device is studied. Already an alignment error of 70 μm increases the flushing out time of whole blood by approximately 20%.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127373756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490664
Yongtaek Lee, Kai Liu, R. Frye, Hyuntai Kim, Gwang Kim, B. Ahn
Currently, there is widespread adoption of silicon-based technologies for the implementation of radio frequency (RF) integrated passive devices (IPDs) because of their low-cost, small footprint and high performance. These devices are receiving increased attention for developing front-end-module (FEM) applications in mobile communication systems. This paper discusses the design of low pass filters (LPF) for use in the GHz range with high harmonic rejection. In large modules, these filters make use of co-planar ground planes and lumped IPD technology on a silicon substrate CSMP (Chip Scale Module Package). The use of coplanar ground in such modules introduces unique performance constraints, especially in filters requiring high harmonic rejection. These problems are discussed, along with design approaches to help mitigate them.
{"title":"High rejection low-pass-filter design using integrated passive device technology for Chip-Scale Module Package","authors":"Yongtaek Lee, Kai Liu, R. Frye, Hyuntai Kim, Gwang Kim, B. Ahn","doi":"10.1109/ECTC.2010.5490664","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490664","url":null,"abstract":"Currently, there is widespread adoption of silicon-based technologies for the implementation of radio frequency (RF) integrated passive devices (IPDs) because of their low-cost, small footprint and high performance. These devices are receiving increased attention for developing front-end-module (FEM) applications in mobile communication systems. This paper discusses the design of low pass filters (LPF) for use in the GHz range with high harmonic rejection. In large modules, these filters make use of co-planar ground planes and lumped IPD technology on a silicon substrate CSMP (Chip Scale Module Package). The use of coplanar ground in such modules introduces unique performance constraints, especially in filters requiring high harmonic rejection. These problems are discussed, along with design approaches to help mitigate them.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115443939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490653
A. Hsing, A. Kearney, L. Li, J. Xue, M. Brillhart, R. Dauskardt
Packaging advanced silicon devices has become increasingly challenging because the effects of stresses exerted on interconnect structures during package assembly and operation are not well understood. In this study, a microprobe metrology system is used to assess the mechanics of these interconnect structures. This allows for a better understanding of the robustness of an interconnect design and the stresses that can be tolerated before damage initiation.
{"title":"Micromechanics and damage processes in interconnect structures","authors":"A. Hsing, A. Kearney, L. Li, J. Xue, M. Brillhart, R. Dauskardt","doi":"10.1109/ECTC.2010.5490653","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490653","url":null,"abstract":"Packaging advanced silicon devices has become increasingly challenging because the effects of stresses exerted on interconnect structures during package assembly and operation are not well understood. In this study, a microprobe metrology system is used to assess the mechanics of these interconnect structures. This allows for a better understanding of the robustness of an interconnect design and the stresses that can be tolerated before damage initiation.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115898447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490895
Shaorui Yang, F. Gao, J. Qu
A novel Epoxy Molding Compound (EMC) with a crosslinked network structure was formed by curing tri-/tetra-functionalized EPN1180 with Bisphenol-A. A full atomistic model reflecting the network nature of the material was constructed by applying an iterative crosslinking algorithm to an amorphous cell with 3D periodic boundary condition containing the stoichiometric mixture of constitutive monomers. The geometry of the model was then optimized using the COMPASS force-field in Materials Studio [1]. The variation of system density and volume against temperature was simulated using a cooling down profile, which was employed to derive the glass transition temperature and coefficient of thermal expansion of the system. Furthermore, the Young's modulus and Poisson's ratio were calculated by uni-axial tensile molecular statics simulations. The material properties computed by molecular dynamics/mechanics simulations were in good agreement with experiment measurements. An epoxy resin/copper interface model was constructed and the interfacial adhesion energy was calculated as the energy difference between the total energy of the entire system and the sum of the energies of individual materials. The traction-displacement law of the interface was derived when the system was subjected to a molecular statics uniaxial tension. The work of separation and the peak traction, considered as the two key parameters required by cohesive zone finite element simulation, were extracted from the traction-displacement law.
{"title":"A study of highly crosslinked Epoxy Molding Compound and its interface with copper substrate by molecular dynamic simulations","authors":"Shaorui Yang, F. Gao, J. Qu","doi":"10.1109/ECTC.2010.5490895","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490895","url":null,"abstract":"A novel Epoxy Molding Compound (EMC) with a crosslinked network structure was formed by curing tri-/tetra-functionalized EPN1180 with Bisphenol-A. A full atomistic model reflecting the network nature of the material was constructed by applying an iterative crosslinking algorithm to an amorphous cell with 3D periodic boundary condition containing the stoichiometric mixture of constitutive monomers. The geometry of the model was then optimized using the COMPASS force-field in Materials Studio [1]. The variation of system density and volume against temperature was simulated using a cooling down profile, which was employed to derive the glass transition temperature and coefficient of thermal expansion of the system. Furthermore, the Young's modulus and Poisson's ratio were calculated by uni-axial tensile molecular statics simulations. The material properties computed by molecular dynamics/mechanics simulations were in good agreement with experiment measurements. An epoxy resin/copper interface model was constructed and the interfacial adhesion energy was calculated as the energy difference between the total energy of the entire system and the sum of the energies of individual materials. The traction-displacement law of the interface was derived when the system was subjected to a molecular statics uniaxial tension. The work of separation and the peak traction, considered as the two key parameters required by cohesive zone finite element simulation, were extracted from the traction-displacement law.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124341746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490638
Yunhan Huang, R. Doraiswami, M. Osterman, M. Pecht
This paper presents a novel technology which provides a promising solution for designing self-powered microsystems. Micro-Electro Mechanical System (MEMS) energy harvesting is an emerging alternative for scavenging energy from natural sources. It has extensive potential in wireless sensor applications to provide a natural energy source that is essentially inexhaustible. It is an increasingly attractive alternative to costly batteries. This essentially free energy source is available maintenance-free throughout the lifetime of the application. Many systems, such as wireless sensor networks, portable electronics and cell phones, can use this technology as a power source. Although some types of MEMS, such as electro-magnetic MEMS, electrostatic MEMS, and piezoelectric MEMS, are used to provide energy in various applications, they have several technical barriers that limit their applications, including low efficiency, issues of scaling, and high cost. Our novel MEMS solar energy harvesting technology is scalable and also easily integrated in microsystems. The RF MEMS design not only has to provide functional efficiency, but also must work within the limits of maximum charge and discharge conversion efficiency. The energy harvesting technologies currently available which utilizes RF MEMS to convert solar energy into charge, can achieve better benefits than photovoltaic cells. In this paper we provide design, fabrication, testing and evaluation of RF MEMS and its working limits in charging and discharging.
{"title":"Energy harvesting using RF MEMS","authors":"Yunhan Huang, R. Doraiswami, M. Osterman, M. Pecht","doi":"10.1109/ECTC.2010.5490638","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490638","url":null,"abstract":"This paper presents a novel technology which provides a promising solution for designing self-powered microsystems. Micro-Electro Mechanical System (MEMS) energy harvesting is an emerging alternative for scavenging energy from natural sources. It has extensive potential in wireless sensor applications to provide a natural energy source that is essentially inexhaustible. It is an increasingly attractive alternative to costly batteries. This essentially free energy source is available maintenance-free throughout the lifetime of the application. Many systems, such as wireless sensor networks, portable electronics and cell phones, can use this technology as a power source. Although some types of MEMS, such as electro-magnetic MEMS, electrostatic MEMS, and piezoelectric MEMS, are used to provide energy in various applications, they have several technical barriers that limit their applications, including low efficiency, issues of scaling, and high cost. Our novel MEMS solar energy harvesting technology is scalable and also easily integrated in microsystems. The RF MEMS design not only has to provide functional efficiency, but also must work within the limits of maximum charge and discharge conversion efficiency. The energy harvesting technologies currently available which utilizes RF MEMS to convert solar energy into charge, can achieve better benefits than photovoltaic cells. In this paper we provide design, fabrication, testing and evaluation of RF MEMS and its working limits in charging and discharging.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114332923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490714
C. D. Morcillo, S. Bhattacharya, A. Horn, J. Papapolymerou
For the first time, the thermal stability of the dielectric properties, i.e. the relative permittivity and the loss tangent, are presented for RT/duroid® 6002 from 30 GHz to 70 GHz over the temperature range between 20 °C and 200 °C, using the microstrip ring resonator method at two different microstrip impedances. High-frequency-resolution, Multiline TRL calibrations were performed at each temperature point to increase the accuracy of the measurements. Measurements show a remarkably-stable normalized temperature coefficient of the relative permittivity of −17.6 ppm/°C across the entire bandwidth. Likewise, the normalized loss tangent temperature coefficient had a value of about 0.00118 °C−1, with little variations throughout the measurement bandwidth.
{"title":"Thermal stability of the dielectric properties of the low-loss, organic material RT/duroid 6002 from 30 GHz to 70 GHz","authors":"C. D. Morcillo, S. Bhattacharya, A. Horn, J. Papapolymerou","doi":"10.1109/ECTC.2010.5490714","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490714","url":null,"abstract":"For the first time, the thermal stability of the dielectric properties, i.e. the relative permittivity and the loss tangent, are presented for RT/duroid® 6002 from 30 GHz to 70 GHz over the temperature range between 20 °C and 200 °C, using the microstrip ring resonator method at two different microstrip impedances. High-frequency-resolution, Multiline TRL calibrations were performed at each temperature point to increase the accuracy of the measurements. Measurements show a remarkably-stable normalized temperature coefficient of the relative permittivity of −17.6 ppm/°C across the entire bandwidth. Likewise, the normalized loss tangent temperature coefficient had a value of about 0.00118 °C−1, with little variations throughout the measurement bandwidth.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114928677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490693
K. Son, Chin C. Lee
Lead titanate (PbTiO3) is a popular piezoelectric material for acoustic transducers because of its high electromechanical coupling coefficient. To drive a transducer effectively, its input impedance must match well to the generator output impedance, usually 50Ω. To develop impedance matching technique, an equivalent circuit model is established. PT piezoelectric plates are bonded on bismuth, Lucite and LCP, respectively to form transducers. The input impedance of the transducers is calculated and also measure versus frequency. It is discovered that there are two off-resonant frequencies at which the reactance part of the input impedance is zero, referred to as the zero-crossing frequency. This is possible because of an inherent electrical property of the transducer, the existence of the plate capacitance. The higher zero-crossing frequency is close to the resonant frequency. The input resistance is usually very high. At the lower zero-crossing frequency, the input resistance is close to 50Ω for practical plate sizes. Thus, good impedance matching can be achieved by operating at this frequency. The matching can be fine tuned by adjusting transducer electrode size and controlling the bonding layer thickness. Nearly perfect matching is demonstrated without using any external component. The simulated and measurement response curves versus frequency also show the transducer bandwidth.
{"title":"Modeling and measurements of lead titanate acoustic transducers for input impedance matching development","authors":"K. Son, Chin C. Lee","doi":"10.1109/ECTC.2010.5490693","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490693","url":null,"abstract":"Lead titanate (PbTiO3) is a popular piezoelectric material for acoustic transducers because of its high electromechanical coupling coefficient. To drive a transducer effectively, its input impedance must match well to the generator output impedance, usually 50Ω. To develop impedance matching technique, an equivalent circuit model is established. PT piezoelectric plates are bonded on bismuth, Lucite and LCP, respectively to form transducers. The input impedance of the transducers is calculated and also measure versus frequency. It is discovered that there are two off-resonant frequencies at which the reactance part of the input impedance is zero, referred to as the zero-crossing frequency. This is possible because of an inherent electrical property of the transducer, the existence of the plate capacitance. The higher zero-crossing frequency is close to the resonant frequency. The input resistance is usually very high. At the lower zero-crossing frequency, the input resistance is close to 50Ω for practical plate sizes. Thus, good impedance matching can be achieved by operating at this frequency. The matching can be fine tuned by adjusting transducer electrode size and controlling the bonding layer thickness. Nearly perfect matching is demonstrated without using any external component. The simulated and measurement response curves versus frequency also show the transducer bandwidth.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117073257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-01DOI: 10.1109/ECTC.2010.5490831
R. Barnett, D. Thomas, Yiping Song, D. Tossell, T. Barrass, O. Ansell
The demand for evermore sensitive MEMS sensor devices, such as gyroscopes, has driven the need for the manufacturing processes to deliver smaller tolerances. This is especially evident when considering the DRIE process used to fabricate the intricate sensor features on the silicon wafer. Aspect ratios have become higher with CDs reducing and etch depths increasing. But of particular significance when referring to MEMS gyroscopes is profile tilt. Device design and signal processing can no longer compensate for innate tilt, and so the manufacturing methods have to improve to deliver the levels of tilt necessary for the next generation of devices at a cost effective throughput. This paper will describe data from a new plasma source design, the Pegasus Rapier, employed to improve the tilt performance of the Bosch DRIE process [1] for the productionisation of next generation MEMS gyroscopes. This data will show <±0.15° profile tilt capability on 200mm wafers at rates of 7µm/min for a 20:1 aspect ratio trench.
{"title":"A new plasma source for next generation MEMS deep Si etching: Minimal tilt, improved profile uniformity and higher etch rates","authors":"R. Barnett, D. Thomas, Yiping Song, D. Tossell, T. Barrass, O. Ansell","doi":"10.1109/ECTC.2010.5490831","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490831","url":null,"abstract":"The demand for evermore sensitive MEMS sensor devices, such as gyroscopes, has driven the need for the manufacturing processes to deliver smaller tolerances. This is especially evident when considering the DRIE process used to fabricate the intricate sensor features on the silicon wafer. Aspect ratios have become higher with CDs reducing and etch depths increasing. But of particular significance when referring to MEMS gyroscopes is profile tilt. Device design and signal processing can no longer compensate for innate tilt, and so the manufacturing methods have to improve to deliver the levels of tilt necessary for the next generation of devices at a cost effective throughput. This paper will describe data from a new plasma source design, the Pegasus Rapier, employed to improve the tilt performance of the Bosch DRIE process [1] for the productionisation of next generation MEMS gyroscopes. This data will show <±0.15° profile tilt capability on 200mm wafers at rates of 7µm/min for a 20:1 aspect ratio trench.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129791764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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