Dongming Zhao, Huijuan Liu, Ke-wen Xia, Shi Li, Xiaoxu Shi
This paper presents a signal injection technology showing significant reductions in both 3rd-order and 5th-order intermodulation distortions (IMD3 and IMD5) in space traveling wave tube (STWT). By applying the IMD3 to the IMD5 ratio (TFR) as measures of location, the simultaneous suppressions of IMD3 and IMD5 in TWT are achieved by second harmonic distortion (2HD) and IMD3 injection. According to the research on theoretical analysis and computer simulation, the optimum amplitude and phase parameters of the injected signal for maximum simultaneous suppressions are obtained. Then an experiment system is established based on vector network analyzer, optimum TFR are 2.1 dB and 12.5 dB, respectively, by second harmonic and IM3 injection, and the output powers of IMD3 and IMD5 were decreased. TFR with IMD3 injection is smaller than that with second harmonic injection in STWT, and the experiment system is more straightforward and easy to operate. Thus, the IMD3 injection performs better than that of second harmonic injection to suppress IMD5s for the narrow-band STWT.
{"title":"Simultaneous Suppression of IMD3 and IMD5 in Space TWT by IMD3 and 2HD Signal Injection","authors":"Dongming Zhao, Huijuan Liu, Ke-wen Xia, Shi Li, Xiaoxu Shi","doi":"10.1155/2017/4721048","DOIUrl":"https://doi.org/10.1155/2017/4721048","url":null,"abstract":"This paper presents a signal injection technology showing significant reductions in both 3rd-order and 5th-order intermodulation distortions (IMD3 and IMD5) in space traveling wave tube (STWT). By applying the IMD3 to the IMD5 ratio (TFR) as measures of location, the simultaneous suppressions of IMD3 and IMD5 in TWT are achieved by second harmonic distortion (2HD) and IMD3 injection. According to the research on theoretical analysis and computer simulation, the optimum amplitude and phase parameters of the injected signal for maximum simultaneous suppressions are obtained. Then an experiment system is established based on vector network analyzer, optimum TFR are 2.1 dB and 12.5 dB, respectively, by second harmonic and IM3 injection, and the output powers of IMD3 and IMD5 were decreased. TFR with IMD3 injection is smaller than that with second harmonic injection in STWT, and the experiment system is more straightforward and easy to operate. Thus, the IMD3 injection performs better than that of second harmonic injection to suppress IMD5s for the narrow-band STWT.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/4721048","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43619726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The paper studies a simultaneous switching noise (SSN) in a power distribution network (PDN) with dual supply voltages and two cores. This is achieved by reducing the admittance matrix of the PDN then calculating frequency domain impedance with rational function approximation using vector fitting. This paper presents a method of computing the simultaneous switching noise through a switching current, whose properties and details are described. Thus, the results are discussed and performed using MATLAB and PSpice tools. It demonstrated that the presence of many cores in the same PCB influences the SSN due to electromagnetic coupling.
{"title":"Investigation and Analysis of the Simultaneous Switching Noise in Power Distribution Network with Multi-Power Supplies of High Speed CMOS Circuits","authors":"Khaoula Ait Belaid, H. Belahrach, H. Ayad","doi":"10.1155/2017/9703029","DOIUrl":"https://doi.org/10.1155/2017/9703029","url":null,"abstract":"The paper studies a simultaneous switching noise (SSN) in a power distribution network (PDN) with dual supply voltages and two cores. This is achieved by reducing the admittance matrix of the PDN then calculating frequency domain impedance with rational function approximation using vector fitting. This paper presents a method of computing the simultaneous switching noise through a switching current, whose properties and details are described. Thus, the results are discussed and performed using MATLAB and PSpice tools. It demonstrated that the presence of many cores in the same PCB influences the SSN due to electromagnetic coupling.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/9703029","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64725814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a systematic approach for implementing operational simulation of LC ladder filter using voltage differencing transconductance amplifier is presented. The proposed filter structure uses only grounded capacitor and possesses electronic tunability. PSPICE simulation using 180 nm CMOS technology parameter is carried out to verify the functionality of the presented approach. Experimental verification is also performed through commercially available IC LM13700/NS. Simulations and experimental results are found to be in close agreement with theoretical predictions.
{"title":"Operational Simulation of LC Ladder Filter Using VDTA","authors":"Praveen Kumar, N. Pandey, S. K. Paul","doi":"10.1155/2017/1836727","DOIUrl":"https://doi.org/10.1155/2017/1836727","url":null,"abstract":"In this paper, a systematic approach for implementing operational simulation of LC ladder filter using voltage differencing transconductance amplifier is presented. The proposed filter structure uses only grounded capacitor and possesses electronic tunability. PSPICE simulation using 180 nm CMOS technology parameter is carried out to verify the functionality of the presented approach. Experimental verification is also performed through commercially available IC LM13700/NS. Simulations and experimental results are found to be in close agreement with theoretical predictions.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/1836727","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64655862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents a new compact controllable impedance multiplier using CMOS technology. The design is based on the use of the translinear principle using MOSFETs in subthreshold region. The value of the impedance will be controlled using the bias currents only. The impedance can be scaled up and down as required. The functionality of the proposed design was confirmed by simulation using BSIM3V3 MOS model in Tanner Tspice 0.18 μm TSMC CMOS process technology. Simulation results indicate that the proposed design is functioning properly with a tunable multiplication factor from 0.1- to 100-fold. Applications of the proposed multiplier in the design of low pass and high pass filters are also included.
{"title":"A New CMOS Controllable Impedance Multiplier with Large Multiplication Factor","authors":"M. Al-Absi","doi":"10.1155/2017/4274791","DOIUrl":"https://doi.org/10.1155/2017/4274791","url":null,"abstract":"This paper presents a new compact controllable impedance multiplier using CMOS technology. The design is based on the use of the translinear principle using MOSFETs in subthreshold region. The value of the impedance will be controlled using the bias currents only. The impedance can be scaled up and down as required. The functionality of the proposed design was confirmed by simulation using BSIM3V3 MOS model in Tanner Tspice 0.18 μm TSMC CMOS process technology. Simulation results indicate that the proposed design is functioning properly with a tunable multiplication factor from 0.1- to 100-fold. Applications of the proposed multiplier in the design of low pass and high pass filters are also included.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/4274791","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64676740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A linear voltage controlled quadrature oscillator implemented from a first-order electronically tunable all-pass filter (ETAF) is presented. The active element is commercially available current feedback amplifier (AD844) in conjunction with the relatively new Multiplication Mode Current Conveyor (MMCC) device. Electronic tunability is obtained by the control node voltage () of the MMCC. Effects of the device nonidealities, namely, the parasitic capacitors and the roll-off poles of the port-transfer ratios of the device, are shown to be negligible, even though the usable high-frequency ranges are constrained by these imperfections. Subsequently the filter is looped with an electronically tunable integrator (ETI) to implement the quadrature oscillator (QO). Experimental responses on the voltage tunable phase of the filter and the linear-tuning law of the quadrature oscillator up to 9.9 MHz at low THD are verified by simulation and hardware tests.
{"title":"All-Pass Filter Based Linear Voltage Controlled Quadrature Oscillator","authors":"K. Mathur, P. Venkateswaran, R. Nandi","doi":"10.1155/2017/3454165","DOIUrl":"https://doi.org/10.1155/2017/3454165","url":null,"abstract":"A linear voltage controlled quadrature oscillator implemented from a first-order electronically tunable all-pass filter (ETAF) is presented. The active element is commercially available current feedback amplifier (AD844) in conjunction with the relatively new Multiplication Mode Current Conveyor (MMCC) device. Electronic tunability is obtained by the control node voltage () of the MMCC. Effects of the device nonidealities, namely, the parasitic capacitors and the roll-off poles of the port-transfer ratios of the device, are shown to be negligible, even though the usable high-frequency ranges are constrained by these imperfections. Subsequently the filter is looped with an electronically tunable integrator (ETI) to implement the quadrature oscillator (QO). Experimental responses on the voltage tunable phase of the filter and the linear-tuning law of the quadrature oscillator up to 9.9 MHz at low THD are verified by simulation and hardware tests.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/3454165","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64668678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a new capacitor-less DC-DC converter is proposed to be used as a light emitting diode (LED) driver. The design is based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such configuration can be utilized to enlarge the total internal capacitance and hence minimize the output ripple. Also, the switching frequency is selected such that a minimum ripple appears at the output. The functionality of the proposed design is confirmed experimentally and the efficiency of the driver is 85% at full load.
{"title":"A New Capacitor-Less Buck DC-DC Converter for LED Applications","authors":"M. Al-Absi, Zainulabideen J. Khalifa, A. Hussein","doi":"10.1155/2017/2365848","DOIUrl":"https://doi.org/10.1155/2017/2365848","url":null,"abstract":"In this paper, a new capacitor-less DC-DC converter is proposed to be used as a light emitting diode (LED) driver. The design is based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such configuration can be utilized to enlarge the total internal capacitance and hence minimize the output ripple. Also, the switching frequency is selected such that a minimum ripple appears at the output. The functionality of the proposed design is confirmed experimentally and the efficiency of the driver is 85% at full load.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/2365848","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64658770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents a second-order voltage-mode filter with three inputs and single-output voltage using single commercially available IC, one resistor, and two capacitors. The used commercially available IC, called LT1228, is manufactured by Linear Technology Corporation. The proposed filter is based on parallel RLC circuit. The filter provides five output filter responses, namely, band-pass (BP), band-reject (BR), low-pass (LP), high-pass (HP), and all-pass (AP) functions. The selection of each filter response can be done without the requirement of active and passive component matching condition. Furthermore, the natural frequency and quality factor are electronically controlled. Besides, the nonideal case is also investigated. The output voltage node exhibits low impedance. The experimental results can validate the theoretical analyses.
{"title":"Three-Input Single-Output Voltage-Mode Multifunction Filter with Electronic Controllability Based on Single Commercially Available IC","authors":"S. Klungtong, D. Thanapatay, W. Jaikla","doi":"10.1155/2017/5240751","DOIUrl":"https://doi.org/10.1155/2017/5240751","url":null,"abstract":"This paper presents a second-order voltage-mode filter with three inputs and single-output voltage using single commercially available IC, one resistor, and two capacitors. The used commercially available IC, called LT1228, is manufactured by Linear Technology Corporation. The proposed filter is based on parallel RLC circuit. The filter provides five output filter responses, namely, band-pass (BP), band-reject (BR), low-pass (LP), high-pass (HP), and all-pass (AP) functions. The selection of each filter response can be done without the requirement of active and passive component matching condition. Furthermore, the natural frequency and quality factor are electronically controlled. Besides, the nonideal case is also investigated. The output voltage node exhibits low impedance. The experimental results can validate the theoretical analyses.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2017-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2017/5240751","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64685228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Numerical simulation results for the dynamics of -systems abound in the literature but their experimental results are yet to be known. This paper presents the chaotic dynamics of -Van der Pol oscillator via electronic design, simulation, and hardware implementation. The results obtained are found to be in good agreement with numerical simulation results. The condition for stability of the fixed points is also computed and the method of multiple time scale is used to investigate the dynamical behaviour of the system. Therefore, the -circuits which have rich dynamics and may have important applications in secure communications, random number generations, cryptography, and so forth have been practically implemented.
{"title":"Computer and Hardware Modeling of Periodically Forced -Van der Pol Oscillator","authors":"A. O. Adelakun, A. Njah, O. Olusola, S. Wara","doi":"10.1155/2016/3426713","DOIUrl":"https://doi.org/10.1155/2016/3426713","url":null,"abstract":"Numerical simulation results for the dynamics of -systems abound in the literature but their experimental results are yet to be known. This paper presents the chaotic dynamics of -Van der Pol oscillator via electronic design, simulation, and hardware implementation. The results obtained are found to be in good agreement with numerical simulation results. The condition for stability of the fixed points is also computed and the method of multiple time scale is used to investigate the dynamical behaviour of the system. Therefore, the -circuits which have rich dynamics and may have important applications in secure communications, random number generations, cryptography, and so forth have been practically implemented.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2016-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2016/3426713","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64329564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Noise parameters of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) for different sizes are investigated in the breakdown region for the first time. When the emitter length of SiGe HBTs shortens, minimum noise figure at breakdown decreases. In addition, narrower emitter width also decreases noise figure of SiGe HBTs in the avalanche region. Reduction of noise performance for smaller emitter length and width of SiGe HBTs at breakdown resulted from the lower noise spectral density resulting from the breakdown mechanism. Good agreement between experimental and simulated noise performance at breakdown is achieved for different sized SiGe HBTs. The presented analysis can benefit the RF circuits operating in the breakdown region.
{"title":"Noise Parameter Analysis of SiGe HBTs for Different Sizes in the Breakdown Region","authors":"Chie-In Lee, Yan-Ting Lin, Wei-Cheng Lin","doi":"10.1155/2016/8506507","DOIUrl":"https://doi.org/10.1155/2016/8506507","url":null,"abstract":"Noise parameters of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) for different sizes are investigated in the breakdown region for the first time. When the emitter length of SiGe HBTs shortens, minimum noise figure at breakdown decreases. In addition, narrower emitter width also decreases noise figure of SiGe HBTs in the avalanche region. Reduction of noise performance for smaller emitter length and width of SiGe HBTs at breakdown resulted from the lower noise spectral density resulting from the breakdown mechanism. Good agreement between experimental and simulated noise performance at breakdown is achieved for different sized SiGe HBTs. The presented analysis can benefit the RF circuits operating in the breakdown region.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2016-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2016/8506507","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64580807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM) technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM) and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests.
{"title":"Design of High-Voltage Switch-Mode Power Amplifier Based on Digital-Controlled Hybrid Multilevel Converter","authors":"Y. Hou, Wanrong Sun, Aifeng Ren, Shuming Liu","doi":"10.1155/2016/3982594","DOIUrl":"https://doi.org/10.1155/2016/3982594","url":null,"abstract":"Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM) technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM) and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2016-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2016/3982594","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64360761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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