This paper presents a new circuit proposal for multiphase sine-wave generation, employing two active elements and four grounded passive elements. The proposed oscillator provides four 45° phase-shifted voltage outputs. Incorporation of additional inverters for generation of eight-phase outputs is further shown. Simultaneous current outputs can also be generated with additional output stages. The compact circuit structure is studied for nonideal and parasitic effects and simulation results are given, which are in good agreement with the theory. The utility of the proposal for π/4-QPSK generation is explored as an interesting application example with supporting results.
{"title":"Sinusoidal Generator with π/4-Shifted Four/Eight Voltage Outputs Employing Four Grounded Components and Two/Six Active Elements","authors":"S. Maheshwari","doi":"10.1155/2014/480590","DOIUrl":"https://doi.org/10.1155/2014/480590","url":null,"abstract":"This paper presents a new circuit proposal for multiphase sine-wave generation, employing two active elements and four grounded passive elements. The proposed oscillator provides four 45° phase-shifted voltage outputs. Incorporation of additional inverters for generation of eight-phase outputs is further shown. Simultaneous current outputs can also be generated with additional output stages. The compact circuit structure is studied for nonideal and parasitic effects and simulation results are given, which are in good agreement with the theory. The utility of the proposal for π/4-QPSK generation is explored as an interesting application example with supporting results.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-7"},"PeriodicalIF":0.4,"publicationDate":"2014-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/480590","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64512911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC) is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL) to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL) value of −0.30 LSB and differential nonlinearity (DNL) value of −0.24 LSB, of the flash ADC.
{"title":"Implementation of Power Efficient Flash Analogue-to-Digital Converter","authors":"T. Lakshmi, Avireni Srinivasulu, P. C. Shaker","doi":"10.1155/2014/723053","DOIUrl":"https://doi.org/10.1155/2014/723053","url":null,"abstract":"An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC) is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL) to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL) value of −0.30 LSB and differential nonlinearity (DNL) value of −0.24 LSB, of the flash ADC.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-11"},"PeriodicalIF":0.4,"publicationDate":"2014-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/723053","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64637942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The respective transfer characteristics of the ultrathin body (UTB) and gate recessed channel (GRC) device, sharing same W/L ratio but having a channel thickness of 46 nm, and 2.2 nm respectively, were measured at 300 K and at 77 K. By decreasing the temperature we found that the electrical behaviors of these devices were radically opposite: if for UTB device, the conductivity was increased, the opposite effect was observed for GRC. The low field electron mobility and series resistance values were extracted using a method based on Y-function for both the temperatures. If low values were found for UTB, very high values (g1) were extracted for GRC. Surprisingly, for the last device, the effective field mobility is found very low (l1) and is decreasing by lowering the temperature. After having discussed the limits of this analysis.This case study illustrates the advantage of the Y-analysis in discriminating a parameter of great relevance for nanoscale devices and gives a coherent interpretation of an anomalous electrical behavior.
{"title":"Y-Function Analysis of the Low Temperature Behavior of Ultrathin Film FD SOI MOSFETs","authors":"A. Karsenty, A. Chelly","doi":"10.1155/2014/697369","DOIUrl":"https://doi.org/10.1155/2014/697369","url":null,"abstract":"The respective transfer characteristics of the ultrathin body (UTB) and gate recessed channel (GRC) device, sharing same W/L ratio but having a channel thickness of 46 nm, and 2.2 nm respectively, were measured at 300 K and at 77 K. By decreasing the temperature we found that the electrical behaviors of these devices were radically opposite: if for UTB device, the conductivity was increased, the opposite effect was observed for GRC. The low field electron mobility and series resistance values were extracted using a method based on Y-function for both the temperatures. If low values were found for UTB, very high values (g1) were extracted for GRC. Surprisingly, for the last device, the effective field mobility is found very low (l1) and is decreasing by lowering the temperature. After having discussed the limits of this analysis.This case study illustrates the advantage of the Y-analysis in discriminating a parameter of great relevance for nanoscale devices and gives a coherent interpretation of an anomalous electrical behavior.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-10"},"PeriodicalIF":0.4,"publicationDate":"2014-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/697369","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64622589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Capacitive leakage current is one of the most important issues for transformerless photovoltaic systems. In order to deal with the capacitive leakage current, a new power electronic inverter circuit is proposed in this paper. The inverter circuit consists of six switches and operates with constant common mode voltage. Theoretical analysis is conducted to clarify the circuit operation principle and the common mode characteristic. The performance evaluation test is carried out, and test results demonstrate that the capacitive leakage current can be significantly minimized with the proposed power electronic inverter circuit.
{"title":"A Novel Power Electronic Inverter Circuit for Transformerless Photovoltaic Systems","authors":"Cao Hai-yan","doi":"10.1155/2014/329043","DOIUrl":"https://doi.org/10.1155/2014/329043","url":null,"abstract":"Capacitive leakage current is one of the most important issues for transformerless photovoltaic systems. In order to deal with the capacitive leakage current, a new power electronic inverter circuit is proposed in this paper. The inverter circuit consists of six switches and operates with constant common mode voltage. Theoretical analysis is conducted to clarify the circuit operation principle and the common mode characteristic. The performance evaluation test is carried out, and test results demonstrate that the capacitive leakage current can be significantly minimized with the proposed power electronic inverter circuit.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"53 1","pages":"1-5"},"PeriodicalIF":0.4,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/329043","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64444148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Ranjan, Surya Prasanna Yalla, Shubham Sorya, S. K. Paul
A new approach for the design of an active comb filter is proposed to remove the selected frequencies of various signals. The proposed filter is based on only OTAs and capacitors, hence suitable for monolithic integrated circuit implementation. The workability of the circuit is tested using PSPICE for test signals of 60, 180, 300, and 420 Hz as in ECG signal. The results are given in the paper and found to agree well with theory.
{"title":"Active Comb Filter Using Operational Transconductance Amplifier","authors":"R. Ranjan, Surya Prasanna Yalla, Shubham Sorya, S. K. Paul","doi":"10.1155/2014/587932","DOIUrl":"https://doi.org/10.1155/2014/587932","url":null,"abstract":"A new approach for the design of an active comb filter is proposed to remove the selected frequencies of various signals. The proposed filter is based on only OTAs and capacitors, hence suitable for monolithic integrated circuit implementation. The workability of the circuit is tested using PSPICE for test signals of 60, 180, 300, and 420 Hz as in ECG signal. The results are given in the paper and found to agree well with theory.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-6"},"PeriodicalIF":0.4,"publicationDate":"2014-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/587932","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64562140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A broadband linear-in-dB variable-gain amplifier (VGA) circuit is implemented in 0.18 μm SiGe BiCMOS process. The VGA comprises two cascaded variable-gain core, in which a hybrid current-steering current gain cell is inserted in the Cherry-Hooper amplifier to maintain a broad bandwidth while covering a wide gain range. Postlayout simulation results confirm that the proposed circuit achieves a 2 GHz 3-dB bandwidth with wide linear-in-dB gain tuning range from −19 dB up to 61 dB. The amplifier offers a competitive gain bandwidth product of 2805 GHz at the maximum gain for a 110-GHz ft BiCMOS technology. The amplifier core consumes 31 mW from a 3.3 V supply and occupies active area of 280 μm by 140 μm.
{"title":"Design of a 2 GHz Linear-in-dB Variable-Gain Amplifier with 80-dB Gain Range","authors":"Zhengyu Sun, Yuepeng Yan","doi":"10.1155/2014/434189","DOIUrl":"https://doi.org/10.1155/2014/434189","url":null,"abstract":"A broadband linear-in-dB variable-gain amplifier (VGA) circuit is implemented in 0.18 μm SiGe BiCMOS process. The VGA comprises two cascaded variable-gain core, in which a hybrid current-steering current gain cell is inserted in the Cherry-Hooper amplifier to maintain a broad bandwidth while covering a wide gain range. Postlayout simulation results confirm that the proposed circuit achieves a 2 GHz 3-dB bandwidth with wide linear-in-dB gain tuning range from −19 dB up to 61 dB. The amplifier offers a competitive gain bandwidth product of 2805 GHz at the maximum gain for a 110-GHz ft BiCMOS technology. The amplifier core consumes 31 mW from a 3.3 V supply and occupies active area of 280 μm by 140 μm.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-7"},"PeriodicalIF":0.4,"publicationDate":"2014-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/434189","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64493893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A miniaturized bandpass filter (BPF) using defected ground structure (DGS) resonator with the characteristic of harmonic rejection is developed in this paper. The second and third harmonics of the proposed BPF are rejected by the characteristic of stepped-impedance DGS resonator. Moreover, open stubs are established so that two adjustable transmission zeros can independently be created to extend the stopband and improve the rejection level. Finally, a second-order BPF, centered at 1.62 GHz with a stopband extended up to 5.6 GHz and a rejection level better than 20 dB, is designed and implemented for GPS application. A good agreement between simulation and measurement verifies the validity of this design methodology.
{"title":"Harmonic-Rejection Compact Bandpass Filter Using Defected Ground Structure for GPS Application","authors":"Haiwen Liu, Baoping Ren, Xiang Xiao, Zhi‐Chong Zhang, Shen Li, Suping Peng","doi":"10.1155/2014/436964","DOIUrl":"https://doi.org/10.1155/2014/436964","url":null,"abstract":"A miniaturized bandpass filter (BPF) using defected ground structure (DGS) resonator with the characteristic of harmonic rejection is developed in this paper. The second and third harmonics of the proposed BPF are rejected by the characteristic of stepped-impedance DGS resonator. Moreover, open stubs are established so that two adjustable transmission zeros can independently be created to extend the stopband and improve the rejection level. Finally, a second-order BPF, centered at 1.62 GHz with a stopband extended up to 5.6 GHz and a rejection level better than 20 dB, is designed and implemented for GPS application. A good agreement between simulation and measurement verifies the validity of this design methodology.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-4"},"PeriodicalIF":0.4,"publicationDate":"2014-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/436964","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64494660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This study proposes three new sinusoidal oscillators based on an operational transresistance amplifier (OTRA). Each of the proposed oscillator circuits consists of one OTRA combined with a few passive components. The first circuit is an OTRA-based minimum RC oscillator. The second circuit is capable of providing independent control on the condition of oscillation without affecting the oscillation frequency. The third circuit exhibits independent control of oscillation frequency through a capacitor. This study first introduces the OTRA and the related formulations of the proposed oscillator circuits, and then discusses the nonideal effects, sensitivity analyses, and frequency stability of the presented circuits. The proposed oscillators exhibit low sensitivities and good frequency stability. Because the presented circuits feature low impedance output, they can be connected directly to the next stage without cascading additional voltage buffers. HSPICE simulations and experimental results confirm the feasibility of the new oscillator circuits.
{"title":"New Realizations of Single OTRA-Based Sinusoidal Oscillators","authors":"Hung-Chun Chien","doi":"10.1155/2014/938987","DOIUrl":"https://doi.org/10.1155/2014/938987","url":null,"abstract":"This study proposes three new sinusoidal oscillators based on an operational transresistance amplifier (OTRA). Each of the proposed oscillator circuits consists of one OTRA combined with a few passive components. The first circuit is an OTRA-based minimum RC oscillator. The second circuit is capable of providing independent control on the condition of oscillation without affecting the oscillation frequency. The third circuit exhibits independent control of oscillation frequency through a capacitor. This study first introduces the OTRA and the related formulations of the proposed oscillator circuits, and then discusses the nonideal effects, sensitivity analyses, and frequency stability of the presented circuits. The proposed oscillators exhibit low sensitivities and good frequency stability. Because the presented circuits feature low impedance output, they can be connected directly to the next stage without cascading additional voltage buffers. HSPICE simulations and experimental results confirm the feasibility of the new oscillator circuits.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-12"},"PeriodicalIF":0.4,"publicationDate":"2014-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/938987","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64753131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Majumder, Archana Kumari, B. Kaushik, S. Manhas
Development of a reliable 3D integrated system is largely dependent on the choice of filler materials used in through-silicon vias (TSVs). This research paper presents carbon nanotube (CNT) bundles as prospective filler materials for TSVs and provides an analysis of signal integrity for different single- (SWCNT), double- (DWCNT), and multi-walled CNT (MWCNT) bundle based TSVs. Depending on the physical configuration of a pair of TSVs, an equivalent electrical model is employed to analyze the in-phase and out-phase delays. It is observed that, using an MWCNT bundle (with number of shells = 10), the overall in-phase delays are reduced by 96.86%, 92.33%, 78.35%, and 32.72% compared to the bundled SWCNT, DWCNT, 4-shell MWCNT, and 8-shell MWCNT, respectively; similarly, the overall reduction in out-phase delay is 85.89%, 73.38%, 45.92%, and 12.56%, respectively.
{"title":"Signal Integrity Analysis in Carbon Nanotube Based Through-Silicon Via","authors":"M. Majumder, Archana Kumari, B. Kaushik, S. Manhas","doi":"10.1155/2014/524107","DOIUrl":"https://doi.org/10.1155/2014/524107","url":null,"abstract":"Development of a reliable 3D integrated system is largely dependent on the choice of filler materials used in through-silicon vias (TSVs). This research paper presents carbon nanotube (CNT) bundles as prospective filler materials for TSVs and provides an analysis of signal integrity for different single- (SWCNT), double- (DWCNT), and multi-walled CNT (MWCNT) bundle based TSVs. Depending on the physical configuration of a pair of TSVs, an equivalent electrical model is employed to analyze the in-phase and out-phase delays. It is observed that, using an MWCNT bundle (with number of shells = 10), the overall in-phase delays are reduced by 96.86%, 92.33%, 78.35%, and 32.72% compared to the bundled SWCNT, DWCNT, 4-shell MWCNT, and 8-shell MWCNT, respectively; similarly, the overall reduction in out-phase delay is 85.89%, 73.38%, 45.92%, and 12.56%, respectively.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"2014 1","pages":"1-7"},"PeriodicalIF":0.4,"publicationDate":"2014-03-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/524107","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64534530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Due to the huge demand of high-speed analog integrated circuits, it is essential to develop a wideband low input impedance current mirror that can be operated at low power supply. In this paper, a novel wideband low voltage high compliance current mirror using low voltage cascode current mirror (LVCCM) as a basic building block is proposed. The resistive compensation and inductive peaking methods have been used to extend the bandwidth of the conventional current mirror. By replacing conventional LVCCM in a high compliance current mirror with the compensated LVCCM, the bandwidth extension ratio of 3.4 has been achieved with no additional DC power dissipation and without affecting its other performances. The circuits are designed in TSMC 0.18 μm CMOS technology on Spectre simulator of Cadence.
{"title":"Bandwidth Extension of High Compliance Current Mirror by Using Compensation Methods","authors":"Maneesha Gupta, Urvashi Singh, Richa Srivastava","doi":"10.1155/2014/274795","DOIUrl":"https://doi.org/10.1155/2014/274795","url":null,"abstract":"Due to the huge demand of high-speed analog integrated circuits, it is essential to develop a wideband low input impedance current mirror that can be operated at low power supply. In this paper, a novel wideband low voltage high compliance current mirror using low voltage cascode current mirror (LVCCM) as a basic building block is proposed. The resistive compensation and inductive peaking methods have been used to extend the bandwidth of the conventional current mirror. By replacing conventional LVCCM in a high compliance current mirror with the compensated LVCCM, the bandwidth extension ratio of 3.4 has been achieved with no additional DC power dissipation and without affecting its other performances. The circuits are designed in TSMC 0.18 μm CMOS technology on Spectre simulator of Cadence.","PeriodicalId":43355,"journal":{"name":"Active and Passive Electronic Components","volume":"53 1","pages":"1-8"},"PeriodicalIF":0.4,"publicationDate":"2014-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1155/2014/274795","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"64418484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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