Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896931
D. Kendig, K. Yazawa, A. Shakouri
This paper presents a novel method for obtaining optimized, accurate, and fully calibrated images of the thermal behavior of complex semiconductor devices with submicron features. To thermally analyze the growing number of high power devices, such as microwave amplifiers for wireless mobile applications, a technique is required for high speed transient and high spatial resolution thermal characterization. Thermoreflectance imaging has been shown to have an advantage in measuring the time-dependent thermal response. A challenge, however, has been a noisy spatial response due to an optical artifact and/or the complex reflection of the layers of thin-films and geometries which comprise the transistor features. To intuitively understand the thermal profile, which is a great advantage of imaging, this nonphysical response can sometimes result in confusion. Wavelength dependent reflectance is a property of the material and the material's surface characteristics. A multiple wavelength or a full spectrum (hyperspectral) illumination, rather than a single wavelength, can be employed to achieve much greater accuracy and a clearer thermal image for all regions on a complex integrated circuit. A single heating wire deposited on a substrate is used to experimentally demonstrate how this technique works. The results show a very good hyperspectral thermoreflectance fitting for all materials on the test structure.
{"title":"Hyperspectral thermoreflectance imaging for power devices","authors":"D. Kendig, K. Yazawa, A. Shakouri","doi":"10.1109/SEMI-THERM.2017.7896931","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896931","url":null,"abstract":"This paper presents a novel method for obtaining optimized, accurate, and fully calibrated images of the thermal behavior of complex semiconductor devices with submicron features. To thermally analyze the growing number of high power devices, such as microwave amplifiers for wireless mobile applications, a technique is required for high speed transient and high spatial resolution thermal characterization. Thermoreflectance imaging has been shown to have an advantage in measuring the time-dependent thermal response. A challenge, however, has been a noisy spatial response due to an optical artifact and/or the complex reflection of the layers of thin-films and geometries which comprise the transistor features. To intuitively understand the thermal profile, which is a great advantage of imaging, this nonphysical response can sometimes result in confusion. Wavelength dependent reflectance is a property of the material and the material's surface characteristics. A multiple wavelength or a full spectrum (hyperspectral) illumination, rather than a single wavelength, can be employed to achieve much greater accuracy and a clearer thermal image for all regions on a complex integrated circuit. A single heating wire deposited on a substrate is used to experimentally demonstrate how this technique works. The results show a very good hyperspectral thermoreflectance fitting for all materials on the test structure.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114412639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896921
Kevin P. Drummond, J. Weibel, S. Garimella
This work focuses on the fabrication and experimental characterization of a two-phase hierarchical manifold microchannel heat sink array for intrachip high-heat-flux dissipation. A test device with a 5 mm × 5 mm heated area and 9 × 9 array of heat sinks, each with 18 parallel channels (19 µm × 155 µm), is fabricated in silicon. A multi-layer hierarchical manifold fabricated in silicon is bonded to the heat sink array. Flow boiling experiments are conducted using HFE-7100 as the working fluid at mass fluxes of 200 kg/m2s and 300 kg/m2s. The test device is able to dissipate heat fluxes up to 445 W/cm2 at a chip temperature of less than 40 °C above the fluid and at a pressure drop less than 80 kPa. A maximum heat transfer coefficient of 31,900 W/m2K occurred at a mass flux of 300 kg/m2s and a heat flux of 301 W/cm2. The effects of heat flux on chip temperature, heat transfer coefficient, and pressure drop are investigated.
{"title":"Experimental study of flow boiling in a compact hierarchical manifold microchannel heat sink array","authors":"Kevin P. Drummond, J. Weibel, S. Garimella","doi":"10.1109/SEMI-THERM.2017.7896921","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896921","url":null,"abstract":"This work focuses on the fabrication and experimental characterization of a two-phase hierarchical manifold microchannel heat sink array for intrachip high-heat-flux dissipation. A test device with a 5 mm × 5 mm heated area and 9 × 9 array of heat sinks, each with 18 parallel channels (19 µm × 155 µm), is fabricated in silicon. A multi-layer hierarchical manifold fabricated in silicon is bonded to the heat sink array. Flow boiling experiments are conducted using HFE-7100 as the working fluid at mass fluxes of 200 kg/m<sup>2</sup>s and 300 kg/m<sup>2</sup>s. The test device is able to dissipate heat fluxes up to 445 W/cm<sup>2</sup> at a chip temperature of less than 40 °C above the fluid and at a pressure drop less than 80 kPa. A maximum heat transfer coefficient of 31,900 W/m<sup>2</sup>K occurred at a mass flux of 300 kg/m<sup>2</sup>s and a heat flux of 301 W/cm<sup>2</sup>. The effects of heat flux on chip temperature, heat transfer coefficient, and pressure drop are investigated.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124110301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896945
A. Kempitiya, Wibawa Chou
Power dissipated within a semiconductor package must be properly extracted in order to guarantee safe and reliable operation in an automotive high power application. This work analyzes the transient thermal characteristics of two surface mount MOSFET packages types, TOLL and PQFN 5×6 for various heat sinking configurations. A novel methodology is then demonstrated for comparing the relative thermal response of these two packages under the application of transient power. Measurement results are provided to validate simulation results and concluded with electro-thermal simulations that predict the device's thermal response for a typical automotive motor drive application. The process highlighted here allows engineers to understand the thermal design tradeoffs associated with such devices with various thermal environments and facilitate comparison and prediction of their thermal response in performance critical applications.
{"title":"Electro-thermal analysis for automotive high power MOSFETs","authors":"A. Kempitiya, Wibawa Chou","doi":"10.1109/SEMI-THERM.2017.7896945","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896945","url":null,"abstract":"Power dissipated within a semiconductor package must be properly extracted in order to guarantee safe and reliable operation in an automotive high power application. This work analyzes the transient thermal characteristics of two surface mount MOSFET packages types, TOLL and PQFN 5×6 for various heat sinking configurations. A novel methodology is then demonstrated for comparing the relative thermal response of these two packages under the application of transient power. Measurement results are provided to validate simulation results and concluded with electro-thermal simulations that predict the device's thermal response for a typical automotive motor drive application. The process highlighted here allows engineers to understand the thermal design tradeoffs associated with such devices with various thermal environments and facilitate comparison and prediction of their thermal response in performance critical applications.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121643904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896925
Sadegh Khalili, H. Alissa, Mohammad I. Tradat, K. Nemati, B. Sammakia, M. Seymour
In most air cooled data centers the required air for cooling of IT equipment is supplied from a raised floor to server racks through perforated tiles; therefore, an understanding of tile impact on flow features is an essential step for designing an efficient air delivery scheme. In recent years, different approaches have been implemented to increase the efficiency of air delivery through tiles such as the use of directional tiles or adding understructure scoops. In such tiles, the approaching angle of the cross flow to the tile, the angle of approach, becomes very important, since it may result in different velocity stratification patterns. Although many studies have focused on the use of computational fluid dynamics (CFD) for predicting tile airflow delivery to the racks, very few controlled experimental results are available. An important factor that has been often ignored in perforated tile modeling is the direction of the flow approaching the tile. In this study, an experimental setup has been designed and built to examine the effects of the direction of the approaching airflow to the tile on the airflow rate and resulting jet of coolant for different types of perforated tiles. In the designed setup, rotating the tile on a horizontal surface changes the angle of approaching airflow. The effect of angle of approach (AoA) on the direction of the jet is visualized by creating a laser sheet and performing airflow smoke visualization tests for four different types of tiles. Visualizations showed that the airflow direction changes significantly with AoA. Furthermore, the velocity distribution of air after the tiles at various AoA are measured, presented, and compared using a vane anemometer and a velocity sensor grid. Finally, the airflow rates for each case is calculated from the measured velocities by a grid of velocity sensors and a vane anemometer, which are then compared with flow rates measured by a commercial flow hood.
{"title":"Experimental methods to characterize the impact of cross flow orientation on jets of air after a perforated tile","authors":"Sadegh Khalili, H. Alissa, Mohammad I. Tradat, K. Nemati, B. Sammakia, M. Seymour","doi":"10.1109/SEMI-THERM.2017.7896925","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896925","url":null,"abstract":"In most air cooled data centers the required air for cooling of IT equipment is supplied from a raised floor to server racks through perforated tiles; therefore, an understanding of tile impact on flow features is an essential step for designing an efficient air delivery scheme. In recent years, different approaches have been implemented to increase the efficiency of air delivery through tiles such as the use of directional tiles or adding understructure scoops. In such tiles, the approaching angle of the cross flow to the tile, the angle of approach, becomes very important, since it may result in different velocity stratification patterns. Although many studies have focused on the use of computational fluid dynamics (CFD) for predicting tile airflow delivery to the racks, very few controlled experimental results are available. An important factor that has been often ignored in perforated tile modeling is the direction of the flow approaching the tile. In this study, an experimental setup has been designed and built to examine the effects of the direction of the approaching airflow to the tile on the airflow rate and resulting jet of coolant for different types of perforated tiles. In the designed setup, rotating the tile on a horizontal surface changes the angle of approaching airflow. The effect of angle of approach (AoA) on the direction of the jet is visualized by creating a laser sheet and performing airflow smoke visualization tests for four different types of tiles. Visualizations showed that the airflow direction changes significantly with AoA. Furthermore, the velocity distribution of air after the tiles at various AoA are measured, presented, and compared using a vane anemometer and a velocity sensor grid. Finally, the airflow rates for each case is calculated from the measured velocities by a grid of velocity sensors and a vane anemometer, which are then compared with flow rates measured by a commercial flow hood.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127633585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The variations of the electrical parameters of semiconductor devices with changes in temperature are important for industrial and other applications of these devices. Calibrations of both the linear relationships of device parameters with temperature in thermo-sensitive electrical parameters testing and the nonlinear properties of other device parameters with temperature are very time-consuming processes when using the traditional oven methods. In this work, we proposed a method that uses a linear temperature ramping plate. The device under test was placed on this plate and the device temperature, physical parameters and the time (t) were recorded at 0.2-s intervals. The curve of the parameter variations with temperature was recorded dynamically over a period of 350 s as the temperature ranged from 20°C to 120°C. Comparison with the traditional static oven method showed very good agreement between the results obtained using the two methods, but the time required for the proposed method was reduced dramatically.
{"title":"Rapid test method for thermal characteristics of semiconductor devices","authors":"Shiwei Feng, D. Shi, Xiang Zheng, Jingwei Li, Xin He, Yamin Zhang","doi":"10.1109/SEMI-THERM.2017.7896932","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896932","url":null,"abstract":"The variations of the electrical parameters of semiconductor devices with changes in temperature are important for industrial and other applications of these devices. Calibrations of both the linear relationships of device parameters with temperature in thermo-sensitive electrical parameters testing and the nonlinear properties of other device parameters with temperature are very time-consuming processes when using the traditional oven methods. In this work, we proposed a method that uses a linear temperature ramping plate. The device under test was placed on this plate and the device temperature, physical parameters and the time (t) were recorded at 0.2-s intervals. The curve of the parameter variations with temperature was recorded dynamically over a period of 350 s as the temperature ranged from 20°C to 120°C. Comparison with the traditional static oven method showed very good agreement between the results obtained using the two methods, but the time required for the proposed method was reduced dramatically.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123387793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896918
T. Shedd, Robert A. Morell
This work presents a practical, low-pressure pumped-two-phase cooling system that can be implemented in a high performance workstation form factor employing Novec 7000, a dielectric fluid from 3M. By taking advantage of the vapor to liquid phase change, a total of 1500 W of heat could be removed from the 10 processors (2 CPUs and 8 GPU processors) to ambient with a total temperature difference of 37 °C or less between the ambient and the processor or processor package. The high thermal performance allowed the Nvidia Tesla K80 processors to operate in “boost” mode 100% of the time, increasing their performance by 55%.
这项工作提出了一种实用的低压泵送两相冷却系统，该系统采用3M公司的介电流体Novec 7000，可以在高性能工作站中实现。通过利用气相到液相的变化，10个处理器(2个cpu和8个GPU处理器)总共可以向环境释放1500 W的热量，而环境与处理器或处理器封装之间的总温差不超过37°C。高热性能使Nvidia Tesla K80处理器在100%的时间内以“boost”模式运行，性能提高了55%。
{"title":"Cooling 11.6 TFlops (1500 watts) in an office environment","authors":"T. Shedd, Robert A. Morell","doi":"10.1109/SEMI-THERM.2017.7896918","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896918","url":null,"abstract":"This work presents a practical, low-pressure pumped-two-phase cooling system that can be implemented in a high performance workstation form factor employing Novec 7000, a dielectric fluid from 3M. By taking advantage of the vapor to liquid phase change, a total of 1500 W of heat could be removed from the 10 processors (2 CPUs and 8 GPU processors) to ambient with a total temperature difference of 37 °C or less between the ambient and the processor or processor package. The high thermal performance allowed the Nvidia Tesla K80 processors to operate in “boost” mode 100% of the time, increasing their performance by 55%.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128048222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896946
Florian Preishuber-Pfluegl, Alexander Buchner, Klaus Reiser, S. Reisinger, K. Hoell
Carbon-based latent heat storage systems represent a powerful class of thermal management materials that allow for the dissipation of heat produced during peak electronic output operation. The composite materials unite the good thermal conductivity of carbon, usually in the form of graphite, with the thermal characteristics of phase change materials (PCM). Applications are found in automotive systems, such as passive cooling of components in vehicles with internal combustion engines. It is also used in electric vehicles that require a suitable temperature management system, especially for the battery cells to prevent thermal runaway and maintain the required operation temperature of the cell packs [1]. Electronic components, such as those found in mobile devices or power electronics, can successfully be thermally regulated and protected against overheating by phase change composite materials. Other well-known applications are temperature control in buildings and the heating of water [1,2]. In many cases, the geometry of the desired temperature regulation components hamper their success in commercial applications. Here, a novel preparation method is presented that allows for the straightforward manufacturing of complex geometries followed by the infiltration with a phase change material working at the required temperature. The porosity as well as the operating temperature of the composite can be adjusted by tuning the process parameters and by a careful choice of employed raw materials.
{"title":"Novel Expand-To-Shape latent heat storage systems based on carbon composite materials","authors":"Florian Preishuber-Pfluegl, Alexander Buchner, Klaus Reiser, S. Reisinger, K. Hoell","doi":"10.1109/SEMI-THERM.2017.7896946","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896946","url":null,"abstract":"Carbon-based latent heat storage systems represent a powerful class of thermal management materials that allow for the dissipation of heat produced during peak electronic output operation. The composite materials unite the good thermal conductivity of carbon, usually in the form of graphite, with the thermal characteristics of phase change materials (PCM). Applications are found in automotive systems, such as passive cooling of components in vehicles with internal combustion engines. It is also used in electric vehicles that require a suitable temperature management system, especially for the battery cells to prevent thermal runaway and maintain the required operation temperature of the cell packs [1]. Electronic components, such as those found in mobile devices or power electronics, can successfully be thermally regulated and protected against overheating by phase change composite materials. Other well-known applications are temperature control in buildings and the heating of water [1,2]. In many cases, the geometry of the desired temperature regulation components hamper their success in commercial applications. Here, a novel preparation method is presented that allows for the straightforward manufacturing of complex geometries followed by the infiltration with a phase change material working at the required temperature. The porosity as well as the operating temperature of the composite can be adjusted by tuning the process parameters and by a careful choice of employed raw materials.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"381 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115899758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896941
Z. L. Guo, H. Su, H. Y. Xu
Thermal management plays an important role in increasing the efficiency and lifetime of Light Emitting Diode (LED). While active cooling solutions are generally effective in improving heat dissipation, in most cases, active cooling mechanisms such as rotary fans are not considered in outdoor applications due to reliability concerns [1]. In this paper, a thermal management solution for a LED street lamp that integrates one heat sink, two heat pipes and two electromagnetic fans (EMfans) is proposed. Comparing to other active cooling technology, EMfan may possibly be a reliable cooling technology for outdoor applications that has high efficiency, long lifetime and low power consumption. This paper will present the results of a series of thermal tests conducted on the cooling solution, including analyses on the pin temperature of the LEDs and thermal resistance of the heat sink. In addition, an ABAQUS simulation for estimating the fan frequency and a discussion of the reliability of the EMfan will also be presented.
{"title":"Analysis on LED street lamp cooling using electromagnetic fans","authors":"Z. L. Guo, H. Su, H. Y. Xu","doi":"10.1109/SEMI-THERM.2017.7896941","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896941","url":null,"abstract":"Thermal management plays an important role in increasing the efficiency and lifetime of Light Emitting Diode (LED). While active cooling solutions are generally effective in improving heat dissipation, in most cases, active cooling mechanisms such as rotary fans are not considered in outdoor applications due to reliability concerns [1]. In this paper, a thermal management solution for a LED street lamp that integrates one heat sink, two heat pipes and two electromagnetic fans (EMfans) is proposed. Comparing to other active cooling technology, EMfan may possibly be a reliable cooling technology for outdoor applications that has high efficiency, long lifetime and low power consumption. This paper will present the results of a series of thermal tests conducted on the cooling solution, including analyses on the pin temperature of the LEDs and thermal resistance of the heat sink. In addition, an ABAQUS simulation for estimating the fan frequency and a discussion of the reliability of the EMfan will also be presented.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128919103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896912
G. Bognár, G. Takács, L. Pohl, L. Jani, A. Timár, P. Horváth, M. Németh, A. Poppe, P. Szabó
In this paper, a novel tool and a methodology are introduced to create a thermally driven digital cell placement capability that considers the cooling capability of the integrated microscale heatsink structures. Normally, the realization of this kind of placement would require time-consuming computation fluid dynamics (CFD) simulations. With the presented solution, the CFD tool can be replaced by a thermal simulator, which incorporates analytical fluid dynamics compact models. By this approach, the determination of the precise local heat transfer coefficient(s) (thus cooling efficiency) can be realized. In addition, the temperature distribution along the microchannels can also be obtained depending on the channel geometries, the thermal properties of the fluid and the wall temperature(s). While this model is integrated into the thermal simulator, it is still needed to be connected to commercial digital IC design tools to unleash its full potential. Therefore, the interfacing tool is also developed that launches either the thermal, the electrical, or logical simulators and placement programs by using the outputs (results) of the other programs as the inputs.
{"title":"Integrating chip-level microfluidics cooling into system level design of digital circuits","authors":"G. Bognár, G. Takács, L. Pohl, L. Jani, A. Timár, P. Horváth, M. Németh, A. Poppe, P. Szabó","doi":"10.1109/SEMI-THERM.2017.7896912","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896912","url":null,"abstract":"In this paper, a novel tool and a methodology are introduced to create a thermally driven digital cell placement capability that considers the cooling capability of the integrated microscale heatsink structures. Normally, the realization of this kind of placement would require time-consuming computation fluid dynamics (CFD) simulations. With the presented solution, the CFD tool can be replaced by a thermal simulator, which incorporates analytical fluid dynamics compact models. By this approach, the determination of the precise local heat transfer coefficient(s) (thus cooling efficiency) can be realized. In addition, the temperature distribution along the microchannels can also be obtained depending on the channel geometries, the thermal properties of the fluid and the wall temperature(s). While this model is integrated into the thermal simulator, it is still needed to be connected to commercial digital IC design tools to unleash its full potential. Therefore, the interfacing tool is also developed that launches either the thermal, the electrical, or logical simulators and placement programs by using the outputs (results) of the other programs as the inputs.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130797743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/SEMI-THERM.2017.7896936
Thomas Nordstog, C. Henry, C. Nelson, J. Galloway, Phillip Fosnot, Q. Pham
In-situ junction-to-case thermal resistance (Theta JC) measurements are sensitive to a number of test condition factors. In this paper, the effect of electronic package die temperature on junction-to-case thermal measurements is reported over a nominal use condition temperature range of 40 to 105°C. Multiple parts were tested under a variety of boundary conditions to assess the impact of die temperature, total power dissipation, ambient cooling, and thermal parasitic heat loss through the test motherboard. The spatially resolved Thermal Interface Material I (TIM I) bond line thickness (BLT) was also quantified over a typical reflow temperature profile. These results combined with analytical and numerical modeling demonstrate that temperature induced package warpage can dramatically impact measured Theta JC values (up to 20%) due primarily to the impact on the spatially resolved TIM I bond line thickness. Such considerations should be considered by practitioners reporting Theta JC measurements. The results confirm the value of in-situ testing where package warpage is process and form factor dependent and cannot be predicted with bulk material testing data alone.
{"title":"Junction to case thermal resistance variability due to temperature induced package warpage","authors":"Thomas Nordstog, C. Henry, C. Nelson, J. Galloway, Phillip Fosnot, Q. Pham","doi":"10.1109/SEMI-THERM.2017.7896936","DOIUrl":"https://doi.org/10.1109/SEMI-THERM.2017.7896936","url":null,"abstract":"In-situ junction-to-case thermal resistance (Theta JC) measurements are sensitive to a number of test condition factors. In this paper, the effect of electronic package die temperature on junction-to-case thermal measurements is reported over a nominal use condition temperature range of 40 to 105°C. Multiple parts were tested under a variety of boundary conditions to assess the impact of die temperature, total power dissipation, ambient cooling, and thermal parasitic heat loss through the test motherboard. The spatially resolved Thermal Interface Material I (TIM I) bond line thickness (BLT) was also quantified over a typical reflow temperature profile. These results combined with analytical and numerical modeling demonstrate that temperature induced package warpage can dramatically impact measured Theta JC values (up to 20%) due primarily to the impact on the spatially resolved TIM I bond line thickness. Such considerations should be considered by practitioners reporting Theta JC measurements. The results confirm the value of in-situ testing where package warpage is process and form factor dependent and cannot be predicted with bulk material testing data alone.","PeriodicalId":442782,"journal":{"name":"2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM)","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116898955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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