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Effect of Gamma Radiation on Static DC, Reliability, and RF Performance of Submicron GaN-on-Si RF MIS-HEMTs With In Situ SiN γ辐射对亚微米GaN-on-Si射频miss - hemt的静态直流、可靠性和射频性能的影响
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-23 DOI: 10.1109/TDMR.2025.3573183
Anant Johari;Chin-Ya Su;Der-Sheng Chao;Ankur Gupta;Rajendra Singh;Tian-Li Wu
This work demonstrates the synergistic effects of 100 kGy gamma irradiation on the electrical and reliability performance of submicron GaN-on-Si RF MIS-HEMTs with in situ SiN. The results reveal a significant reduction in contact and sheet resistance attributed to annealing effects and defect restructuring, as characterized by TLM measurements. These structural changes contribute to improvements in drain current and transconductance while maintaining a stable threshold voltage, as evidenced by input and output characteristics. Furthermore, the reliability characteristics, as measured by gate-lag/drain-lag measurements, confirm a reduction in trapping sites within the gate and gate-drain access regions, leading to improved ON-resistance stability post-gamma irradiation. A decrease in off-state leakage current and improved degradation voltage further supports the reduction of native defects, as confirmed by the gate and drain step stress measurements. The study also analyzes the RF performance using S-parameters and load-pull measurements, demonstrating improvements in small and large signal RF parameters driven by increased drain current and reduced trapped carriers. Collectively, these improvements in $0.3~mu $ m gate-length GaN-on-Si RF MIS-HEMTs post-irradiation enable the design and fabrication of GaN MIS-HEMTs using the $0.25~mu $ m industry semiconductor process, making them highly suitable for radiation-prone environments and space applications.
这项工作证明了100 kGy伽马辐射对亚微米GaN-on-Si射频miss - hemt的电学和可靠性性能的协同效应。结果显示,由于退火效应和缺陷重组,接触电阻和薄片电阻显着降低,这是TLM测量的特征。这些结构变化有助于改善漏极电流和跨导,同时保持稳定的阈值电压,正如输入和输出特性所证明的那样。此外,通过栅极滞后/漏极滞后测量测量的可靠性特性证实了栅极和栅极漏极通道区域内捕获点的减少,从而改善了γ辐照后的导通电阻稳定性。通过栅极和漏极应力测量证实,失态泄漏电流的降低和退化电压的提高进一步支持了原生缺陷的减少。该研究还使用s参数和负载-拉力测量分析了射频性能,展示了在漏极电流增加和捕获载流子减少的驱动下,小信号和大信号射频参数的改善。总的来说,辐照后栅长GaN-on- si RF mis - hemt的这些改进使得使用0.25~mu $ m工业半导体工艺设计和制造GaN mis - hemt成为可能,使其非常适合辐射易发环境和空间应用。
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引用次数: 0
Monitoring Metallized Film Capacitor Health: A Method for Estimating Capacitance Amid Short-Term Failures Due to Self-Healing 监测金属化薄膜电容器的健康状况:一种在自愈短期失效时估计电容的方法
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-22 DOI: 10.1109/TDMR.2025.3572512
Yushuang He;Feipeng Wang;Hongming Yang;Archie James Johnston;Xiao Zhang;Jian Li
Metallized film capacitors (MFCs) are valued for their ability to withstand high-electric-fields, yet they face short-term failure risks when subjected to overvoltage-induced self-healing (SH). This paper presents a monitoring method designed to address the challenges posed by multiple instances of SH in pulsed power applications. Traditional capacitance estimation using sampled current during SH is hindered by the significant arc current. To address this, the study explores the dynamic interplay between sampling current, arc current, and MFC current throughout the SH process. The introduction of Kalman filtering effectively mitigates the impact of noise signals on capacitance monitoring during the short-term cumulative discharge process of SH. Experimental and simulation results attest to the efficiency of the proposed approach, demonstrating an estimation error of less than 1%. Furthermore, a thorough structural analysis of MFCs demonstrates that the proposed method can effectively identify the transition from isolated, safe SH behavior to clustered, disruptive SH events, thereby enabling timely intervention to prevent severe damage.
金属化薄膜电容器(mfc)因其承受高电场的能力而受到重视,但当受到过压诱导的自愈(SH)时,它们面临短期失效风险。本文提出了一种监测方法,旨在解决脉冲功率应用中多个SH实例所带来的挑战。传统的电容量估算方法是通过采样电流来实现的,但电弧电流的影响很大。为了解决这个问题,本研究探讨了在整个SH过程中采样电流、电弧电流和MFC电流之间的动态相互作用。卡尔曼滤波的引入有效地减轻了噪声信号对SH短期累积放电过程中电容监测的影响。实验和仿真结果证明了该方法的有效性,表明估计误差小于1%。此外,对mfc的全面结构分析表明,所提出的方法可以有效识别从孤立的、安全的SH行为到聚集的、破坏性SH事件的转变,从而能够及时干预以防止严重损害。
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引用次数: 0
Single-Event Effects Induced by Monoenergetic Fast Neutrons in Silicon Power UMOSFETs 单能快中子在硅功率umosfet中诱导的单事件效应
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-22 DOI: 10.1109/TDMR.2025.3572829
Saulo G. Alberton;Alexis C. Vilas-Bôas;Marcilei A. Guazzelli;Vitor A. P. Aguiar;Matheus S. Pereira;Nemitala Added;Claudio A. Federico;Tássio C. Cavalcante;Evaldo C. F. Pereira;Rafael G. Vaz;Odair L. Gonçalez;Jeffery Wyss;Alessandro Paccagnella;Nilberto H. Medina
The trench gate or U-groove MOSFET (UMOSFET) has become widely adopted as a semiconductor device globally, gradually replacing the traditional vertical double-diffused MOSFET (DMOSFET) in many applications. Evaluating the reliability of UMOSFETs regarding neutron-induced radiation effects is crucial for understanding their response to ubiquitous atmospheric neutrons. This study presents comparative experimental and computational results of Single-Event Effects induced by monoenergetic fast neutrons in UMOS and DMOS power transistors. Experiments demonstrate that UMOSFETs exhibit premature particle-induced avalanche multiplication effects compared to similarly rated DMOSFETs, which may favor destructive radiation effects, such as Single-Event Burnout, when operating in the terrestrial radiation environment.
沟栅或u槽MOSFET (UMOSFET)作为半导体器件已在全球范围内被广泛采用,在许多应用中逐渐取代传统的垂直双扩散MOSFET (DMOSFET)。评估umosfet在中子诱导辐射效应方面的可靠性对于理解它们对无处不在的大气中子的响应至关重要。本文对单能快中子在UMOS和DMOS功率晶体管中引起的单事件效应进行了实验和计算比较。实验表明,与同等等级的dmosfet相比,umosfet表现出过早的粒子诱导雪崩倍增效应,这可能有利于破坏性辐射效应,如单事件烧毁,当在地面辐射环境中工作时。
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引用次数: 0
Predictive Method of Charge Storage Memory Degradation on a Dedicated 4kb Test Vehicle 专用4kb试验车充电存储记忆退化预测方法
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-22 DOI: 10.1109/TDMR.2025.3572856
S. Perrin;K. Alkema;V. Della Marca;T. Kempf;O. Paulet;M. Arteaga;M. Akbal;B. Arrazat;J. Metz;J. M. Moragues;A. Regnier;M. Bocquet;J. M. Portal
This study investigates the variability in HCI (Hot Carrier Injection) degradation within a 4 kb charge storage memory array, manufactured on a dedicated wafer split process. A standard set of experiments is conducted to extract electrical features of the cells before and after stress. A statistical analysis method, based on the Principal Component Analysis (PCA) approach, is introduced to enhance the comprehension of the cell degradation prior to reliability testing. Additionally, a graphical model is developed to identify extrinsic cells in the memory array prior to stress, as well as to assess the overall technology yield. Finally, others classifier models are explored aiming to improve extrinsic cells detection before running the reliability test.
本研究研究了在专用晶圆分裂工艺制造的4kb电荷存储存储器阵列中HCI(热载流子注入)退化的可变性。通过一组标准的实验来提取细胞受压前后的电特征。提出了一种基于主成分分析(PCA)方法的统计分析方法,以提高可靠性测试前对电池退化的理解。此外,还开发了一个图形模型来识别应力之前存储阵列中的外部细胞,以及评估整体技术收率。最后,探索了其他分类器模型,旨在提高运行可靠性测试前的外部细胞检测。
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引用次数: 0
Open Model Interface Assisted NBTI-Aware Design With Dual-Vth Logic Synthesis Strategy for Reliability Improvement 基于双vth逻辑综合策略的开放接口辅助nbti感知设计提高可靠性
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-21 DOI: 10.1109/TDMR.2025.3572299
Wangyong Chen;Ling Xiong;Mingyue Zheng;Songxuan He;Linlin Cai
As CMOS technology scales down into the nanometer regime, the NBTI effect becomes a major issue for circuit reliability. This paper proposes an NBTI-aware design method with dual-Vth logic synthesis strategy for reliability improvement. NBTI awareness is innovatively incorporated into EDA toolchains based on NBTI-aware standard cell library and Open Model Interface (OMI), which considers aging difference among transistors instead of constant worst-case degradation. Furthermore, the circuit timing for post-aging delay is optimized by realizing the dual-Vth synthesis. The results show that in the original design without the optimal design strategy, the NBTI effect leads to obvious timing degradation. In contrast, when using the proposed OMI assisted design approach, timing degradation caused by NBTI can be suppressed effectively, allowing the circuit to continue operating normally even after aging.
随着CMOS技术缩小到纳米级,NBTI效应成为电路可靠性的一个主要问题。本文提出了一种基于双v值逻辑综合策略的nbti感知设计方法。基于NBTI感知标准单元库和开放模型接口(OMI),创新地将NBTI感知整合到EDA工具链中,考虑晶体管之间的老化差异,而不是持续的最坏情况退化。此外,通过实现双vth合成,优化了后老化延迟的电路时序。结果表明,在没有优化设计策略的原始设计中,NBTI效应会导致明显的时序退化。相反,当使用OMI辅助设计方法时,可以有效地抑制由NBTI引起的时序退化,使电路即使在老化后也能继续正常工作。
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引用次数: 0
Solder Dewetting and Reliability Challenges in Microbumps Due to NCF Entrapment 由于NCF夹带导致的微凸点焊料脱湿和可靠性挑战
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-19 DOI: 10.1109/TDMR.2025.3571531
Jihoon Kim;Hyoungrok Lee;Yeonseop Yu;Jungwoo Pyun
The reliability of solder joints in Cu pillar microbumps is critical for advanced packaging technologies such as 2.5D and 3D integration. As thermocompression (TC) bonding with non-conductive film (NCF) becomes widely adopted, solder dewetting caused by NCF entrapment has emerged as one of major reliability concerns. In this study, we fabricated test vehicles with controlled NCF thickness and viscosity to intentionally induce solder dewetting. These test vehicles underwent multiple reflow cycles or high-temperature storage (HTS) to examine the evolution of dewetting behavior and assess the impact of thermal budget on solder wettability. Through microstructural analysis and dewetting rate measurements, we found that intermetallic compound (IMC) growth played a key role in recurrent dewetting during successive reflows. A modeling approach was proposed to describe how the dewetting rate decreases with increasing reflow cycles due to IMC growth and the size distribution of NCF entrapment. These findings provide insight into failure mechanisms related to solder dewetting and a tool for predicting the reliability of microbump interconnects after multiple reflow cycles during advanced packaging.
铜柱微凸点焊点的可靠性对于2.5D和3D集成等先进封装技术至关重要。随着非导电膜(NCF)热压键合技术的广泛应用,由NCF夹持引起的焊料脱湿已成为可靠性问题之一。在这项研究中,我们制造了具有控制NCF厚度和粘度的测试车,以有意地诱导焊料脱湿。这些测试车经过多次回流循环或高温储存(HTS)来检查脱湿行为的演变,并评估热预算对焊料润湿性的影响。通过微观结构分析和脱湿速率测量,我们发现金属间化合物(IMC)的生长在连续回流过程中的反复脱湿中起着关键作用。提出了一种模型方法来描述由于IMC的增长和NCF夹持的尺寸分布,脱湿速率如何随着回流循环次数的增加而降低。这些发现为了解与焊料脱湿相关的失效机制提供了见解,并为预测高级封装过程中多次回流循环后微凸点互连的可靠性提供了工具。
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引用次数: 0
Call for Nominations for Editor-in-Chief IEEE Transactions on Semiconductor Manufacturing 诚聘IEEE半导体制造汇刊主编
IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-19 DOI: 10.1109/TDMR.2025.3535976
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引用次数: 0
Announcing an IEEE/Optica Publishing Group Journal of Lightwave Technology Special Issue on: OFS-29 宣布IEEE/Optica出版集团光波技术杂志特刊:OFS-29
IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-19 DOI: 10.1109/TDMR.2025.3551113
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引用次数: 0
IEEE Transactions on Device and Materials Reliability Information for Authors IEEE器件与材料可靠性信息学报
IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-19 DOI: 10.1109/TDMR.2025.3549643
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引用次数: 0
Special Issue on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS 2023) in the IEEE Transactions on Device and Materials Reliability 超大规模集成电路和纳米技术系统的缺陷和容错(DFTS 2023), IEEE器件与材料可靠性学报
IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-19 DOI: 10.1109/TDMR.2025.3544351
Luca Cassano;Mihalis Psarakis
The ten articles in this special issue present innovative research in the field of defect and fault tolerance in VLSI and nanotechnology systems and provide readers with valuable insights into the latest advances and future trends in these challenging research areas. The focus of these articles is on the reliability in the design, technology and testing of electronic devices and systems, integrated circuits, printed modules, as well as methodologies and tools used for reliability and security prediction, verification and design validation.
本特刊中的十篇文章介绍了超大规模集成电路和纳米技术系统中缺陷和故障容错领域的创新研究,为读者提供了有关这些具有挑战性的研究领域的最新进展和未来趋势的宝贵见解。这些文章的重点是电子设备和系统、集成电路、印刷模块的设计、技术和测试中的可靠性,以及用于可靠性和安全性预测、验证和设计确认的方法和工具。
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引用次数: 0
期刊
IEEE Transactions on Device and Materials Reliability
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