Pub Date : 2024-09-05DOI: 10.1109/OJIES.2024.3455239
Thales Augusto Fagundes;Guilherme Henrique Favaro Fuzato;Lucas Jonys Ribeiro Silva;Augusto Matheus dos Santos Alonso;Juan C. Vasquez;Josep M. Guerrero;Ricardo Quadros Machado
Microgrids (MGs) often integrate various energy sources to enhance system reliability, including intermittent methods, such as solar panels and wind turbines. Consequently, this integration contributes to a more resilient power distribution system. In addition, battery energy storage system (BESS) units are connected to MGs to offer grid-supporting services, such as peak shaving, load compensation, power factor quality, and operation during source failures. In this context, an energy management system (EMS) is necessary to incorporate BESS in MGs. Consequently, state-of-charge (SoC) equalization is a common approach to address EMS requirements and balance the internal load among BESS units in MG operation. In this article, we present a comprehensive review of EMS strategies for balancing SoC among BESS units, including centralized and decentralized control, multiagent systems, and other concepts, such as designing nonlinear strategies, optimal algorithms, and categorizing agents into clusters. Moreover, in this article, we discuss alternatives to improve EMS and strategies regarding the topology of power converters, including redundancy-based topology, modular multilevel converter, cascaded-based converter, and hybrid-type systems. In addition, this article explores optimization processes aimed at reducing operational costs while considering SoC equalization. Finally, second-life BESS units are explored as an emerging topic, focusing on their operation within specific power converters topologies to achieve SoC balance.
{"title":"Battery Energy Storage Systems in Microgrids: A Review of SoC Balancing and Perspectives","authors":"Thales Augusto Fagundes;Guilherme Henrique Favaro Fuzato;Lucas Jonys Ribeiro Silva;Augusto Matheus dos Santos Alonso;Juan C. Vasquez;Josep M. Guerrero;Ricardo Quadros Machado","doi":"10.1109/OJIES.2024.3455239","DOIUrl":"10.1109/OJIES.2024.3455239","url":null,"abstract":"Microgrids (MGs) often integrate various energy sources to enhance system reliability, including intermittent methods, such as solar panels and wind turbines. Consequently, this integration contributes to a more resilient power distribution system. In addition, battery energy storage system (BESS) units are connected to MGs to offer grid-supporting services, such as peak shaving, load compensation, power factor quality, and operation during source failures. In this context, an energy management system (EMS) is necessary to incorporate BESS in MGs. Consequently, state-of-charge (SoC) equalization is a common approach to address EMS requirements and balance the internal load among BESS units in MG operation. In this article, we present a comprehensive review of EMS strategies for balancing SoC among BESS units, including centralized and decentralized control, multiagent systems, and other concepts, such as designing nonlinear strategies, optimal algorithms, and categorizing agents into clusters. Moreover, in this article, we discuss alternatives to improve EMS and strategies regarding the topology of power converters, including redundancy-based topology, modular multilevel converter, cascaded-based converter, and hybrid-type systems. In addition, this article explores optimization processes aimed at reducing operational costs while considering SoC equalization. Finally, second-life BESS units are explored as an emerging topic, focusing on their operation within specific power converters topologies to achieve SoC balance.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"961-992"},"PeriodicalIF":5.2,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10666276","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-03DOI: 10.1109/OJIES.2024.3454010
Tianshi Cheng;Tong Duan;Venkata Dinavahi
Low Earth orbit (LEO) satellite networks, such as SpaceX's Starlink, offer enhanced communication potential for contemporary power grid measurement and control. Yet, the dynamic nature of these networks complicates their modeling and simulation. This study introduces a modular, data-oriented digital twin framework for real-time simulation of wide-area ac–dc grids with LEO satellite networks. The framework integrates RustSat for satellite tracking, SatSDN with MiniNet for SDN simulations, and entity-component-system (ECS)-Grid for real-time power system simulation. It features a data-centric design using an ECS framework with a structure-of-arrays memory layout, optimizing cache efficiency and computational performance, and offers high extensibility for interdisciplinary simulations. This marks the initial effort to develop a digital twin for real-time co-simulation of large-scale power systems and LEO satellite constellation networks. Evaluations on a wide-area synthetic ac–dc system with multiple satellite network types confirm the efficiency and precision of our approach, underscoring its potential in bridging LEO satellite networks with power system applications.
{"title":"Real-Time Cyber-Physical Digital Twin for Low Earth Orbit Satellite Constellation Network Enhanced Wide-Area Power Grid","authors":"Tianshi Cheng;Tong Duan;Venkata Dinavahi","doi":"10.1109/OJIES.2024.3454010","DOIUrl":"10.1109/OJIES.2024.3454010","url":null,"abstract":"Low Earth orbit (LEO) satellite networks, such as SpaceX's Starlink, offer enhanced communication potential for contemporary power grid measurement and control. Yet, the dynamic nature of these networks complicates their modeling and simulation. This study introduces a modular, data-oriented digital twin framework for real-time simulation of wide-area ac–dc grids with LEO satellite networks. The framework integrates RustSat for satellite tracking, SatSDN with MiniNet for SDN simulations, and entity-component-system (ECS)-Grid for real-time power system simulation. It features a data-centric design using an ECS framework with a structure-of-arrays memory layout, optimizing cache efficiency and computational performance, and offers high extensibility for interdisciplinary simulations. This marks the initial effort to develop a digital twin for real-time co-simulation of large-scale power systems and LEO satellite constellation networks. Evaluations on a wide-area synthetic ac–dc system with multiple satellite network types confirm the efficiency and precision of our approach, underscoring its potential in bridging LEO satellite networks with power system applications.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"1029-1041"},"PeriodicalIF":5.2,"publicationDate":"2024-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10663871","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-29DOI: 10.1109/OJIES.2024.3451959
Riccardo Berta;Ali Dabbous;Luca Lazzaroni;Danilo Pietro Pau;Francesco Bellotti
Tiny machine learning technologies are bringing intelligence ever closer to the sensor, thus enabling the key benefits of edge computing (e.g., reduced latency, improved data security, higher energy efficiency, and lower bandwidth consumption, also without the need for constant connectivity). This promises to significantly enhance industrial applications but requires suited development tools to deal with the complexity of the edge technologies and context. We propose an agile Jupyter Python notebook as a simple, manageable tool to efficiently and effectively develop microcontroller-based intelligent imaging classification sensors. The notebook implements a methodology involving hyperparameter tuning and comparison of different shallow and deep learning models, with quantization. It exports TensorFlow Lite models, deployable on several microcontroller families, and optionally exploits the STM32Cube.AI developer cloud service, which allows benchmarking the developed models on a set of real-world tiny hardware target platforms. Assessment concerns various types of metrics, both for machine learning (e.g., accuracy) and embedded systems (e.g., memory footprint, latency, and energy consumption). We have verified the support for development effectiveness and efficiency on four ultralow resolution image-classification datasets, with different levels of input and task complexity. In all cases, the tool was able to build microcontroller-deployment ready, beyond the state-of-the-art models, within 1 h on Google Colab CPUs.
微小的机器学习技术使智能越来越接近传感器，从而实现了边缘计算的主要优势（例如，减少延迟、提高数据安全性、提高能效和降低带宽消耗，而且无需持续连接）。这有望大幅提升工业应用，但需要合适的开发工具来应对边缘技术和环境的复杂性。我们提出了一种灵活的 Jupyter Python 笔记本，作为一种简单、易于管理的工具，用于高效开发基于微控制器的智能成像分类传感器。该笔记本实现的方法涉及超参数调整、不同浅层和深度学习模型的比较以及量化。它输出 TensorFlow Lite 模型，可部署在多个微控制器系列上，并可选择利用 STM32Cube.AI 开发人员云服务，该服务允许在一组真实世界的微型硬件目标平台上对所开发的模型进行基准测试。评估涉及机器学习（如准确性）和嵌入式系统（如内存占用、延迟和能耗）的各类指标。我们在四个超低分辨率图像分类数据集上验证了该支持工具的开发效果和效率，这些数据集具有不同程度的输入和任务复杂性。在所有情况下，该工具都能在谷歌 Colab CPU 上在 1 小时内构建出微控制器部署就绪的、超越最先进模型的模型。
{"title":"Developing a TinyML Image Classifier in an Hour","authors":"Riccardo Berta;Ali Dabbous;Luca Lazzaroni;Danilo Pietro Pau;Francesco Bellotti","doi":"10.1109/OJIES.2024.3451959","DOIUrl":"10.1109/OJIES.2024.3451959","url":null,"abstract":"Tiny machine learning technologies are bringing intelligence ever closer to the sensor, thus enabling the key benefits of edge computing (e.g., reduced latency, improved data security, higher energy efficiency, and lower bandwidth consumption, also without the need for constant connectivity). This promises to significantly enhance industrial applications but requires suited development tools to deal with the complexity of the edge technologies and context. We propose an agile Jupyter Python notebook as a simple, manageable tool to efficiently and effectively develop microcontroller-based intelligent imaging classification sensors. The notebook implements a methodology involving hyperparameter tuning and comparison of different shallow and deep learning models, with quantization. It exports TensorFlow Lite models, deployable on several microcontroller families, and optionally exploits the STM32Cube.AI developer cloud service, which allows benchmarking the developed models on a set of real-world tiny hardware target platforms. Assessment concerns various types of metrics, both for machine learning (e.g., accuracy) and embedded systems (e.g., memory footprint, latency, and energy consumption). We have verified the support for development effectiveness and efficiency on four ultralow resolution image-classification datasets, with different levels of input and task complexity. In all cases, the tool was able to build microcontroller-deployment ready, beyond the state-of-the-art models, within 1 h on Google Colab CPUs.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"946-960"},"PeriodicalIF":5.2,"publicationDate":"2024-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10659231","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn- <sc>off</small> delay control across complementary series-connected 10 kV SiC <sc>mosfet</small> s. The implementation of active turn- <sc>off</small> delay control in SiC <sc>mosfet</small> s eliminates the need for passive <inline-formula><tex-math>$RC$</tex-math></inline-formula> snubbers, which otherwise increase the switching <inline-formula><tex-math>$dv/dt$</tex-math></inline-formula> mismatch and snubber current across the diodes. In addition, parasitic base-plate capacitance across <sc>mosfet</small> s and diodes, along with parasitic bus bar and snubber inductance in the commutation path, contribute to turn- <sc>off</small> voltage mismatch and snubber loss in series-connected 10 kV SiC JBS diodes. The mismatch in nonlinear capacitance of series-connected devices ( <sc>mosfet</small> s and diodes) and the nonlinear <sc>mosfet</small> <inline-formula><tex-math>$i$</tex-math></inline-formula> <inline-formula><tex-math>$-$</tex-math></inline-formula> <inline-formula><tex-math>$v_{gs}$</tex-math></inline-formula> curve affect the turn- <sc>on</small> and turn- <sc>off</small> voltage transitions between complementary switching <sc>mosfet</small> s and diodes, leading to variations in turn- <sc>off</small> voltage mismatch and snubber losses. The 3L-NPC converter has eight types of switching transition, complicating the analysis of <inline-formula><tex-math>$RC$</tex-math></inline-formula> snubber design. This complexity is further increased by nonlinear device parameters, parasitic capacitance, and inductance in the commutation path for each of the eight 10 kV SiC <sc>mosfet</small> s and four 10 kV SiC JBS diodes. To address these challenges, this research develops a mathematical model for the switching transition between 10 kV SiC <sc>mosfet</small> s and complementary 10 kV SiC JBS diodes in a two-level clamped inductive switching (CIS) test setup. The model considers the effects of parasitic base-plate capacitance and the absence of an <inline-formula><tex-math>$RC$</tex-math></inline-formula> snubber due to active turn- <sc>off</small> delay control across series-connected SiC <sc>mosfet</small> s. Subsequently, the mathematical model is refined using an iterative algorithm to account for mismatches in nonlinear device capacitance of <sc>mosfet</small> s and diodes, as well as the nonlinear <inline-formula><tex-math>$i$</tex-math></inline-formula> <inline-formula><tex-math>$-$</tex-math></inline-formula> <inline-formula><tex-math>$v_{gs}$</tex-math></inline-formula> curve of <sc>mosfet</small> s during the switching transition of the diode. This refined model is then used to design the <inline-formula><tex-math>$RC$</tex-math></inline-formula> snubber for series-connected 10 kV SiC JBS diodes and to optimize the turn-
本文探讨了在三电平 NPC（3L-NPC）转换器中，利用互补串联的 10 kV SiC mosfets 上的有源关断延迟控制来缓解串联连接的 10 kV 碳化硅（SiC）JBS 二极管的动态电压不平衡问题。在碳化硅镶嵌晶体管中实施有源关断延迟控制，无需使用无源 $RC$ 缓冲器，否则会增加二极管上的开关 $dv/dt$ 失配和缓冲电流。此外，mosfets 和二极管上的寄生基板电容，以及换向路径中的寄生母线和缓冲器电感，都会导致串联 10 kV SiC JBS 二极管的关断电压失配和缓冲器损耗。串联器件（mosfet 和二极管）非线性电容的不匹配以及非线性 mosfet $i$$-$v_{gs}$ 曲线会影响互补开关 mosfet 和二极管之间的导通和关断电压转换，从而导致关断电压不匹配和缓冲器损耗的变化。3L-NPC 转换器有八种类型的开关转换，这使 $RC$ 缓冲器的设计分析变得更加复杂。8 个 10 kV SiC mosfets 和 4 个 10 kV SiC JBS 二极管换向路径中的非线性器件参数、寄生电容和电感进一步增加了这种复杂性。为了应对这些挑战，本研究针对两级箝位电感开关 (CIS) 测试装置中 10 kV SiC mosfets 和互补 10 kV SiC JBS 二极管之间的开关转换建立了一个数学模型。该模型考虑了寄生基板电容的影响，以及由于串联 SiC mosfets 的主动关断延迟控制而不存在 $RC$ 缓冲器的情况。随后，利用迭代算法对数学模型进行了改进，以考虑到晶体管和二极管非线性器件电容的不匹配，以及晶体管在二极管开关转换期间的非线性 $i$$-$v_{gs}$ 曲线。然后，利用这一完善的模型设计串联 10 kV SiC JBS 二极管的 $RC$ 缓冲器，并在两级 CIS 测试台（TB1 和 TB2）上优化互补 10 kV SiC mosfets 的导通栅极电阻。随后，利用 3L-NPC 测试台 3 至 5 的实验结果对设计参数进行了系统调整。本文提供了在各种测试台中设计和分析 $RC$ 缓冲器的简化步骤，并通过实验数据进行了验证。采用最终的 $RC$ 缓冲器设计的 3L-NPC 转换器实现了 99.2% 的效率和 35 V 的关断电压失配。理论模型与实验数据之间的最大误差为 4.8%。
{"title":"Dynamic Voltage Balancing Across Series-Connected 10 kV SiC JBS Diodes in Medium Voltage 3L-NPC Power Converter Having Snubberless Series-Connected 10 kV SiC MOSFETs","authors":"Sanket Parashar;Nithin Kolli;Raj Kumar Kokkonda;Ajit Kanale;Subhashish Bhattacharya;Bantval Jayant Baliga","doi":"10.1109/OJIES.2024.3450509","DOIUrl":"10.1109/OJIES.2024.3450509","url":null,"abstract":"This article addresses the mitigation of dynamic voltage imbalance in series-connected 10 kV silicon carbide (SiC) JBS diodes within a three-level NPC (3L-NPC) converter using active turn-\u0000<sc>off</small>\u0000 delay control across complementary series-connected 10 kV SiC \u0000<sc>mosfet</small>\u0000s. The implementation of active turn-\u0000<sc>off</small>\u0000 delay control in SiC \u0000<sc>mosfet</small>\u0000s eliminates the need for passive \u0000<inline-formula><tex-math>$RC$</tex-math></inline-formula>\u0000 snubbers, which otherwise increase the switching \u0000<inline-formula><tex-math>$dv/dt$</tex-math></inline-formula>\u0000 mismatch and snubber current across the diodes. In addition, parasitic base-plate capacitance across \u0000<sc>mosfet</small>\u0000s and diodes, along with parasitic bus bar and snubber inductance in the commutation path, contribute to turn-\u0000<sc>off</small>\u0000 voltage mismatch and snubber loss in series-connected 10 kV SiC JBS diodes. The mismatch in nonlinear capacitance of series-connected devices (\u0000<sc>mosfet</small>\u0000s and diodes) and the nonlinear \u0000<sc>mosfet</small>\u0000 \u0000<inline-formula><tex-math>$i$</tex-math></inline-formula>\u0000<inline-formula><tex-math>$-$</tex-math></inline-formula>\u0000<inline-formula><tex-math>$v_{gs}$</tex-math></inline-formula>\u0000 curve affect the turn-\u0000<sc>on</small>\u0000 and turn-\u0000<sc>off</small>\u0000 voltage transitions between complementary switching \u0000<sc>mosfet</small>\u0000s and diodes, leading to variations in turn-\u0000<sc>off</small>\u0000 voltage mismatch and snubber losses. The 3L-NPC converter has eight types of switching transition, complicating the analysis of \u0000<inline-formula><tex-math>$RC$</tex-math></inline-formula>\u0000 snubber design. This complexity is further increased by nonlinear device parameters, parasitic capacitance, and inductance in the commutation path for each of the eight 10 kV SiC \u0000<sc>mosfet</small>\u0000s and four 10 kV SiC JBS diodes. To address these challenges, this research develops a mathematical model for the switching transition between 10 kV SiC \u0000<sc>mosfet</small>\u0000s and complementary 10 kV SiC JBS diodes in a two-level clamped inductive switching (CIS) test setup. The model considers the effects of parasitic base-plate capacitance and the absence of an \u0000<inline-formula><tex-math>$RC$</tex-math></inline-formula>\u0000 snubber due to active turn-\u0000<sc>off</small>\u0000 delay control across series-connected SiC \u0000<sc>mosfet</small>\u0000s. Subsequently, the mathematical model is refined using an iterative algorithm to account for mismatches in nonlinear device capacitance of \u0000<sc>mosfet</small>\u0000s and diodes, as well as the nonlinear \u0000<inline-formula><tex-math>$i$</tex-math></inline-formula>\u0000<inline-formula><tex-math>$-$</tex-math></inline-formula>\u0000<inline-formula><tex-math>$v_{gs}$</tex-math></inline-formula>\u0000 curve of \u0000<sc>mosfet</small>\u0000s during the switching transition of the diode. This refined model is then used to design the \u0000<inline-formula><tex-math>$RC$</tex-math></inline-formula>\u0000 snubber for series-connected 10 kV SiC JBS diodes and to optimize the turn-\u0000","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"1058-1084"},"PeriodicalIF":5.2,"publicationDate":"2024-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10652239","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-22DOI: 10.1109/ojies.2024.3447885
Anthony Abdayem, Jean Sawma, Adrián Beneit, Ramon Blasco-Gimenez, Flavia Khatounian, Eric Monmasson
{"title":"Comparative Assessment of Modulation Strategies in Modular Multilevel Converters: An Attempt for a Better Compromise Between the efficiency and Capacitor Voltages' Dispersion","authors":"Anthony Abdayem, Jean Sawma, Adrián Beneit, Ramon Blasco-Gimenez, Flavia Khatounian, Eric Monmasson","doi":"10.1109/ojies.2024.3447885","DOIUrl":"https://doi.org/10.1109/ojies.2024.3447885","url":null,"abstract":"","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"40 1","pages":""},"PeriodicalIF":8.5,"publicationDate":"2024-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-21DOI: 10.1109/OJIES.2024.3446911
Thales Augusto Fagundes;Guilherme Henrique Favaro Fuzato;Rafael Fernando Quirino Magossi;Ana Laís Rui Oliveira;Ricardo Quadros Machado
This article proposes a redundancy-based cascaded bidirectional dc/dc converter designed to interface battery energy storage system (BESS) units. With the employment of this topology, its reliability is increased due to redundancy in power conversion, which differs from conventional structures formed by dc/dc converters that cannot process power flow when a fault occurs. Thus, the topology is provided merging the cascaded bidirectional Boost converter and cascaded bidirectional Cuk converter. Subsequently, the coupled mathematical model of the proposed topology can be readily calculated, considering all feasible (different) subcircuits according to the switching pattern. Therefore, small-signal analysis is applied to design the PI controllers, followed by a closed-loop performance evaluation using an infinity norm and stability analysis to assess the operation of the dc/dc converter in closed loop for different values of load and current references. Finally, a lab-scale prototype and a hardware-in-the-loop setup prove the effectiveness of the dc/dc converter working in various scenarios and also operating with the traditional SoC-based droop for balancing the BESS units.
{"title":"A Design of a Redundancy-Based Cascaded Bidirectional DC–DC Converter for Improved Reliability in Energy Storage Devices","authors":"Thales Augusto Fagundes;Guilherme Henrique Favaro Fuzato;Rafael Fernando Quirino Magossi;Ana Laís Rui Oliveira;Ricardo Quadros Machado","doi":"10.1109/OJIES.2024.3446911","DOIUrl":"10.1109/OJIES.2024.3446911","url":null,"abstract":"This article proposes a redundancy-based cascaded bidirectional dc/dc converter designed to interface battery energy storage system (BESS) units. With the employment of this topology, its reliability is increased due to redundancy in power conversion, which differs from conventional structures formed by dc/dc converters that cannot process power flow when a fault occurs. Thus, the topology is provided merging the cascaded bidirectional Boost converter and cascaded bidirectional Cuk converter. Subsequently, the coupled mathematical model of the proposed topology can be readily calculated, considering all feasible (different) subcircuits according to the switching pattern. Therefore, small-signal analysis is applied to design the PI controllers, followed by a closed-loop performance evaluation using an infinity norm and stability analysis to assess the operation of the dc/dc converter in closed loop for different values of load and current references. Finally, a lab-scale prototype and a hardware-in-the-loop setup prove the effectiveness of the dc/dc converter working in various scenarios and also operating with the traditional SoC-based droop for balancing the BESS units.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"898-915"},"PeriodicalIF":5.2,"publicationDate":"2024-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10643290","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-21DOI: 10.1109/OJIES.2024.3447001
Gernot Steindl;Tobias Schwarzinger;Katrin Schreiberhuber;Fajar J. Ekaputra
In the context of cyber-physical systems (CPS), understanding system behaviors is crucial for ensuring reliability, efficiency, and trust. However, due to the increasing complexity of the modern CPS, gaining such understanding is becoming more challenging. In this article we provide a foundation for explaining system behavior through detected system events. To this end, the article proposes a technology-agnostic, semantic event-handling module to address the challenge of enhancing explainability within CPS. This module is designed to be part of the common architecture for Explainable CPS and, therefore, can be integrated seamlessly into existing CPS frameworks by providing different interfaces to access detected events. Two case studies in the smart building and smart grid domain are carried out to demonstrate the feasibility and efficacy of the approach, utilizing an open-source software stack for the prototypical implementation. A qualitative evaluation of the proposed approach, based on the ISO/IEC 25010:2023, was used to analyze the software design. Our evaluation result shows that the semantic event-handling module is appropriate as a generic approach to handling events within a CPS. The module becomes a foundation for incorporating explainability into the system, which is needed as a foundation to ensure human trust and enable informed decision-making.
{"title":"Toward Semantic Event-Handling for Building Explainable Cyber-Physical Systems","authors":"Gernot Steindl;Tobias Schwarzinger;Katrin Schreiberhuber;Fajar J. Ekaputra","doi":"10.1109/OJIES.2024.3447001","DOIUrl":"10.1109/OJIES.2024.3447001","url":null,"abstract":"In the context of cyber-physical systems (CPS), understanding system behaviors is crucial for ensuring reliability, efficiency, and trust. However, due to the increasing complexity of the modern CPS, gaining such understanding is becoming more challenging. In this article we provide a foundation for explaining system behavior through detected system events. To this end, the article proposes a technology-agnostic, semantic event-handling module to address the challenge of enhancing explainability within CPS. This module is designed to be part of the common architecture for Explainable CPS and, therefore, can be integrated seamlessly into existing CPS frameworks by providing different interfaces to access detected events. Two case studies in the smart building and smart grid domain are carried out to demonstrate the feasibility and efficacy of the approach, utilizing an open-source software stack for the prototypical implementation. A qualitative evaluation of the proposed approach, based on the ISO/IEC 25010:2023, was used to analyze the software design. Our evaluation result shows that the semantic event-handling module is appropriate as a generic approach to handling events within a CPS. The module becomes a foundation for incorporating explainability into the system, which is needed as a foundation to ensure human trust and enable informed decision-making.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"928-945"},"PeriodicalIF":5.2,"publicationDate":"2024-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10643286","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142175880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-09DOI: 10.1109/OJIES.2024.3441112
Siegfried Hollerer;Thilo Sauter;Wolfgang Kastner
The integration of information technology (IT) and operational technology (OT) is deepening, amplifying the interconnectedness of operational, safety, and security demands within industrial automation systems. Lacking comprehensive guidance, risk managers often resort to manual solutions based on best practices or rely on domain experts, who usually offer insights limited to their specific areas of expertise. Given the intricate interplay among these domains, employing ontologies for knowledge representation could hold the key to capturing all necessary relationships and constraints for effective risk management processes. This study conducts a systematic mapping analysis of ontologies published over the past five years, focusing on at least one domain relevant to OT system risk management. Its objective is to categorize papers, offer a panoramic view of research themes and contributors, discern potential publication patterns, and identify research avenues based on a comprehensive review of these ontologies. Findings indicate a relatively stable research interest, with most publications presenting proof of concepts or initial experimental results for their ontological applications. This study establishes a foundation for classifying comprehensive OT ontologies and pinpoints unresolved issues that can steer future research efforts. It offers insights into the current state-of-the-art within this research area.
信息技术（IT）与操作技术（OT）的融合不断加深，扩大了工业自动化系统中操作、安全和安保需求的相互关联性。由于缺乏全面的指导，风险管理人员通常会采用基于最佳实践的手动解决方案，或者依赖领域专家，而这些专家通常只能提供其特定专业领域的见解。鉴于这些领域之间错综复杂的相互作用，采用本体进行知识表示可能是捕捉所有必要关系和制约因素以实现有效风险管理流程的关键。本研究对过去五年发表的本体进行了系统的映射分析，重点关注至少一个与 OT 系统风险管理相关的领域。其目的是对论文进行分类，提供研究主题和贡献者的全景视图，识别潜在的出版模式，并在对这些本体进行全面审查的基础上确定研究途径。研究结果表明，研究兴趣相对稳定，大多数出版物介绍了本体应用的概念验证或初步实验结果。本研究为对全面的加时赛本体进行分类奠定了基础，并指出了可指导未来研究工作的未决问题。它为了解这一研究领域的当前最新进展提供了见解。
{"title":"A Survey of Ontologies Considering General Safety, Security, and Operation Aspects in OT","authors":"Siegfried Hollerer;Thilo Sauter;Wolfgang Kastner","doi":"10.1109/OJIES.2024.3441112","DOIUrl":"10.1109/OJIES.2024.3441112","url":null,"abstract":"The integration of information technology (IT) and operational technology (OT) is deepening, amplifying the interconnectedness of operational, safety, and security demands within industrial automation systems. Lacking comprehensive guidance, risk managers often resort to manual solutions based on best practices or rely on domain experts, who usually offer insights limited to their specific areas of expertise. Given the intricate interplay among these domains, employing ontologies for knowledge representation could hold the key to capturing all necessary relationships and constraints for effective risk management processes. This study conducts a systematic mapping analysis of ontologies published over the past five years, focusing on at least one domain relevant to OT system risk management. Its objective is to categorize papers, offer a panoramic view of research themes and contributors, discern potential publication patterns, and identify research avenues based on a comprehensive review of these ontologies. Findings indicate a relatively stable research interest, with most publications presenting proof of concepts or initial experimental results for their ontological applications. This study establishes a foundation for classifying comprehensive OT ontologies and pinpoints unresolved issues that can steer future research efforts. It offers insights into the current state-of-the-art within this research area.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"861-885"},"PeriodicalIF":5.2,"publicationDate":"2024-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10632623","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141940424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-08DOI: 10.1109/OJIES.2024.3440578
Sruthi Pallathuvalappil;Rahul Kottappuzhackal;Alex James
System level simulation of neuro-memristive circuits under variability are complex and follow a black-box neural network approach. In realistic hardware, they are often difficult to cross-check for accuracy and reproducible results. The accurate memristor model prediction becomes critical to decipher the overall circuit function in a wide range of nonideal and practical conditions. In most neuro-memristive systems, crossbar configuration is essential for implementing multiply and accumulate calculations, that form the primary unit for neural network implementations. Predicting the specific memristor model that best fits the crossbar simulations to make it explainable is an open challenge that is solved in this article. As the size of the crossbar increases the cross-validation becomes even more challenging. This article proposes predicting the memristor device under test by automatically evaluating the I–V behavior using random forest and extreme gradient boosting algorithms. Starting with a single memristor model, the prediction approach is extended to memristor crossbar-based circuits explainable. The performance of both algorithms is analyzed based on precision, recall, f1-score, and support. The accuracy, macro average, and weighted average of both algorithms at different operational frequencies are explored.
{"title":"Explainable Model Prediction of Memristor","authors":"Sruthi Pallathuvalappil;Rahul Kottappuzhackal;Alex James","doi":"10.1109/OJIES.2024.3440578","DOIUrl":"10.1109/OJIES.2024.3440578","url":null,"abstract":"System level simulation of neuro-memristive circuits under variability are complex and follow a black-box neural network approach. In realistic hardware, they are often difficult to cross-check for accuracy and reproducible results. The accurate memristor model prediction becomes critical to decipher the overall circuit function in a wide range of nonideal and practical conditions. In most neuro-memristive systems, crossbar configuration is essential for implementing multiply and accumulate calculations, that form the primary unit for neural network implementations. Predicting the specific memristor model that best fits the crossbar simulations to make it explainable is an open challenge that is solved in this article. As the size of the crossbar increases the cross-validation becomes even more challenging. This article proposes predicting the memristor device under test by automatically evaluating the \u0000<italic>I–V</i>\u0000 behavior using random forest and extreme gradient boosting algorithms. Starting with a single memristor model, the prediction approach is extended to memristor crossbar-based circuits explainable. The performance of both algorithms is analyzed based on precision, recall, f1-score, and support. The accuracy, macro average, and weighted average of both algorithms at different operational frequencies are explored.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"836-846"},"PeriodicalIF":5.2,"publicationDate":"2024-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10631696","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141940425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-08-06DOI: 10.1109/OJIES.2024.3439388
Pushparaj Bhosale;Wolfgang Kastner;Thilo Sauter
Industrial control systems (ICSs) play a crucial role in the smooth operation of critical infrastructures, and their increasing complexity and interconnectedness necessitate integrating safety and security measures. Thus, an integrated risk assessment approach is essential to identify and address potential hazards and vulnerabilities. However, conducting such risk assessments becomes complex and challenging due to the difficulty in data availability. Acquiring data from various sources poses a significant hurdle. To address these challenges, automation markup language (AML) provides a standardized framework that facilitates the seamless exchange of engineering information. This article uses AML libraries and connection setup techniques to generate a valuable model of a single source of data for an integrated safety and security risk assessment. The automated risk assessment employs the AML model as a data source and the Bayesian belief network (BBN) as the risk assessment method. The value of risk associated with the system is calculated using the BBN models as the product of the probability of occurrence and severity. An evaluation of the proposed risk assessment method is also provided based on ISO 31000. AML's effectiveness as a valuable information model in meeting the growing need for comprehensive safety and security risk assessment in ICSs is demonstrated.
工业控制系统（ICS）在关键基础设施的平稳运行中发挥着至关重要的作用，其日益增加的复杂性和相互关联性要求将安全和安保措施融为一体。因此，综合风险评估方法对于识别和解决潜在危险和漏洞至关重要。然而，由于难以获得数据，开展此类风险评估变得复杂而具有挑战性。从各种来源获取数据是一个重大障碍。为应对这些挑战，自动化标记语言（AML）提供了一个标准化框架，可促进工程信息的无缝交换。本文使用 AML 库和连接设置技术，为综合安全和安保风险评估生成有价值的单一数据源模型。自动风险评估采用 AML 模型作为数据源，贝叶斯信念网络 (BBN) 作为风险评估方法。使用贝叶斯信念网络模型计算与系统相关的风险值，将其作为发生概率和严重程度的乘积。此外，还根据 ISO 31000 标准对建议的风险评估方法进行了评估。证明了 AML 作为一种有价值的信息模型，在满足日益增长的对 ICS 全面安全和安保风险评估的需求方面的有效性。
{"title":"AutomationML Meets Bayesian Networks: A Comprehensive Safety-Security Risk Assessment in Industrial Control Systems","authors":"Pushparaj Bhosale;Wolfgang Kastner;Thilo Sauter","doi":"10.1109/OJIES.2024.3439388","DOIUrl":"10.1109/OJIES.2024.3439388","url":null,"abstract":"Industrial control systems (ICSs) play a crucial role in the smooth operation of critical infrastructures, and their increasing complexity and interconnectedness necessitate integrating safety and security measures. Thus, an integrated risk assessment approach is essential to identify and address potential hazards and vulnerabilities. However, conducting such risk assessments becomes complex and challenging due to the difficulty in data availability. Acquiring data from various sources poses a significant hurdle. To address these challenges, automation markup language (AML) provides a standardized framework that facilitates the seamless exchange of engineering information. This article uses AML libraries and connection setup techniques to generate a valuable model of a single source of data for an integrated safety and security risk assessment. The automated risk assessment employs the AML model as a data source and the Bayesian belief network (BBN) as the risk assessment method. The value of risk associated with the system is calculated using the BBN models as the product of the probability of occurrence and severity. An evaluation of the proposed risk assessment method is also provided based on ISO 31000. AML's effectiveness as a valuable information model in meeting the growing need for comprehensive safety and security risk assessment in ICSs is demonstrated.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"5 ","pages":"823-835"},"PeriodicalIF":5.2,"publicationDate":"2024-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10623880","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141940426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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