The development of autonomous vehicles is progressing rapidly. For practical implementation, platforms ensuring real-time performance, safety, and security are crucial. AUTOSAR adaptive platform (AUTOSAR AP) meets these needs and is widely used in development. However, it is rarely utilized in research due to licensing and tool availability issues. Instead, robot operating system 2 (ROS 2) is the main platform for autonomous vehicle research. This gap between research and development platforms hinders the swift application of research outcomes, delaying the practical implementation of autonomous vehicles. In addition, software-defined vehicle requires flexible software development in cloud environment. To address these challenges, this article proposes AUTOSAR AP and ROS 2 collaboration framework for development in cloud environment. ROS 2 uses data distribution service for communication, while AUTOSAR AP employs scalable service-oriented middleware over IP. The proposed framework bridges these protocols through conversion, enabling seamless communication. The functionality and performance of the proposed bridge converter are verified through measurements. The proposed bridge converter supports communication between AUTOSAR AP and ROS 2 in cloud environment and allows easy use of ROS 2 tools. Automating file generation further enhances the usability of the proposed collaboration framework.
{"title":"AUTOSAR AP and ROS 2 Collaboration Framework for Development in Cloud Environment","authors":"Ryudai Iwakami;Bo Peng;Hiroyuki Hanyu;Tasuku Ishigooka;Takuya Azumi","doi":"10.1109/OJIES.2025.3607248","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3607248","url":null,"abstract":"The development of autonomous vehicles is progressing rapidly. For practical implementation, platforms ensuring real-time performance, safety, and security are crucial. AUTOSAR adaptive platform (AUTOSAR AP) meets these needs and is widely used in development. However, it is rarely utilized in research due to licensing and tool availability issues. Instead, robot operating system 2 (ROS 2) is the main platform for autonomous vehicle research. This gap between research and development platforms hinders the swift application of research outcomes, delaying the practical implementation of autonomous vehicles. In addition, software-defined vehicle requires flexible software development in cloud environment. To address these challenges, this article proposes AUTOSAR AP and ROS 2 collaboration framework for development in cloud environment. ROS 2 uses data distribution service for communication, while AUTOSAR AP employs scalable service-oriented middleware over IP. The proposed framework bridges these protocols through conversion, enabling seamless communication. The functionality and performance of the proposed bridge converter are verified through measurements. The proposed bridge converter supports communication between AUTOSAR AP and ROS 2 in cloud environment and allows easy use of ROS 2 tools. Automating file generation further enhances the usability of the proposed collaboration framework.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1533-1545"},"PeriodicalIF":4.3,"publicationDate":"2025-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11153079","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-08DOI: 10.1109/OJIES.2025.3606965
Dong Xu;Heyang Feng;Fan Qiao;Kaiyang Lu;Xiaoguang Hu;Yupeng Liu
Robotic fish exhibit considerable potential for a wide range of applications. However, the limitation of battery size highlights the need to improve swimming efficiency. This article develops a deep deterministic policy gradient (DDPG)-based control method that makes the stiffness of robotic fish can be adjusted dynamically. First, the mathematical model of the two-joint robotic fish is established. Then, the conventional proportional–integral–derivative control system and the DDPG-based control system are developed. In the end, the feasibility of the DDPG-based approach was validated through simulation and experiments. The results indicate that the control method improved the system efficiency by approximately 9.77%, suggesting that the proposed method holds promise as a high-efficiency propulsion control approach for robotic fish.
{"title":"Propulsion Control of Bionic Robotic Fish Based on Deep Deterministic Policy Gradient Algorithm","authors":"Dong Xu;Heyang Feng;Fan Qiao;Kaiyang Lu;Xiaoguang Hu;Yupeng Liu","doi":"10.1109/OJIES.2025.3606965","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3606965","url":null,"abstract":"Robotic fish exhibit considerable potential for a wide range of applications. However, the limitation of battery size highlights the need to improve swimming efficiency. This article develops a deep deterministic policy gradient (DDPG)-based control method that makes the stiffness of robotic fish can be adjusted dynamically. First, the mathematical model of the two-joint robotic fish is established. Then, the conventional proportional–integral–derivative control system and the DDPG-based control system are developed. In the end, the feasibility of the DDPG-based approach was validated through simulation and experiments. The results indicate that the control method improved the system efficiency by approximately 9.77%, suggesting that the proposed method holds promise as a high-efficiency propulsion control approach for robotic fish.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1496-1507"},"PeriodicalIF":4.3,"publicationDate":"2025-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11153067","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-01DOI: 10.1109/OJIES.2025.3604576
Muhammad M. Roomi;S. M. Suhail Hussain;Ee-Chien Chang;David M. Nicol;Daisuke Mashima
Digitalization of power grids have made them increasingly susceptible to cyber-attacks in the past decade. Iterative cybersecurity testing (i.e., red-team testing or penetration testing) is indispensable to counter emerging attack vectors and to ensure dependability of critical infrastructure. Furthermore, these can be used to evaluate cybersecurity configuration, effectiveness of the cybersecurity measures against various attack vectors, and to train smart grid cybersecurity experts defending the system. Facilitating extensive experiments narrows the gap between academic research and production environment. A high-fidelity cyber range (a virtual cybersecurity testbed emulating smart grid systems) is vital as it is often infeasible to conduct such experiments and training using production environment. However, the design and implementation of cyber range requires extensive domain knowledge of physical and cyber aspect of the infrastructure. Furthermore, costs incurred for setup and maintenance of cyber range are significant. Moreover, most existing smart grid cyber ranges are designed as a one-off, proprietary system, and are limited in terms of configurability, accessibility, portability, and reproducibility. To address these challenges, an automated smart grid cyber range generation framework (Auto-SGCR) is presented in this article. Initially a human-/machine-friendly, XML-based modeling language called smart grid modeling language (SG-ML) was defined, which incorporates IEC 61850 system configuration language files. Subsequently, a tool chain to parse SG-ML model files and automatically instantiate a functional smart grid cyber range was developed. The developed SG-ML models can be easily shared and/or modified to reproduce or customize for any cyber range. The application of Auto-SGCR is demonstrated through case studies with large-scale substation models. The toolchain along with example SG-ML models have been open-sourced.
{"title":"Auto-SGCR: Automated Generation of Smart Grid Cyber Range Using IEC 61850 Standard Models","authors":"Muhammad M. Roomi;S. M. Suhail Hussain;Ee-Chien Chang;David M. Nicol;Daisuke Mashima","doi":"10.1109/OJIES.2025.3604576","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3604576","url":null,"abstract":"Digitalization of power grids have made them increasingly susceptible to cyber-attacks in the past decade. Iterative cybersecurity testing (i.e., red-team testing or penetration testing) is indispensable to counter emerging attack vectors and to ensure dependability of critical infrastructure. Furthermore, these can be used to evaluate cybersecurity configuration, effectiveness of the cybersecurity measures against various attack vectors, and to train smart grid cybersecurity experts defending the system. Facilitating extensive experiments narrows the gap between academic research and production environment. A high-fidelity cyber range (a virtual cybersecurity testbed emulating smart grid systems) is vital as it is often infeasible to conduct such experiments and training using production environment. However, the design and implementation of cyber range requires extensive domain knowledge of physical and cyber aspect of the infrastructure. Furthermore, costs incurred for setup and maintenance of cyber range are significant. Moreover, most existing smart grid cyber ranges are designed as a one-off, proprietary system, and are limited in terms of configurability, accessibility, portability, and reproducibility. To address these challenges, an automated smart grid cyber range generation framework (Auto-SGCR) is presented in this article. Initially a human-/machine-friendly, XML-based modeling language called smart grid modeling language (SG-ML) was defined, which incorporates IEC 61850 system configuration language files. Subsequently, a tool chain to parse SG-ML model files and automatically instantiate a functional smart grid cyber range was developed. The developed SG-ML models can be easily shared and/or modified to reproduce or customize for any cyber range. The application of Auto-SGCR is demonstrated through case studies with large-scale substation models. The toolchain along with example SG-ML models have been open-sourced.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1575-1592"},"PeriodicalIF":4.3,"publicationDate":"2025-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11145746","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145210089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-01DOI: 10.1109/OJIES.2025.3604578
Mehrage Ghods;Jawad Faiz;Mohammad Ali Bahrami;Shahryar Haghvirdiloo;Zabihollah Tabarniarami
Tubular linear structures have been shown to offer higher torque density, power factor and efficiency in comparison with linear planar structures. In addition, these structures exhibit greater mechanical tolerance to misalignments and faults, which renders them advantageous in a variety of applications. This article evaluates a tubular permanent magnet Vernier motor with a consequent pole configuration. In this design, the magnets are arranged side by side in a Halbach, surface and V-shaped array suitable for servo application. The end-effect and thrust force ripple are minimized, while the power factor and the average thrust force are enhanced, through the utilization of electrical and mechanical phase shifts of the modules with respect to each other and to the reference, in comparison to the planar structure. The predicted performances of both structures are validated through experimental validation.
{"title":"Overview of Performance and Comparative Evaluation of Linear Tubular and Planar Consequent Pole PM Vernier Motor for Servo Applications","authors":"Mehrage Ghods;Jawad Faiz;Mohammad Ali Bahrami;Shahryar Haghvirdiloo;Zabihollah Tabarniarami","doi":"10.1109/OJIES.2025.3604578","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3604578","url":null,"abstract":"Tubular linear structures have been shown to offer higher torque density, power factor and efficiency in comparison with linear planar structures. In addition, these structures exhibit greater mechanical tolerance to misalignments and faults, which renders them advantageous in a variety of applications. This article evaluates a tubular permanent magnet Vernier motor with a consequent pole configuration. In this design, the magnets are arranged side by side in a Halbach, surface and V-shaped array suitable for servo application. The end-effect and thrust force ripple are minimized, while the power factor and the average thrust force are enhanced, through the utilization of electrical and mechanical phase shifts of the modules with respect to each other and to the reference, in comparison to the planar structure. The predicted performances of both structures are validated through experimental validation.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1476-1495"},"PeriodicalIF":4.3,"publicationDate":"2025-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11145932","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145090145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The power versus voltage curve of a photovoltaic (PV) panel exhibits several maximum power points (MPPs) in a partial shading (PS) condition. Thus, it remains an optimization challenge to ensure that PV systems operate at their global MPP (GMPP). Scanning the output characteristics of the PV panels seems a general solution for this issue. However, applying a short circuit to the terminal of PV panels where there exists an electrolytic capacitor, has a detrimental effect on the lifetime of the system. To this end, in this article, a GMPP estimator is proposed as a global solution for conventional maximum power point tracking (MPPT) algorithms under PS conditions. The proposed technique improves existing simple MPPT algorithms with original approaches as follows: first, an accurate microscopic analysis of a PV characteristic in PS conditions is considered, second, an original definition of the dominant cells and modules in a PV panel is proposed that allows to reduce the PS patterns to a finite number, and third, the search area for the MPPT operation is reduced to find the accurate GMPP by proposing two voltage boundaries. The lower boundary corresponds to the GMPP under uniform shading condition that can be determined using a closed form formula, while the upper one refers to the GMPP of a dominant cell in a PV module that can be determined using an artificial intelligence technique. This can also help set the initial duty cycle in a convex area around the GMPP. The functionality of the proposed GMPP estimator is experimentally validated.
{"title":"GMPP Estimator as a Global Solution for MPPT Algorithms Under Partial Shading Conditions","authors":"Reza Sangrody;Shamsodin Taheri;Ana-Maria Cretu;Edris Pouresmaeil;Hani Vahedi","doi":"10.1109/OJIES.2025.3602363","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3602363","url":null,"abstract":"The power versus voltage curve of a photovoltaic (PV) panel exhibits several maximum power points (MPPs) in a partial shading (PS) condition. Thus, it remains an optimization challenge to ensure that PV systems operate at their global MPP (GMPP). Scanning the output characteristics of the PV panels seems a general solution for this issue. However, applying a short circuit to the terminal of PV panels where there exists an electrolytic capacitor, has a detrimental effect on the lifetime of the system. To this end, in this article, a GMPP estimator is proposed as a global solution for conventional maximum power point tracking (MPPT) algorithms under PS conditions. The proposed technique improves existing simple MPPT algorithms with original approaches as follows: first, an accurate microscopic analysis of a PV characteristic in PS conditions is considered, second, an original definition of the dominant cells and modules in a PV panel is proposed that allows to reduce the PS patterns to a finite number, and third, the search area for the MPPT operation is reduced to find the accurate GMPP by proposing two voltage boundaries. The lower boundary corresponds to the GMPP under uniform shading condition that can be determined using a closed form formula, while the upper one refers to the GMPP of a dominant cell in a PV module that can be determined using an artificial intelligence technique. This can also help set the initial duty cycle in a convex area around the GMPP. The functionality of the proposed GMPP estimator is experimentally validated.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1387-1397"},"PeriodicalIF":4.3,"publicationDate":"2025-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11134809","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144998362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Driver distraction recognition is gaining increasing interest in improving traffic safety, as well as in automated driving. This article reports the experience we have gained developing a driver distraction detection (DDD) system within the Hi-Drive research project on driving automation. Targeting on-board deployability, we have faced several leading-edge research issues that have not been addressed together in published research works. We propose a compact sensory configuration and a limited computational resource system architecture, also exploiting careful manual and automated labeling, trying to find a tradeoff among conflicting needs in terms of accuracy, privacy preservation, energy efficiency, and costs. Our system detects two levels of insufficient attention, which are keys not only for designing a proper driver warning and information management strategy but also for better managing the transition among different automation levels. Our experiments confirmed on real-world data, and in the three-class task, the importance of distinguishing users among training, validation, and testing to prevent overestimating model performance by overfitting individual participant patterns present in all three subsets. We analyzed the complexity of the three-class problem, which is also related to the relatively low representation of the intermediate distraction class in the dataset. We showed that the size of the classifiable time window is a critical performance factor and found that a 5 s length seems to achieve the best tradeoff between latency, time resolution, and the need for capturing sufficient temporal information to detect distraction. Another empirical finding comes from a SHAP values-based explainability analysis and concerns the importance of vehicular signals for the detection task, particularly in the three-class problem. This is significant, as such signals are inexpensively available in vehicles, and their processing does not add further privacy concerns. Finally, assessing performance on three state-of-the-art embedded platforms, we observed that the developed deep learning models are able to effectively run on limited-resource, on-board deployable devices, meeting real-time performance requirements, also on a mainstream, low-cost microcontroller. We argue that these findings open significant perspectives toward an effective and efficient field deployment of DDD electronic systems.
{"title":"On-Board Deployability of a Deep Learning-Based System for Distraction and Inattention Detection","authors":"Matteo Fresta;Francesco Bellotti;Luca Lazzaroni;Hadi Ballout;Alessandro Pighetti;Óscar Ameneiro-Prieto;Manuel Porta-Lorenzo;Daniel Sánchez-Louzán;Cristina González-Escudeiro;Fabio Tango;Riccardo Berta","doi":"10.1109/OJIES.2025.3601982","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3601982","url":null,"abstract":"Driver distraction recognition is gaining increasing interest in improving traffic safety, as well as in automated driving. This article reports the experience we have gained developing a driver distraction detection (DDD) system within the Hi-Drive research project on driving automation. Targeting on-board deployability, we have faced several leading-edge research issues that have not been addressed together in published research works. We propose a compact sensory configuration and a limited computational resource system architecture, also exploiting careful manual and automated labeling, trying to find a tradeoff among conflicting needs in terms of accuracy, privacy preservation, energy efficiency, and costs. Our system detects two levels of insufficient attention, which are keys not only for designing a proper driver warning and information management strategy but also for better managing the transition among different automation levels. Our experiments confirmed on real-world data, and in the three-class task, the importance of distinguishing users among training, validation, and testing to prevent overestimating model performance by overfitting individual participant patterns present in all three subsets. We analyzed the complexity of the three-class problem, which is also related to the relatively low representation of the intermediate distraction class in the dataset. We showed that the size of the classifiable time window is a critical performance factor and found that a 5 s length seems to achieve the best tradeoff between latency, time resolution, and the need for capturing sufficient temporal information to detect distraction. Another empirical finding comes from a SHAP values-based explainability analysis and concerns the importance of vehicular signals for the detection task, particularly in the three-class problem. This is significant, as such signals are inexpensively available in vehicles, and their processing does not add further privacy concerns. Finally, assessing performance on three state-of-the-art embedded platforms, we observed that the developed deep learning models are able to effectively run on limited-resource, on-board deployable devices, meeting real-time performance requirements, also on a mainstream, low-cost microcontroller. We argue that these findings open significant perspectives toward an effective and efficient field deployment of DDD electronic systems.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1351-1369"},"PeriodicalIF":4.3,"publicationDate":"2025-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11134568","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144990057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article proposes a simplified direct power control (SDPC) based on a switching table (SWT) for a multilevel grid-connected diode-clamped converter (DCC). This work primarily aims to reduce the SWT size by one-sixth, thereby decreasing the required computational time. The proposed algorithm offers a simplification applicable to any direct power control algorithm designed for the DCC, regardless of SWT size or converter levels. Furthermore, the proposed approach ensures dc-side capacitor voltage balance in the converter by optimally selecting redundant states exclusively within the first sector. Experimental and real-time simulation results are conducted to demonstrate the effectiveness of the proposed SDPC method in reducing execution time while ensuring accurate regulation of both active and reactive power and maintaining balanced capacitor voltages.
{"title":"Simplified Direct Power Control for Grid Connected Multilevel Diode Clamped Converter","authors":"Azeddine Mehaouchi;Mansour Bouzidi;Boualaga Rabhi;Haitham Abu-Rub;Said Barkat;Abdelghani Boubekri","doi":"10.1109/OJIES.2025.3600577","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3600577","url":null,"abstract":"This article proposes a simplified direct power control (SDPC) based on a switching table (SWT) for a multilevel grid-connected diode-clamped converter (DCC). This work primarily aims to reduce the SWT size by one-sixth, thereby decreasing the required computational time. The proposed algorithm offers a simplification applicable to any direct power control algorithm designed for the DCC, regardless of SWT size or converter levels. Furthermore, the proposed approach ensures dc-side capacitor voltage balance in the converter by optimally selecting redundant states exclusively within the first sector. Experimental and real-time simulation results are conducted to demonstrate the effectiveness of the proposed SDPC method in reducing execution time while ensuring accurate regulation of both active and reactive power and maintaining balanced capacitor voltages.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1461-1475"},"PeriodicalIF":4.3,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11130387","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145051043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-19DOI: 10.1109/OJIES.2025.3600173
Mohammad Sharifzadeh;Eric Laurendeau;Arman Fathollahi;Meysam Gheisarnejad;Mahdieh S. Sadabadi;Kamal Al-Haddad
This article introduces a modified Packed U-Cell (PUC) inverter to establish a three-phase configuration using a single dc source to overcome the drawbacks of the multi-individual dc sources in the conventional three-phase PUC topology. The three-phase modified PUC is designed by the cascading connection of a flying capacitor and Hybrid Packed U-Cell (HPUC) in each phase, where the whole circuit design is fed by a single-dc-source voltage. The single-dc-source three-phase modified PUC inverter is also expandable by expanding the HPUC structure. The floating capacitors are actively balanced by integrating the abundant redundant switching states into the designed pulsewidth modulation technique through a voltage balancing algorithm. The performance of the three-phase nine-level modified PUC inverter and its floating capacitor voltage balancing is evaluated through theoretical and experimental analyses under all stand-alone and grid-connected operation conditions. The comparative study demonstrates that the three-phase modified PUC has fewer active and passive devices compared to other counterpart three-phase multilevel topologies.
{"title":"Single-DC-Source Three-Phase Modified Packed U-Cell Inverter With Reduced Components and Active Capacitor Voltage Balancing","authors":"Mohammad Sharifzadeh;Eric Laurendeau;Arman Fathollahi;Meysam Gheisarnejad;Mahdieh S. Sadabadi;Kamal Al-Haddad","doi":"10.1109/OJIES.2025.3600173","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3600173","url":null,"abstract":"This article introduces a modified Packed U-Cell (PUC) inverter to establish a three-phase configuration using a single dc source to overcome the drawbacks of the multi-individual dc sources in the conventional three-phase PUC topology. The three-phase modified PUC is designed by the cascading connection of a flying capacitor and Hybrid Packed U-Cell (HPUC) in each phase, where the whole circuit design is fed by a single-dc-source voltage. The single-dc-source three-phase modified PUC inverter is also expandable by expanding the HPUC structure. The floating capacitors are actively balanced by integrating the abundant redundant switching states into the designed pulsewidth modulation technique through a voltage balancing algorithm. The performance of the three-phase nine-level modified PUC inverter and its floating capacitor voltage balancing is evaluated through theoretical and experimental analyses under all stand-alone and grid-connected operation conditions. The comparative study demonstrates that the three-phase modified PUC has fewer active and passive devices compared to other counterpart three-phase multilevel topologies.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1448-1460"},"PeriodicalIF":4.3,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11129241","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article proposes a time-efficient and practical design method for determining appropriate skew structures for permanent magnet synchronous motors (PMSMs). Various PMSMs use skew to suppress torque ripple, but 3-D finite element analysis (3-D-FEA) is required in order to accurately determine an appropriate structure for skewed PMSMs, resulting in a long analysis time. Therefore, this article constructs a hybrid analysis method that combines numerical calculations and minimal 3-D-FEA. The aim of this method is to be practical and easy to use, even for novice designers, and to accurately and quickly design skewed PMSMs. In this article, the effectiveness of the proposed method is clarified through several case studies, and then, a skewed PMSM designed using the proposed method is verified experimentally. It is also revealed that suppression of voltage harmonics contributes to improving the performance of PMSMs in experiments.
{"title":"Time-Efficient and Practical Design Method for Skewed PMSMs: Integrating Numerical Calculations With Limited 3-D-FEA","authors":"Ren Tsunata;Yu Ichimura;Masatsugu Takemoto;Jun Imai","doi":"10.1109/OJIES.2025.3599390","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3599390","url":null,"abstract":"This article proposes a time-efficient and practical design method for determining appropriate skew structures for permanent magnet synchronous motors (PMSMs). Various PMSMs use skew to suppress torque ripple, but 3-D finite element analysis (3-D-FEA) is required in order to accurately determine an appropriate structure for skewed PMSMs, resulting in a long analysis time. Therefore, this article constructs a hybrid analysis method that combines numerical calculations and minimal 3-D-FEA. The aim of this method is to be practical and easy to use, even for novice designers, and to accurately and quickly design skewed PMSMs. In this article, the effectiveness of the proposed method is clarified through several case studies, and then, a skewed PMSM designed using the proposed method is verified experimentally. It is also revealed that suppression of voltage harmonics contributes to improving the performance of PMSMs in experiments.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1370-1386"},"PeriodicalIF":4.3,"publicationDate":"2025-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11126871","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144990126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-15DOI: 10.1109/OJIES.2025.3599409
Hadi Aghaei;Ebrahim Babaei;Mohammad Bagher Bannae Sharifian;Atif Iqbal
Dual three-phase drives offer significant advantages for medium and high-power applications, including reduced current ratings for power switches, lower torque ripple, and enhanced fault tolerance compared to conventional three-phase drives. However, traditional three-level inverters used to drive these motors often escalate system costs due to their large number of power switches. This article introduces a dual three-phase sparse inverter designed to address these limitations. The proposed inverter utilizes only 16 power switches, a substantial reduction compared to conventional three-level inverters. This article also propose a carrier-based pulsewidth modulation (PWM) scheme that uniquely imposes no computational burden on the microcontroller. This PWM strategy incorporates a 180° phase shift between carriers of two three-phase systems, effectively eliminating common-mode voltage and xy harmonics. A comprehensive comparative study was conducted, assessing the proposed inverter against both two-level and conventional three-level inverters based on total harmonic distortion and efficiency. To validate its performance, experimental results are provided for the proposed dual three-phase inverter driving a 746 W induction motor using a constant volt/Hz open-loop control method.
{"title":"Dual Three-Phase Sparse Inverter: Topology Analysis, PWM Scheme, and Common Mode Voltage Elimination","authors":"Hadi Aghaei;Ebrahim Babaei;Mohammad Bagher Bannae Sharifian;Atif Iqbal","doi":"10.1109/OJIES.2025.3599409","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3599409","url":null,"abstract":"Dual three-phase drives offer significant advantages for medium and high-power applications, including reduced current ratings for power switches, lower torque ripple, and enhanced fault tolerance compared to conventional three-phase drives. However, traditional three-level inverters used to drive these motors often escalate system costs due to their large number of power switches. This article introduces a dual three-phase sparse inverter designed to address these limitations. The proposed inverter utilizes only 16 power switches, a substantial reduction compared to conventional three-level inverters. This article also propose a carrier-based pulsewidth modulation (PWM) scheme that uniquely imposes no computational burden on the microcontroller. This PWM strategy incorporates a 180° phase shift between carriers of two three-phase systems, effectively eliminating common-mode voltage and <italic>xy</i> harmonics. A comprehensive comparative study was conducted, assessing the proposed inverter against both two-level and conventional three-level inverters based on total harmonic distortion and efficiency. To validate its performance, experimental results are provided for the proposed dual three-phase inverter driving a 746 W induction motor using a constant volt/Hz open-loop control method.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1398-1422"},"PeriodicalIF":4.3,"publicationDate":"2025-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11126430","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145011315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}